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[linux-2.6-omap-h63xx.git] / drivers / serial / bfin_5xx.c
1 /*
2  * Blackfin On-Chip Serial Driver
3  *
4  * Copyright 2006-2007 Analog Devices Inc.
5  *
6  * Enter bugs at http://blackfin.uclinux.org/
7  *
8  * Licensed under the GPL-2 or later.
9  */
10
11 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
12 #define SUPPORT_SYSRQ
13 #endif
14
15 #include <linux/module.h>
16 #include <linux/ioport.h>
17 #include <linux/init.h>
18 #include <linux/console.h>
19 #include <linux/sysrq.h>
20 #include <linux/platform_device.h>
21 #include <linux/tty.h>
22 #include <linux/tty_flip.h>
23 #include <linux/serial_core.h>
24
25 #ifdef CONFIG_KGDB_UART
26 #include <linux/kgdb.h>
27 #include <asm/irq_regs.h>
28 #endif
29
30 #include <asm/gpio.h>
31 #include <asm/mach/bfin_serial_5xx.h>
32
33 #ifdef CONFIG_SERIAL_BFIN_DMA
34 #include <linux/dma-mapping.h>
35 #include <asm/io.h>
36 #include <asm/irq.h>
37 #include <asm/cacheflush.h>
38 #endif
39
40 /* UART name and device definitions */
41 #define BFIN_SERIAL_NAME        "ttyBF"
42 #define BFIN_SERIAL_MAJOR       204
43 #define BFIN_SERIAL_MINOR       64
44
45 /*
46  * Setup for console. Argument comes from the menuconfig
47  */
48 #define DMA_RX_XCOUNT           512
49 #define DMA_RX_YCOUNT           (PAGE_SIZE / DMA_RX_XCOUNT)
50
51 #define DMA_RX_FLUSH_JIFFIES    5
52
53 #ifdef CONFIG_SERIAL_BFIN_DMA
54 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
55 #else
56 static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
57 #endif
58
59 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
60
61 /*
62  * interrupts are disabled on entry
63  */
64 static void bfin_serial_stop_tx(struct uart_port *port)
65 {
66         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
67         struct circ_buf *xmit = &uart->port.info->xmit;
68 #if !defined(CONFIG_BF54x) && !defined(CONFIG_SERIAL_BFIN_DMA)
69         unsigned short ier;
70 #endif
71
72         while (!(UART_GET_LSR(uart) & TEMT))
73                 cpu_relax();
74
75 #ifdef CONFIG_SERIAL_BFIN_DMA
76         disable_dma(uart->tx_dma_channel);
77         xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
78         uart->port.icount.tx += uart->tx_count;
79         uart->tx_count = 0;
80         uart->tx_done = 1;
81 #else
82 #ifdef CONFIG_BF54x
83         /* Clear TFI bit */
84         UART_PUT_LSR(uart, TFI);
85         UART_CLEAR_IER(uart, ETBEI);
86 #else
87         ier = UART_GET_IER(uart);
88         ier &= ~ETBEI;
89         UART_PUT_IER(uart, ier);
90 #endif
91 #endif
92 }
93
94 /*
95  * port is locked and interrupts are disabled
96  */
97 static void bfin_serial_start_tx(struct uart_port *port)
98 {
99         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
100
101 #ifdef CONFIG_SERIAL_BFIN_DMA
102         if (uart->tx_done)
103                 bfin_serial_dma_tx_chars(uart);
104 #else
105 #ifdef CONFIG_BF54x
106         UART_SET_IER(uart, ETBEI);
107 #else
108         unsigned short ier;
109         ier = UART_GET_IER(uart);
110         ier |= ETBEI;
111         UART_PUT_IER(uart, ier);
112 #endif
113         bfin_serial_tx_chars(uart);
114 #endif
115 }
116
117 /*
118  * Interrupts are enabled
119  */
120 static void bfin_serial_stop_rx(struct uart_port *port)
121 {
122         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
123 #ifdef  CONFIG_KGDB_UART
124         if (uart->port.line != CONFIG_KGDB_UART_PORT) {
125 #endif
126 #ifdef CONFIG_BF54x
127         UART_CLEAR_IER(uart, ERBFI);
128 #else
129         unsigned short ier;
130
131         ier = UART_GET_IER(uart);
132         ier &= ~ERBFI;
133         UART_PUT_IER(uart, ier);
134 #endif
135 #ifdef  CONFIG_KGDB_UART
136         }
137 #endif
138 }
139
140 /*
141  * Set the modem control timer to fire immediately.
142  */
143 static void bfin_serial_enable_ms(struct uart_port *port)
144 {
145 }
146
147 #ifdef CONFIG_KGDB_UART
148 static int kgdb_entry_state;
149
150 void kgdb_put_debug_char(int chr)
151 {
152         struct bfin_serial_port *uart;
153         
154         if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS)
155                 uart = &bfin_serial_ports[0];
156         else
157                 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
158         
159         while (!(UART_GET_LSR(uart) & THRE)) {
160                 SSYNC();
161         }
162
163 #ifndef CONFIG_BF54x
164         UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
165         SSYNC();
166 #endif
167         UART_PUT_CHAR(uart, (unsigned char)chr);
168         SSYNC();
169 }
170
171 int kgdb_get_debug_char(void)
172 {
173         struct bfin_serial_port *uart;
174         unsigned char chr;
175
176         if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS)
177                 uart = &bfin_serial_ports[0];
178         else
179                 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
180         
181         while(!(UART_GET_LSR(uart) & DR)) {
182                 SSYNC();
183         }
184 #ifndef CONFIG_BF54x
185         UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
186         SSYNC();
187 #endif
188         chr = UART_GET_CHAR(uart);
189         SSYNC();
190
191         return chr;
192 }
193 #endif
194
195 #if ANOMALY_05000230 && defined(CONFIG_SERIAL_BFIN_PIO)
196 # define UART_GET_ANOMALY_THRESHOLD(uart)    ((uart)->anomaly_threshold)
197 # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
198 #else
199 # define UART_GET_ANOMALY_THRESHOLD(uart)    0
200 # define UART_SET_ANOMALY_THRESHOLD(uart, v)
201 #endif
202
203 #ifdef CONFIG_SERIAL_BFIN_PIO
204 static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
205 {
206         struct tty_struct *tty = uart->port.info->tty;
207         unsigned int status, ch, flg;
208         static struct timeval anomaly_start = { .tv_sec = 0 };
209 #ifdef CONFIG_KGDB_UART
210         struct pt_regs *regs = get_irq_regs();
211 #endif
212
213         status = UART_GET_LSR(uart);
214         UART_CLEAR_LSR(uart);
215
216         ch = UART_GET_CHAR(uart);
217         uart->port.icount.rx++;
218
219 #ifdef CONFIG_KGDB_UART
220         if (uart->port.line == CONFIG_KGDB_UART_PORT) {
221                 if (uart->port.cons->index == CONFIG_KGDB_UART_PORT && ch == 0x1) { /* Ctrl + A */
222                         kgdb_breakkey_pressed(regs);
223                         return;
224                 } else if (kgdb_entry_state == 0 && ch == '$') {/* connection from KGDB */
225                         kgdb_entry_state = 1;
226                 } else if (kgdb_entry_state == 1 && ch == 'q') {
227                         kgdb_entry_state = 0;
228                         kgdb_breakkey_pressed(regs);
229                         return;
230                 } else if (ch == 0x3) {/* Ctrl + C */
231                         kgdb_entry_state = 0;
232                         kgdb_breakkey_pressed(regs);
233                         return;
234                 } else {
235                         kgdb_entry_state = 0;
236                 }
237         }
238 #endif
239
240         if (ANOMALY_05000230) {
241                 /* The BF533 (and BF561) family of processors have a nice anomaly
242                  * where they continuously generate characters for a "single" break.
243                  * We have to basically ignore this flood until the "next" valid
244                  * character comes across.  Due to the nature of the flood, it is
245                  * not possible to reliably catch bytes that are sent too quickly
246                  * after this break.  So application code talking to the Blackfin
247                  * which sends a break signal must allow at least 1.5 character
248                  * times after the end of the break for things to stabilize.  This
249                  * timeout was picked as it must absolutely be larger than 1
250                  * character time +/- some percent.  So 1.5 sounds good.  All other
251                  * Blackfin families operate properly.  Woo.
252                  * Note: While Anomaly 05000230 does not directly address this,
253                  *       the changes that went in for it also fixed this issue.
254                  *       That anomaly was fixed in 0.5+ silicon.  I like bunnies.
255                  */
256                 if (anomaly_start.tv_sec) {
257                         struct timeval curr;
258                         suseconds_t usecs;
259
260                         if ((~ch & (~ch + 1)) & 0xff)
261                                 goto known_good_char;
262
263                         do_gettimeofday(&curr);
264                         if (curr.tv_sec - anomaly_start.tv_sec > 1)
265                                 goto known_good_char;
266
267                         usecs = 0;
268                         if (curr.tv_sec != anomaly_start.tv_sec)
269                                 usecs += USEC_PER_SEC;
270                         usecs += curr.tv_usec - anomaly_start.tv_usec;
271
272                         if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
273                                 goto known_good_char;
274
275                         if (ch)
276                                 anomaly_start.tv_sec = 0;
277                         else
278                                 anomaly_start = curr;
279
280                         return;
281
282  known_good_char:
283                         anomaly_start.tv_sec = 0;
284                 }
285         }
286
287         if (status & BI) {
288                 if (ANOMALY_05000230)
289                         if (bfin_revid() < 5)
290                                 do_gettimeofday(&anomaly_start);
291                 uart->port.icount.brk++;
292                 if (uart_handle_break(&uart->port))
293                         goto ignore_char;
294                 status &= ~(PE | FE);
295         }
296         if (status & PE)
297                 uart->port.icount.parity++;
298         if (status & OE)
299                 uart->port.icount.overrun++;
300         if (status & FE)
301                 uart->port.icount.frame++;
302
303         status &= uart->port.read_status_mask;
304
305         if (status & BI)
306                 flg = TTY_BREAK;
307         else if (status & PE)
308                 flg = TTY_PARITY;
309         else if (status & FE)
310                 flg = TTY_FRAME;
311         else
312                 flg = TTY_NORMAL;
313
314         if (uart_handle_sysrq_char(&uart->port, ch))
315                 goto ignore_char;
316
317         uart_insert_char(&uart->port, status, OE, ch, flg);
318
319  ignore_char:
320         tty_flip_buffer_push(tty);
321 }
322
323 static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
324 {
325         struct circ_buf *xmit = &uart->port.info->xmit;
326
327         if (uart->port.x_char) {
328                 UART_PUT_CHAR(uart, uart->port.x_char);
329                 uart->port.icount.tx++;
330                 uart->port.x_char = 0;
331         }
332         /*
333          * Check the modem control lines before
334          * transmitting anything.
335          */
336         bfin_serial_mctrl_check(uart);
337
338         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
339                 bfin_serial_stop_tx(&uart->port);
340                 return;
341         }
342
343         while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
344                 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
345                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
346                 uart->port.icount.tx++;
347                 SSYNC();
348         }
349
350         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
351                 uart_write_wakeup(&uart->port);
352
353         if (uart_circ_empty(xmit))
354                 bfin_serial_stop_tx(&uart->port);
355 }
356
357 static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
358 {
359         struct bfin_serial_port *uart = dev_id;
360
361         spin_lock(&uart->port.lock);
362         while (UART_GET_LSR(uart) & DR)
363                 bfin_serial_rx_chars(uart);
364         spin_unlock(&uart->port.lock);
365
366         return IRQ_HANDLED;
367 }
368
369 static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
370 {
371         struct bfin_serial_port *uart = dev_id;
372
373         spin_lock(&uart->port.lock);
374         if (UART_GET_LSR(uart) & THRE)
375                 bfin_serial_tx_chars(uart);
376         spin_unlock(&uart->port.lock);
377
378         return IRQ_HANDLED;
379 }
380 #endif
381
382 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
383 static void bfin_serial_do_work(struct work_struct *work)
384 {
385         struct bfin_serial_port *uart = container_of(work, struct bfin_serial_port, cts_workqueue);
386
387         bfin_serial_mctrl_check(uart);
388 }
389 #endif
390
391 #ifdef CONFIG_SERIAL_BFIN_DMA
392 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
393 {
394         struct circ_buf *xmit = &uart->port.info->xmit;
395         unsigned short ier;
396         int flags = 0;
397
398         uart->tx_done = 0;
399
400         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
401                 uart->tx_count = 0;
402                 uart->tx_done = 1;
403                 return;
404         }
405
406         if (uart->port.x_char) {
407                 UART_PUT_CHAR(uart, uart->port.x_char);
408                 uart->port.icount.tx++;
409                 uart->port.x_char = 0;
410         }
411
412         /*
413          * Check the modem control lines before
414          * transmitting anything.
415          */
416         bfin_serial_mctrl_check(uart);
417
418         uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
419         if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
420                 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
421         blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
422                                         (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
423         set_dma_config(uart->tx_dma_channel,
424                 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
425                         INTR_ON_BUF,
426                         DIMENSION_LINEAR,
427                         DATA_SIZE_8,
428                         DMA_SYNC_RESTART));
429         set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
430         set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
431         set_dma_x_modify(uart->tx_dma_channel, 1);
432         enable_dma(uart->tx_dma_channel);
433
434 #ifdef CONFIG_BF54x
435         UART_SET_IER(uart, ETBEI);
436 #else
437         ier = UART_GET_IER(uart);
438         ier |= ETBEI;
439         UART_PUT_IER(uart, ier);
440 #endif
441 }
442
443 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
444 {
445         struct tty_struct *tty = uart->port.info->tty;
446         int i, flg, status;
447
448         status = UART_GET_LSR(uart);
449         UART_CLEAR_LSR(uart);
450
451         uart->port.icount.rx +=
452                 CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
453                 UART_XMIT_SIZE);
454
455         if (status & BI) {
456                 uart->port.icount.brk++;
457                 if (uart_handle_break(&uart->port))
458                         goto dma_ignore_char;
459                 status &= ~(PE | FE);
460         }
461         if (status & PE)
462                 uart->port.icount.parity++;
463         if (status & OE)
464                 uart->port.icount.overrun++;
465         if (status & FE)
466                 uart->port.icount.frame++;
467
468         status &= uart->port.read_status_mask;
469
470         if (status & BI)
471                 flg = TTY_BREAK;
472         else if (status & PE)
473                 flg = TTY_PARITY;
474         else if (status & FE)
475                 flg = TTY_FRAME;
476         else
477                 flg = TTY_NORMAL;
478
479         for (i = uart->rx_dma_buf.tail; i != uart->rx_dma_buf.head; i++) {
480                 if (i >= UART_XMIT_SIZE)
481                         i = 0;
482                 if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
483                         uart_insert_char(&uart->port, status, OE,
484                                 uart->rx_dma_buf.buf[i], flg);
485         }
486
487  dma_ignore_char:
488         tty_flip_buffer_push(tty);
489 }
490
491 void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
492 {
493         int x_pos, pos;
494         int flags = 0;
495
496         spin_lock_irqsave(&uart->port.lock, flags);
497         uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
498         x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
499         uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
500         if (uart->rx_dma_nrows == DMA_RX_YCOUNT)
501                 uart->rx_dma_nrows = 0;
502         x_pos = DMA_RX_XCOUNT - x_pos;
503         if (x_pos == DMA_RX_XCOUNT)
504                 x_pos = 0;
505
506         pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
507         if (pos != uart->rx_dma_buf.tail) {
508                 uart->rx_dma_buf.head = pos;
509                 bfin_serial_dma_rx_chars(uart);
510                 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
511         }
512         spin_unlock_irqrestore(&uart->port.lock, flags);
513         uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
514         add_timer(&(uart->rx_dma_timer));
515 }
516
517 static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
518 {
519         struct bfin_serial_port *uart = dev_id;
520         struct circ_buf *xmit = &uart->port.info->xmit;
521         unsigned short ier;
522
523         spin_lock(&uart->port.lock);
524         if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
525                 disable_dma(uart->tx_dma_channel);
526                 clear_dma_irqstat(uart->tx_dma_channel);
527 #ifdef CONFIG_BF54x
528                 UART_CLEAR_IER(uart, ETBEI);
529 #else
530                 ier = UART_GET_IER(uart);
531                 ier &= ~ETBEI;
532                 UART_PUT_IER(uart, ier);
533 #endif
534                 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
535                 uart->port.icount.tx += uart->tx_count;
536
537                 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
538                         uart_write_wakeup(&uart->port);
539
540                 bfin_serial_dma_tx_chars(uart);
541         }
542
543         spin_unlock(&uart->port.lock);
544         return IRQ_HANDLED;
545 }
546
547 static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
548 {
549         struct bfin_serial_port *uart = dev_id;
550         unsigned short irqstat;
551         int pos;
552
553         uart->rx_dma_nrows = DMA_RX_YCOUNT -
554                 get_dma_curr_ycount(uart->rx_dma_channel);
555         pos = DMA_RX_XCOUNT * uart->rx_dma_nrows;
556         if (pos != uart->rx_dma_buf.tail) {
557                 uart->rx_dma_buf.head = pos;
558                 bfin_serial_dma_rx_chars(uart);
559                 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
560         }
561
562         spin_lock(&uart->port.lock);
563         irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
564         clear_dma_irqstat(uart->rx_dma_channel);
565
566         spin_unlock(&uart->port.lock);
567         return IRQ_HANDLED;
568 }
569 #endif
570
571 /*
572  * Return TIOCSER_TEMT when transmitter is not busy.
573  */
574 static unsigned int bfin_serial_tx_empty(struct uart_port *port)
575 {
576         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
577         unsigned short lsr;
578
579         lsr = UART_GET_LSR(uart);
580         if (lsr & TEMT)
581                 return TIOCSER_TEMT;
582         else
583                 return 0;
584 }
585
586 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
587 {
588 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
589         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
590         if (uart->cts_pin < 0)
591                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
592
593 # ifdef BF54x
594         if (UART_GET_MSR(uart) & CTS)
595 # else
596         if (gpio_get_value(uart->cts_pin))
597 # endif
598                 return TIOCM_DSR | TIOCM_CAR;
599         else
600 #endif
601                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
602 }
603
604 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
605 {
606 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
607         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
608         if (uart->rts_pin < 0)
609                 return;
610
611         if (mctrl & TIOCM_RTS)
612 # ifdef BF54x
613                 UART_PUT_MCR(uart, UART_GET_MCR(uart) & ~MRTS);
614 # else
615                 gpio_set_value(uart->rts_pin, 0);
616 # endif
617         else
618 # ifdef BF54x
619                 UART_PUT_MCR(uart, UART_GET_MCR(uart) | MRTS);
620 # else
621                 gpio_set_value(uart->rts_pin, 1);
622 # endif
623 #endif
624 }
625
626 /*
627  * Handle any change of modem status signal since we were last called.
628  */
629 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
630 {
631 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
632         unsigned int status;
633         struct uart_info *info = uart->port.info;
634         struct tty_struct *tty = info->tty;
635
636         status = bfin_serial_get_mctrl(&uart->port);
637         uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
638         if (!(status & TIOCM_CTS)) {
639                 tty->hw_stopped = 1;
640                 schedule_work(&uart->cts_workqueue);
641         } else {
642                 tty->hw_stopped = 0;
643         }
644 #endif
645 }
646
647 /*
648  * Interrupts are always disabled.
649  */
650 static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
651 {
652         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
653         u16 lcr = UART_GET_LCR(uart);
654         if (break_state)
655                 lcr |= SB;
656         else
657                 lcr &= ~SB;
658         UART_PUT_LCR(uart, lcr);
659         SSYNC();
660 }
661
662 static int bfin_serial_startup(struct uart_port *port)
663 {
664         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
665
666 #ifdef CONFIG_SERIAL_BFIN_DMA
667         dma_addr_t dma_handle;
668
669         if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
670                 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
671                 return -EBUSY;
672         }
673
674         if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
675                 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
676                 free_dma(uart->rx_dma_channel);
677                 return -EBUSY;
678         }
679
680         set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
681         set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
682
683         uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
684         uart->rx_dma_buf.head = 0;
685         uart->rx_dma_buf.tail = 0;
686         uart->rx_dma_nrows = 0;
687
688         set_dma_config(uart->rx_dma_channel,
689                 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
690                                 INTR_ON_ROW, DIMENSION_2D,
691                                 DATA_SIZE_8,
692                                 DMA_SYNC_RESTART));
693         set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
694         set_dma_x_modify(uart->rx_dma_channel, 1);
695         set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
696         set_dma_y_modify(uart->rx_dma_channel, 1);
697         set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
698         enable_dma(uart->rx_dma_channel);
699
700         uart->rx_dma_timer.data = (unsigned long)(uart);
701         uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
702         uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
703         add_timer(&(uart->rx_dma_timer));
704 #else
705         if (request_irq(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
706              "BFIN_UART_RX", uart)) {
707 # ifdef CONFIG_KGDB_UART
708                 if (uart->port.line != CONFIG_KGDB_UART_PORT) {
709 # endif
710                 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
711                 return -EBUSY;
712 # ifdef CONFIG_KGDB_UART
713                 }
714 # endif
715         }
716
717
718         if (request_irq
719             (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
720              "BFIN_UART_TX", uart)) {
721                 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
722                 free_irq(uart->port.irq, uart);
723                 return -EBUSY;
724         }
725 #endif
726 #ifdef CONFIG_BF54x
727         UART_SET_IER(uart, ERBFI);
728 #else
729         UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
730 #endif
731         return 0;
732 }
733
734 static void bfin_serial_shutdown(struct uart_port *port)
735 {
736         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
737
738 #ifdef CONFIG_SERIAL_BFIN_DMA
739         disable_dma(uart->tx_dma_channel);
740         free_dma(uart->tx_dma_channel);
741         disable_dma(uart->rx_dma_channel);
742         free_dma(uart->rx_dma_channel);
743         del_timer(&(uart->rx_dma_timer));
744         dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
745 #else
746 #ifdef  CONFIG_KGDB_UART
747         if (uart->port.line != CONFIG_KGDB_UART_PORT)
748 #endif
749         free_irq(uart->port.irq, uart);
750         free_irq(uart->port.irq+1, uart);
751 #endif
752 }
753
754 static void
755 bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
756                    struct ktermios *old)
757 {
758         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
759         unsigned long flags;
760         unsigned int baud, quot;
761         unsigned short val, ier, lsr, lcr = 0;
762
763         switch (termios->c_cflag & CSIZE) {
764         case CS8:
765                 lcr = WLS(8);
766                 break;
767         case CS7:
768                 lcr = WLS(7);
769                 break;
770         case CS6:
771                 lcr = WLS(6);
772                 break;
773         case CS5:
774                 lcr = WLS(5);
775                 break;
776         default:
777                 printk(KERN_ERR "%s: word lengh not supported\n",
778                         __FUNCTION__);
779         }
780
781         if (termios->c_cflag & CSTOPB)
782                 lcr |= STB;
783         if (termios->c_cflag & PARENB)
784                 lcr |= PEN;
785         if (!(termios->c_cflag & PARODD))
786                 lcr |= EPS;
787         if (termios->c_cflag & CMSPAR)
788                 lcr |= STP;
789
790         port->read_status_mask = OE;
791         if (termios->c_iflag & INPCK)
792                 port->read_status_mask |= (FE | PE);
793         if (termios->c_iflag & (BRKINT | PARMRK))
794                 port->read_status_mask |= BI;
795
796         /*
797          * Characters to ignore
798          */
799         port->ignore_status_mask = 0;
800         if (termios->c_iflag & IGNPAR)
801                 port->ignore_status_mask |= FE | PE;
802         if (termios->c_iflag & IGNBRK) {
803                 port->ignore_status_mask |= BI;
804                 /*
805                  * If we're ignoring parity and break indicators,
806                  * ignore overruns too (for real raw support).
807                  */
808                 if (termios->c_iflag & IGNPAR)
809                         port->ignore_status_mask |= OE;
810         }
811
812         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
813         quot = uart_get_divisor(port, baud);
814         spin_lock_irqsave(&uart->port.lock, flags);
815
816         UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
817
818         do {
819                 lsr = UART_GET_LSR(uart);
820         } while (!(lsr & TEMT));
821
822         /* Disable UART */
823         ier = UART_GET_IER(uart);
824 #ifdef CONFIG_BF54x
825         UART_CLEAR_IER(uart, 0xF);
826 #else
827         UART_PUT_IER(uart, 0);
828 #endif
829
830 #ifndef CONFIG_BF54x
831         /* Set DLAB in LCR to Access DLL and DLH */
832         val = UART_GET_LCR(uart);
833         val |= DLAB;
834         UART_PUT_LCR(uart, val);
835         SSYNC();
836 #endif
837
838         UART_PUT_DLL(uart, quot & 0xFF);
839         SSYNC();
840         UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
841         SSYNC();
842
843 #ifndef CONFIG_BF54x
844         /* Clear DLAB in LCR to Access THR RBR IER */
845         val = UART_GET_LCR(uart);
846         val &= ~DLAB;
847         UART_PUT_LCR(uart, val);
848         SSYNC();
849 #endif
850
851         UART_PUT_LCR(uart, lcr);
852
853         /* Enable UART */
854 #ifdef CONFIG_BF54x
855         UART_SET_IER(uart, ier);
856 #else
857         UART_PUT_IER(uart, ier);
858 #endif
859
860         val = UART_GET_GCTL(uart);
861         val |= UCEN;
862         UART_PUT_GCTL(uart, val);
863
864         spin_unlock_irqrestore(&uart->port.lock, flags);
865 }
866
867 static const char *bfin_serial_type(struct uart_port *port)
868 {
869         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
870
871         return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
872 }
873
874 /*
875  * Release the memory region(s) being used by 'port'.
876  */
877 static void bfin_serial_release_port(struct uart_port *port)
878 {
879 }
880
881 /*
882  * Request the memory region(s) being used by 'port'.
883  */
884 static int bfin_serial_request_port(struct uart_port *port)
885 {
886         return 0;
887 }
888
889 /*
890  * Configure/autoconfigure the port.
891  */
892 static void bfin_serial_config_port(struct uart_port *port, int flags)
893 {
894         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
895
896         if (flags & UART_CONFIG_TYPE &&
897             bfin_serial_request_port(&uart->port) == 0)
898                 uart->port.type = PORT_BFIN;
899 }
900
901 /*
902  * Verify the new serial_struct (for TIOCSSERIAL).
903  * The only change we allow are to the flags and type, and
904  * even then only between PORT_BFIN and PORT_UNKNOWN
905  */
906 static int
907 bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
908 {
909         return 0;
910 }
911
912 static struct uart_ops bfin_serial_pops = {
913         .tx_empty       = bfin_serial_tx_empty,
914         .set_mctrl      = bfin_serial_set_mctrl,
915         .get_mctrl      = bfin_serial_get_mctrl,
916         .stop_tx        = bfin_serial_stop_tx,
917         .start_tx       = bfin_serial_start_tx,
918         .stop_rx        = bfin_serial_stop_rx,
919         .enable_ms      = bfin_serial_enable_ms,
920         .break_ctl      = bfin_serial_break_ctl,
921         .startup        = bfin_serial_startup,
922         .shutdown       = bfin_serial_shutdown,
923         .set_termios    = bfin_serial_set_termios,
924         .type           = bfin_serial_type,
925         .release_port   = bfin_serial_release_port,
926         .request_port   = bfin_serial_request_port,
927         .config_port    = bfin_serial_config_port,
928         .verify_port    = bfin_serial_verify_port,
929 };
930
931 static void __init bfin_serial_init_ports(void)
932 {
933         static int first = 1;
934         int i;
935
936         if (!first)
937                 return;
938         first = 0;
939
940         for (i = 0; i < nr_ports; i++) {
941                 bfin_serial_ports[i].port.uartclk   = get_sclk();
942                 bfin_serial_ports[i].port.ops       = &bfin_serial_pops;
943                 bfin_serial_ports[i].port.line      = i;
944                 bfin_serial_ports[i].port.iotype    = UPIO_MEM;
945                 bfin_serial_ports[i].port.membase   =
946                         (void __iomem *)bfin_serial_resource[i].uart_base_addr;
947                 bfin_serial_ports[i].port.mapbase   =
948                         bfin_serial_resource[i].uart_base_addr;
949                 bfin_serial_ports[i].port.irq       =
950                         bfin_serial_resource[i].uart_irq;
951                 bfin_serial_ports[i].port.flags     = UPF_BOOT_AUTOCONF;
952 #ifdef CONFIG_SERIAL_BFIN_DMA
953                 bfin_serial_ports[i].tx_done        = 1;
954                 bfin_serial_ports[i].tx_count       = 0;
955                 bfin_serial_ports[i].tx_dma_channel =
956                         bfin_serial_resource[i].uart_tx_dma_channel;
957                 bfin_serial_ports[i].rx_dma_channel =
958                         bfin_serial_resource[i].uart_rx_dma_channel;
959                 init_timer(&(bfin_serial_ports[i].rx_dma_timer));
960 #endif
961 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
962                 INIT_WORK(&bfin_serial_ports[i].cts_workqueue, bfin_serial_do_work);
963                 bfin_serial_ports[i].cts_pin        =
964                         bfin_serial_resource[i].uart_cts_pin;
965                 bfin_serial_ports[i].rts_pin        =
966                         bfin_serial_resource[i].uart_rts_pin;
967 #endif
968                 bfin_serial_hw_init(&bfin_serial_ports[i]);
969         }
970
971 }
972
973 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
974 /*
975  * If the port was already initialised (eg, by a boot loader),
976  * try to determine the current setup.
977  */
978 static void __init
979 bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
980                            int *parity, int *bits)
981 {
982         unsigned short status;
983
984         status = UART_GET_IER(uart) & (ERBFI | ETBEI);
985         if (status == (ERBFI | ETBEI)) {
986                 /* ok, the port was enabled */
987                 unsigned short lcr, val;
988                 unsigned short dlh, dll;
989
990                 lcr = UART_GET_LCR(uart);
991
992                 *parity = 'n';
993                 if (lcr & PEN) {
994                         if (lcr & EPS)
995                                 *parity = 'e';
996                         else
997                                 *parity = 'o';
998                 }
999                 switch (lcr & 0x03) {
1000                         case 0: *bits = 5; break;
1001                         case 1: *bits = 6; break;
1002                         case 2: *bits = 7; break;
1003                         case 3: *bits = 8; break;
1004                 }
1005 #ifndef CONFIG_BF54x
1006                 /* Set DLAB in LCR to Access DLL and DLH */
1007                 val = UART_GET_LCR(uart);
1008                 val |= DLAB;
1009                 UART_PUT_LCR(uart, val);
1010 #endif
1011
1012                 dll = UART_GET_DLL(uart);
1013                 dlh = UART_GET_DLH(uart);
1014
1015 #ifndef CONFIG_BF54x
1016                 /* Clear DLAB in LCR to Access THR RBR IER */
1017                 val = UART_GET_LCR(uart);
1018                 val &= ~DLAB;
1019                 UART_PUT_LCR(uart, val);
1020 #endif
1021
1022                 *baud = get_sclk() / (16*(dll | dlh << 8));
1023         }
1024         pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __FUNCTION__, *baud, *parity, *bits);
1025 }
1026 #endif
1027
1028 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1029 static struct uart_driver bfin_serial_reg;
1030
1031 static int __init
1032 bfin_serial_console_setup(struct console *co, char *options)
1033 {
1034         struct bfin_serial_port *uart;
1035 # ifdef CONFIG_SERIAL_BFIN_CONSOLE
1036         int baud = 57600;
1037         int bits = 8;
1038         int parity = 'n';
1039 #  ifdef CONFIG_SERIAL_BFIN_CTSRTS
1040         int flow = 'r';
1041 #  else
1042         int flow = 'n';
1043 #  endif
1044 # endif
1045
1046         /*
1047          * Check whether an invalid uart number has been specified, and
1048          * if so, search for the first available port that does have
1049          * console support.
1050          */
1051         if (co->index == -1 || co->index >= nr_ports)
1052                 co->index = 0;
1053         uart = &bfin_serial_ports[co->index];
1054
1055 # ifdef CONFIG_SERIAL_BFIN_CONSOLE
1056         if (options)
1057                 uart_parse_options(options, &baud, &parity, &bits, &flow);
1058         else
1059                 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
1060
1061         return uart_set_options(&uart->port, co, baud, parity, bits, flow);
1062 # else
1063         return 0;
1064 # endif
1065 }
1066 #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
1067                                  defined (CONFIG_EARLY_PRINTK) */
1068
1069 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1070 static void bfin_serial_console_putchar(struct uart_port *port, int ch)
1071 {
1072         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1073         while (!(UART_GET_LSR(uart) & THRE))
1074                 barrier();
1075         UART_PUT_CHAR(uart, ch);
1076         SSYNC();
1077 }
1078
1079 /*
1080  * Interrupts are disabled on entering
1081  */
1082 static void
1083 bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
1084 {
1085         struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
1086         int flags = 0;
1087
1088         spin_lock_irqsave(&uart->port.lock, flags);
1089         uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
1090         spin_unlock_irqrestore(&uart->port.lock, flags);
1091
1092 }
1093
1094 static struct console bfin_serial_console = {
1095         .name           = BFIN_SERIAL_NAME,
1096         .write          = bfin_serial_console_write,
1097         .device         = uart_console_device,
1098         .setup          = bfin_serial_console_setup,
1099         .flags          = CON_PRINTBUFFER,
1100         .index          = -1,
1101         .data           = &bfin_serial_reg,
1102 };
1103
1104 static int __init bfin_serial_rs_console_init(void)
1105 {
1106         bfin_serial_init_ports();
1107         register_console(&bfin_serial_console);
1108 #ifdef CONFIG_KGDB_UART
1109         kgdb_entry_state = 0;
1110         init_kgdb_uart();
1111 #endif
1112         return 0;
1113 }
1114 console_initcall(bfin_serial_rs_console_init);
1115
1116 #define BFIN_SERIAL_CONSOLE     &bfin_serial_console
1117 #else
1118 #define BFIN_SERIAL_CONSOLE     NULL
1119 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1120
1121
1122 #ifdef CONFIG_EARLY_PRINTK
1123 static __init void early_serial_putc(struct uart_port *port, int ch)
1124 {
1125         unsigned timeout = 0xffff;
1126         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1127
1128         while ((!(UART_GET_LSR(uart) & THRE)) && --timeout)
1129                 cpu_relax();
1130         UART_PUT_CHAR(uart, ch);
1131 }
1132
1133 static __init void early_serial_write(struct console *con, const char *s,
1134                                         unsigned int n)
1135 {
1136         struct bfin_serial_port *uart = &bfin_serial_ports[con->index];
1137         unsigned int i;
1138
1139         for (i = 0; i < n; i++, s++) {
1140                 if (*s == '\n')
1141                         early_serial_putc(&uart->port, '\r');
1142                 early_serial_putc(&uart->port, *s);
1143         }
1144 }
1145
1146 static struct __init console bfin_early_serial_console = {
1147         .name = "early_BFuart",
1148         .write = early_serial_write,
1149         .device = uart_console_device,
1150         .flags = CON_PRINTBUFFER,
1151         .setup = bfin_serial_console_setup,
1152         .index = -1,
1153         .data  = &bfin_serial_reg,
1154 };
1155
1156 struct console __init *bfin_earlyserial_init(unsigned int port,
1157                                                 unsigned int cflag)
1158 {
1159         struct bfin_serial_port *uart;
1160         struct ktermios t;
1161
1162         if (port == -1 || port >= nr_ports)
1163                 port = 0;
1164         bfin_serial_init_ports();
1165         bfin_early_serial_console.index = port;
1166         uart = &bfin_serial_ports[port];
1167         t.c_cflag = cflag;
1168         t.c_iflag = 0;
1169         t.c_oflag = 0;
1170         t.c_lflag = ICANON;
1171         t.c_line = port;
1172         bfin_serial_set_termios(&uart->port, &t, &t);
1173         return &bfin_early_serial_console;
1174 }
1175
1176 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1177
1178 static struct uart_driver bfin_serial_reg = {
1179         .owner                  = THIS_MODULE,
1180         .driver_name            = "bfin-uart",
1181         .dev_name               = BFIN_SERIAL_NAME,
1182         .major                  = BFIN_SERIAL_MAJOR,
1183         .minor                  = BFIN_SERIAL_MINOR,
1184         .nr                     = NR_PORTS,
1185         .cons                   = BFIN_SERIAL_CONSOLE,
1186 };
1187
1188 static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
1189 {
1190         struct bfin_serial_port *uart = platform_get_drvdata(dev);
1191
1192         if (uart)
1193                 uart_suspend_port(&bfin_serial_reg, &uart->port);
1194
1195         return 0;
1196 }
1197
1198 static int bfin_serial_resume(struct platform_device *dev)
1199 {
1200         struct bfin_serial_port *uart = platform_get_drvdata(dev);
1201
1202         if (uart)
1203                 uart_resume_port(&bfin_serial_reg, &uart->port);
1204
1205         return 0;
1206 }
1207
1208 static int bfin_serial_probe(struct platform_device *dev)
1209 {
1210         struct resource *res = dev->resource;
1211         int i;
1212
1213         for (i = 0; i < dev->num_resources; i++, res++)
1214                 if (res->flags & IORESOURCE_MEM)
1215                         break;
1216
1217         if (i < dev->num_resources) {
1218                 for (i = 0; i < nr_ports; i++, res++) {
1219                         if (bfin_serial_ports[i].port.mapbase != res->start)
1220                                 continue;
1221                         bfin_serial_ports[i].port.dev = &dev->dev;
1222                         uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1223                         platform_set_drvdata(dev, &bfin_serial_ports[i]);
1224                 }
1225         }
1226
1227         return 0;
1228 }
1229
1230 static int bfin_serial_remove(struct platform_device *pdev)
1231 {
1232         struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1233
1234
1235 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
1236         gpio_free(uart->cts_pin);
1237         gpio_free(uart->rts_pin);
1238 #endif
1239
1240         platform_set_drvdata(pdev, NULL);
1241
1242         if (uart)
1243                 uart_remove_one_port(&bfin_serial_reg, &uart->port);
1244
1245         return 0;
1246 }
1247
1248 static struct platform_driver bfin_serial_driver = {
1249         .probe          = bfin_serial_probe,
1250         .remove         = bfin_serial_remove,
1251         .suspend        = bfin_serial_suspend,
1252         .resume         = bfin_serial_resume,
1253         .driver         = {
1254                 .name   = "bfin-uart",
1255         },
1256 };
1257
1258 static int __init bfin_serial_init(void)
1259 {
1260         int ret;
1261 #ifdef CONFIG_KGDB_UART
1262         struct bfin_serial_port *uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
1263         struct ktermios t;
1264 #endif
1265
1266         pr_info("Serial: Blackfin serial driver\n");
1267
1268         bfin_serial_init_ports();
1269
1270         ret = uart_register_driver(&bfin_serial_reg);
1271         if (ret == 0) {
1272                 ret = platform_driver_register(&bfin_serial_driver);
1273                 if (ret) {
1274                         pr_debug("uart register failed\n");
1275                         uart_unregister_driver(&bfin_serial_reg);
1276                 }
1277         }
1278 #ifdef CONFIG_KGDB_UART
1279         if (uart->port.cons->index != CONFIG_KGDB_UART_PORT) {
1280                 request_irq(uart->port.irq, bfin_serial_rx_int,
1281                         IRQF_DISABLED, "BFIN_UART_RX", uart);
1282                 pr_info("Request irq for kgdb uart port\n");
1283 #ifdef CONFIG_BF54x
1284                 UART_SET_IER(uart, ERBFI);
1285 #else
1286                 UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
1287 #endif
1288                 SSYNC();
1289                 t.c_cflag = CS8|B57600;
1290                 t.c_iflag = 0;
1291                 t.c_oflag = 0;
1292                 t.c_lflag = ICANON;
1293                 t.c_line = CONFIG_KGDB_UART_PORT;
1294                 bfin_serial_set_termios(&uart->port, &t, &t);
1295         }
1296 #endif
1297         return ret;
1298 }
1299
1300 static void __exit bfin_serial_exit(void)
1301 {
1302         platform_driver_unregister(&bfin_serial_driver);
1303         uart_unregister_driver(&bfin_serial_reg);
1304 }
1305
1306 module_init(bfin_serial_init);
1307 module_exit(bfin_serial_exit);
1308
1309 MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
1310 MODULE_DESCRIPTION("Blackfin generic serial port driver");
1311 MODULE_LICENSE("GPL");
1312 MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);