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blackfin: Fix tty compile error in PIO mode
[linux-2.6-omap-h63xx.git] / drivers / serial / bfin_5xx.c
1 /*
2  * Blackfin On-Chip Serial Driver
3  *
4  * Copyright 2006-2008 Analog Devices Inc.
5  *
6  * Enter bugs at http://blackfin.uclinux.org/
7  *
8  * Licensed under the GPL-2 or later.
9  */
10
11 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
12 #define SUPPORT_SYSRQ
13 #endif
14
15 #include <linux/module.h>
16 #include <linux/ioport.h>
17 #include <linux/init.h>
18 #include <linux/console.h>
19 #include <linux/sysrq.h>
20 #include <linux/platform_device.h>
21 #include <linux/tty.h>
22 #include <linux/tty_flip.h>
23 #include <linux/serial_core.h>
24
25 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
26         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
27 #include <linux/kgdb.h>
28 #include <asm/irq_regs.h>
29 #endif
30
31 #include <asm/gpio.h>
32 #include <mach/bfin_serial_5xx.h>
33
34 #ifdef CONFIG_SERIAL_BFIN_DMA
35 #include <linux/dma-mapping.h>
36 #include <asm/io.h>
37 #include <asm/irq.h>
38 #include <asm/cacheflush.h>
39 #endif
40
41 /* UART name and device definitions */
42 #define BFIN_SERIAL_NAME        "ttyBF"
43 #define BFIN_SERIAL_MAJOR       204
44 #define BFIN_SERIAL_MINOR       64
45
46 static struct bfin_serial_port bfin_serial_ports[BFIN_UART_NR_PORTS];
47 static int nr_active_ports = ARRAY_SIZE(bfin_serial_resource);
48
49 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
50         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
51
52 # ifndef CONFIG_SERIAL_BFIN_PIO
53 #  error KGDB only support UART in PIO mode.
54 # endif
55
56 static int kgdboc_port_line;
57 static int kgdboc_break_enabled;
58 #endif
59 /*
60  * Setup for console. Argument comes from the menuconfig
61  */
62 #define DMA_RX_XCOUNT           512
63 #define DMA_RX_YCOUNT           (PAGE_SIZE / DMA_RX_XCOUNT)
64
65 #define DMA_RX_FLUSH_JIFFIES    (HZ / 50)
66 #define CTS_CHECK_JIFFIES       (HZ / 50)
67
68 #ifdef CONFIG_SERIAL_BFIN_DMA
69 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
70 #else
71 static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
72 #endif
73
74 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
75
76 static void bfin_serial_reset_irda(struct uart_port *port);
77
78 /*
79  * interrupts are disabled on entry
80  */
81 static void bfin_serial_stop_tx(struct uart_port *port)
82 {
83         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
84 #ifdef CONFIG_SERIAL_BFIN_DMA
85         struct circ_buf *xmit = &uart->port.info->xmit;
86 #endif
87
88         while (!(UART_GET_LSR(uart) & TEMT))
89                 cpu_relax();
90
91 #ifdef CONFIG_SERIAL_BFIN_DMA
92         disable_dma(uart->tx_dma_channel);
93         xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
94         uart->port.icount.tx += uart->tx_count;
95         uart->tx_count = 0;
96         uart->tx_done = 1;
97 #else
98 #ifdef CONFIG_BF54x
99         /* Clear TFI bit */
100         UART_PUT_LSR(uart, TFI);
101 #endif
102         UART_CLEAR_IER(uart, ETBEI);
103 #endif
104 }
105
106 /*
107  * port is locked and interrupts are disabled
108  */
109 static void bfin_serial_start_tx(struct uart_port *port)
110 {
111         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
112         struct tty_struct *tty = uart->port.info->port.tty;
113
114         /*
115          * To avoid losting RX interrupt, we reset IR function
116          * before sending data.
117          */
118         if (tty->termios->c_line == N_IRDA)
119                 bfin_serial_reset_irda(port);
120
121 #ifdef CONFIG_SERIAL_BFIN_DMA
122         if (uart->tx_done)
123                 bfin_serial_dma_tx_chars(uart);
124 #else
125         UART_SET_IER(uart, ETBEI);
126         bfin_serial_tx_chars(uart);
127 #endif
128 }
129
130 /*
131  * Interrupts are enabled
132  */
133 static void bfin_serial_stop_rx(struct uart_port *port)
134 {
135         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
136
137         UART_CLEAR_IER(uart, ERBFI);
138 }
139
140 /*
141  * Set the modem control timer to fire immediately.
142  */
143 static void bfin_serial_enable_ms(struct uart_port *port)
144 {
145 }
146
147
148 #if ANOMALY_05000363 && defined(CONFIG_SERIAL_BFIN_PIO)
149 # define UART_GET_ANOMALY_THRESHOLD(uart)    ((uart)->anomaly_threshold)
150 # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
151 #else
152 # define UART_GET_ANOMALY_THRESHOLD(uart)    0
153 # define UART_SET_ANOMALY_THRESHOLD(uart, v)
154 #endif
155
156 #ifdef CONFIG_SERIAL_BFIN_PIO
157 static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
158 {
159         struct tty_struct *tty = NULL;
160         unsigned int status, ch, flg;
161         static struct timeval anomaly_start = { .tv_sec = 0 };
162
163         status = UART_GET_LSR(uart);
164         UART_CLEAR_LSR(uart);
165
166         ch = UART_GET_CHAR(uart);
167         uart->port.icount.rx++;
168
169 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
170         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
171         if (kgdb_connected && kgdboc_port_line == uart->port.line)
172                 if (ch == 0x3) {/* Ctrl + C */
173                         kgdb_breakpoint();
174                         return;
175                 }
176
177         if (!uart->port.info || !uart->port.info->port.tty)
178                 return;
179 #endif
180         tty = uart->port.info->port.tty;
181
182         if (ANOMALY_05000363) {
183                 /* The BF533 (and BF561) family of processors have a nice anomaly
184                  * where they continuously generate characters for a "single" break.
185                  * We have to basically ignore this flood until the "next" valid
186                  * character comes across.  Due to the nature of the flood, it is
187                  * not possible to reliably catch bytes that are sent too quickly
188                  * after this break.  So application code talking to the Blackfin
189                  * which sends a break signal must allow at least 1.5 character
190                  * times after the end of the break for things to stabilize.  This
191                  * timeout was picked as it must absolutely be larger than 1
192                  * character time +/- some percent.  So 1.5 sounds good.  All other
193                  * Blackfin families operate properly.  Woo.
194                  */
195                 if (anomaly_start.tv_sec) {
196                         struct timeval curr;
197                         suseconds_t usecs;
198
199                         if ((~ch & (~ch + 1)) & 0xff)
200                                 goto known_good_char;
201
202                         do_gettimeofday(&curr);
203                         if (curr.tv_sec - anomaly_start.tv_sec > 1)
204                                 goto known_good_char;
205
206                         usecs = 0;
207                         if (curr.tv_sec != anomaly_start.tv_sec)
208                                 usecs += USEC_PER_SEC;
209                         usecs += curr.tv_usec - anomaly_start.tv_usec;
210
211                         if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
212                                 goto known_good_char;
213
214                         if (ch)
215                                 anomaly_start.tv_sec = 0;
216                         else
217                                 anomaly_start = curr;
218
219                         return;
220
221  known_good_char:
222                         status &= ~BI;
223                         anomaly_start.tv_sec = 0;
224                 }
225         }
226
227         if (status & BI) {
228                 if (ANOMALY_05000363)
229                         if (bfin_revid() < 5)
230                                 do_gettimeofday(&anomaly_start);
231                 uart->port.icount.brk++;
232                 if (uart_handle_break(&uart->port))
233                         goto ignore_char;
234                 status &= ~(PE | FE);
235         }
236         if (status & PE)
237                 uart->port.icount.parity++;
238         if (status & OE)
239                 uart->port.icount.overrun++;
240         if (status & FE)
241                 uart->port.icount.frame++;
242
243         status &= uart->port.read_status_mask;
244
245         if (status & BI)
246                 flg = TTY_BREAK;
247         else if (status & PE)
248                 flg = TTY_PARITY;
249         else if (status & FE)
250                 flg = TTY_FRAME;
251         else
252                 flg = TTY_NORMAL;
253
254         if (uart_handle_sysrq_char(&uart->port, ch))
255                 goto ignore_char;
256
257         uart_insert_char(&uart->port, status, OE, ch, flg);
258
259  ignore_char:
260         tty_flip_buffer_push(tty);
261 }
262
263 static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
264 {
265         struct circ_buf *xmit = &uart->port.info->xmit;
266
267         /*
268          * Check the modem control lines before
269          * transmitting anything.
270          */
271         bfin_serial_mctrl_check(uart);
272
273         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
274 #ifdef CONFIG_BF54x
275                 /* Clear TFI bit */
276                 UART_PUT_LSR(uart, TFI);
277 #endif
278                 UART_CLEAR_IER(uart, ETBEI);
279                 return;
280         }
281
282         if (uart->port.x_char) {
283                 UART_PUT_CHAR(uart, uart->port.x_char);
284                 uart->port.icount.tx++;
285                 uart->port.x_char = 0;
286         }
287
288         while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
289                 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
290                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
291                 uart->port.icount.tx++;
292                 SSYNC();
293         }
294
295         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
296                 uart_write_wakeup(&uart->port);
297 }
298
299 static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
300 {
301         struct bfin_serial_port *uart = dev_id;
302
303         spin_lock(&uart->port.lock);
304         while (UART_GET_LSR(uart) & DR)
305                 bfin_serial_rx_chars(uart);
306         spin_unlock(&uart->port.lock);
307
308         return IRQ_HANDLED;
309 }
310
311 static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
312 {
313         struct bfin_serial_port *uart = dev_id;
314
315         spin_lock(&uart->port.lock);
316         if (UART_GET_LSR(uart) & THRE)
317                 bfin_serial_tx_chars(uart);
318         spin_unlock(&uart->port.lock);
319
320         return IRQ_HANDLED;
321 }
322 #endif
323
324 #ifdef CONFIG_SERIAL_BFIN_DMA
325 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
326 {
327         struct circ_buf *xmit = &uart->port.info->xmit;
328
329         uart->tx_done = 0;
330
331         /*
332          * Check the modem control lines before
333          * transmitting anything.
334          */
335         bfin_serial_mctrl_check(uart);
336
337         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
338                 uart->tx_count = 0;
339                 uart->tx_done = 1;
340                 return;
341         }
342
343         if (uart->port.x_char) {
344                 UART_PUT_CHAR(uart, uart->port.x_char);
345                 uart->port.icount.tx++;
346                 uart->port.x_char = 0;
347         }
348
349         uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
350         if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
351                 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
352         blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
353                                         (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
354         set_dma_config(uart->tx_dma_channel,
355                 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
356                         INTR_ON_BUF,
357                         DIMENSION_LINEAR,
358                         DATA_SIZE_8,
359                         DMA_SYNC_RESTART));
360         set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
361         set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
362         set_dma_x_modify(uart->tx_dma_channel, 1);
363         enable_dma(uart->tx_dma_channel);
364
365         UART_SET_IER(uart, ETBEI);
366 }
367
368 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
369 {
370         struct tty_struct *tty = uart->port.info->port.tty;
371         int i, flg, status;
372
373         status = UART_GET_LSR(uart);
374         UART_CLEAR_LSR(uart);
375
376         uart->port.icount.rx +=
377                 CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
378                 UART_XMIT_SIZE);
379
380         if (status & BI) {
381                 uart->port.icount.brk++;
382                 if (uart_handle_break(&uart->port))
383                         goto dma_ignore_char;
384                 status &= ~(PE | FE);
385         }
386         if (status & PE)
387                 uart->port.icount.parity++;
388         if (status & OE)
389                 uart->port.icount.overrun++;
390         if (status & FE)
391                 uart->port.icount.frame++;
392
393         status &= uart->port.read_status_mask;
394
395         if (status & BI)
396                 flg = TTY_BREAK;
397         else if (status & PE)
398                 flg = TTY_PARITY;
399         else if (status & FE)
400                 flg = TTY_FRAME;
401         else
402                 flg = TTY_NORMAL;
403
404         for (i = uart->rx_dma_buf.tail; i != uart->rx_dma_buf.head; i++) {
405                 if (i >= UART_XMIT_SIZE)
406                         i = 0;
407                 if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
408                         uart_insert_char(&uart->port, status, OE,
409                                 uart->rx_dma_buf.buf[i], flg);
410         }
411
412  dma_ignore_char:
413         tty_flip_buffer_push(tty);
414 }
415
416 void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
417 {
418         int x_pos, pos;
419         unsigned long flags;
420
421         spin_lock_irqsave(&uart->port.lock, flags);
422
423         uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
424         x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
425         uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
426         if (uart->rx_dma_nrows == DMA_RX_YCOUNT)
427                 uart->rx_dma_nrows = 0;
428         x_pos = DMA_RX_XCOUNT - x_pos;
429         if (x_pos == DMA_RX_XCOUNT)
430                 x_pos = 0;
431
432         pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
433         if (pos != uart->rx_dma_buf.tail) {
434                 uart->rx_dma_buf.head = pos;
435                 bfin_serial_dma_rx_chars(uart);
436                 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
437         }
438
439         spin_unlock_irqrestore(&uart->port.lock, flags);
440
441         mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES);
442 }
443
444 static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
445 {
446         struct bfin_serial_port *uart = dev_id;
447         struct circ_buf *xmit = &uart->port.info->xmit;
448
449         spin_lock(&uart->port.lock);
450         if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
451                 disable_dma(uart->tx_dma_channel);
452                 clear_dma_irqstat(uart->tx_dma_channel);
453                 UART_CLEAR_IER(uart, ETBEI);
454                 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
455                 uart->port.icount.tx += uart->tx_count;
456
457                 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
458                         uart_write_wakeup(&uart->port);
459
460                 bfin_serial_dma_tx_chars(uart);
461         }
462
463         spin_unlock(&uart->port.lock);
464         return IRQ_HANDLED;
465 }
466
467 static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
468 {
469         struct bfin_serial_port *uart = dev_id;
470         unsigned short irqstat;
471
472         spin_lock(&uart->port.lock);
473         irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
474         clear_dma_irqstat(uart->rx_dma_channel);
475         bfin_serial_dma_rx_chars(uart);
476         spin_unlock(&uart->port.lock);
477
478         return IRQ_HANDLED;
479 }
480 #endif
481
482 /*
483  * Return TIOCSER_TEMT when transmitter is not busy.
484  */
485 static unsigned int bfin_serial_tx_empty(struct uart_port *port)
486 {
487         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
488         unsigned short lsr;
489
490         lsr = UART_GET_LSR(uart);
491         if (lsr & TEMT)
492                 return TIOCSER_TEMT;
493         else
494                 return 0;
495 }
496
497 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
498 {
499 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
500         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
501         if (uart->cts_pin < 0)
502                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
503
504         if (UART_GET_CTS(uart))
505                 return TIOCM_DSR | TIOCM_CAR;
506         else
507 #endif
508                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
509 }
510
511 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
512 {
513 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
514         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
515         if (uart->rts_pin < 0)
516                 return;
517
518         if (mctrl & TIOCM_RTS)
519                 UART_CLEAR_RTS(uart);
520         else
521                 UART_SET_RTS(uart);
522 #endif
523 }
524
525 /*
526  * Handle any change of modem status signal since we were last called.
527  */
528 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
529 {
530 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
531         unsigned int status;
532         struct uart_info *info = uart->port.info;
533         struct tty_struct *tty = info->port.tty;
534
535         status = bfin_serial_get_mctrl(&uart->port);
536         uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
537         if (!(status & TIOCM_CTS)) {
538                 tty->hw_stopped = 1;
539                 uart->cts_timer.data = (unsigned long)(uart);
540                 uart->cts_timer.function = (void *)bfin_serial_mctrl_check;
541                 uart->cts_timer.expires = jiffies + CTS_CHECK_JIFFIES;
542                 add_timer(&(uart->cts_timer));
543         } else {
544                 tty->hw_stopped = 0;
545         }
546 #endif
547 }
548
549 /*
550  * Interrupts are always disabled.
551  */
552 static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
553 {
554         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
555         u16 lcr = UART_GET_LCR(uart);
556         if (break_state)
557                 lcr |= SB;
558         else
559                 lcr &= ~SB;
560         UART_PUT_LCR(uart, lcr);
561         SSYNC();
562 }
563
564 static int bfin_serial_startup(struct uart_port *port)
565 {
566         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
567
568 #ifdef CONFIG_SERIAL_BFIN_DMA
569         dma_addr_t dma_handle;
570
571         if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
572                 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
573                 return -EBUSY;
574         }
575
576         if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
577                 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
578                 free_dma(uart->rx_dma_channel);
579                 return -EBUSY;
580         }
581
582         set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
583         set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
584
585         uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
586         uart->rx_dma_buf.head = 0;
587         uart->rx_dma_buf.tail = 0;
588         uart->rx_dma_nrows = 0;
589
590         set_dma_config(uart->rx_dma_channel,
591                 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
592                                 INTR_ON_ROW, DIMENSION_2D,
593                                 DATA_SIZE_8,
594                                 DMA_SYNC_RESTART));
595         set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
596         set_dma_x_modify(uart->rx_dma_channel, 1);
597         set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
598         set_dma_y_modify(uart->rx_dma_channel, 1);
599         set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
600         enable_dma(uart->rx_dma_channel);
601
602         uart->rx_dma_timer.data = (unsigned long)(uart);
603         uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
604         uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
605         add_timer(&(uart->rx_dma_timer));
606 #else
607 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
608         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
609         if (kgdboc_port_line == uart->port.line && kgdboc_break_enabled)
610                 kgdboc_break_enabled = 0;
611         else {
612 # endif
613         if (request_irq(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
614              "BFIN_UART_RX", uart)) {
615                 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
616                 return -EBUSY;
617         }
618
619         if (request_irq
620             (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
621              "BFIN_UART_TX", uart)) {
622                 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
623                 free_irq(uart->port.irq, uart);
624                 return -EBUSY;
625         }
626
627 # ifdef CONFIG_BF54x
628         {
629                 unsigned uart_dma_ch_rx, uart_dma_ch_tx;
630
631                 switch (uart->port.irq) {
632                 case IRQ_UART3_RX:
633                         uart_dma_ch_rx = CH_UART3_RX;
634                         uart_dma_ch_tx = CH_UART3_TX;
635                         break;
636                 case IRQ_UART2_RX:
637                         uart_dma_ch_rx = CH_UART2_RX;
638                         uart_dma_ch_tx = CH_UART2_TX;
639                         break;
640                 default:
641                         uart_dma_ch_rx = uart_dma_ch_tx = 0;
642                         break;
643                 };
644
645                 if (uart_dma_ch_rx &&
646                         request_dma(uart_dma_ch_rx, "BFIN_UART_RX") < 0) {
647                         printk(KERN_NOTICE"Fail to attach UART interrupt\n");
648                         free_irq(uart->port.irq, uart);
649                         free_irq(uart->port.irq + 1, uart);
650                         return -EBUSY;
651                 }
652                 if (uart_dma_ch_tx &&
653                         request_dma(uart_dma_ch_tx, "BFIN_UART_TX") < 0) {
654                         printk(KERN_NOTICE "Fail to attach UART interrupt\n");
655                         free_dma(uart_dma_ch_rx);
656                         free_irq(uart->port.irq, uart);
657                         free_irq(uart->port.irq + 1, uart);
658                         return -EBUSY;
659                 }
660         }
661 # endif
662 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
663         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
664         }
665 # endif
666 #endif
667         UART_SET_IER(uart, ERBFI);
668         return 0;
669 }
670
671 static void bfin_serial_shutdown(struct uart_port *port)
672 {
673         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
674
675 #ifdef CONFIG_SERIAL_BFIN_DMA
676         disable_dma(uart->tx_dma_channel);
677         free_dma(uart->tx_dma_channel);
678         disable_dma(uart->rx_dma_channel);
679         free_dma(uart->rx_dma_channel);
680         del_timer(&(uart->rx_dma_timer));
681         dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
682 #else
683 #ifdef CONFIG_BF54x
684         switch (uart->port.irq) {
685         case IRQ_UART3_RX:
686                 free_dma(CH_UART3_RX);
687                 free_dma(CH_UART3_TX);
688                 break;
689         case IRQ_UART2_RX:
690                 free_dma(CH_UART2_RX);
691                 free_dma(CH_UART2_TX);
692                 break;
693         default:
694                 break;
695         };
696 #endif
697         free_irq(uart->port.irq, uart);
698         free_irq(uart->port.irq+1, uart);
699 #endif
700 }
701
702 static void
703 bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
704                    struct ktermios *old)
705 {
706         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
707         unsigned long flags;
708         unsigned int baud, quot;
709         unsigned short val, ier, lcr = 0;
710
711         switch (termios->c_cflag & CSIZE) {
712         case CS8:
713                 lcr = WLS(8);
714                 break;
715         case CS7:
716                 lcr = WLS(7);
717                 break;
718         case CS6:
719                 lcr = WLS(6);
720                 break;
721         case CS5:
722                 lcr = WLS(5);
723                 break;
724         default:
725                 printk(KERN_ERR "%s: word lengh not supported\n",
726                         __func__);
727         }
728
729         if (termios->c_cflag & CSTOPB)
730                 lcr |= STB;
731         if (termios->c_cflag & PARENB)
732                 lcr |= PEN;
733         if (!(termios->c_cflag & PARODD))
734                 lcr |= EPS;
735         if (termios->c_cflag & CMSPAR)
736                 lcr |= STP;
737
738         port->read_status_mask = OE;
739         if (termios->c_iflag & INPCK)
740                 port->read_status_mask |= (FE | PE);
741         if (termios->c_iflag & (BRKINT | PARMRK))
742                 port->read_status_mask |= BI;
743
744         /*
745          * Characters to ignore
746          */
747         port->ignore_status_mask = 0;
748         if (termios->c_iflag & IGNPAR)
749                 port->ignore_status_mask |= FE | PE;
750         if (termios->c_iflag & IGNBRK) {
751                 port->ignore_status_mask |= BI;
752                 /*
753                  * If we're ignoring parity and break indicators,
754                  * ignore overruns too (for real raw support).
755                  */
756                 if (termios->c_iflag & IGNPAR)
757                         port->ignore_status_mask |= OE;
758         }
759
760         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
761         quot = uart_get_divisor(port, baud);
762         spin_lock_irqsave(&uart->port.lock, flags);
763
764         UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
765
766         /* Disable UART */
767         ier = UART_GET_IER(uart);
768         UART_DISABLE_INTS(uart);
769
770         /* Set DLAB in LCR to Access DLL and DLH */
771         UART_SET_DLAB(uart);
772
773         UART_PUT_DLL(uart, quot & 0xFF);
774         UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
775         SSYNC();
776
777         /* Clear DLAB in LCR to Access THR RBR IER */
778         UART_CLEAR_DLAB(uart);
779
780         UART_PUT_LCR(uart, lcr);
781
782         /* Enable UART */
783         UART_ENABLE_INTS(uart, ier);
784
785         val = UART_GET_GCTL(uart);
786         val |= UCEN;
787         UART_PUT_GCTL(uart, val);
788
789         /* Port speed changed, update the per-port timeout. */
790         uart_update_timeout(port, termios->c_cflag, baud);
791
792         spin_unlock_irqrestore(&uart->port.lock, flags);
793 }
794
795 static const char *bfin_serial_type(struct uart_port *port)
796 {
797         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
798
799         return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
800 }
801
802 /*
803  * Release the memory region(s) being used by 'port'.
804  */
805 static void bfin_serial_release_port(struct uart_port *port)
806 {
807 }
808
809 /*
810  * Request the memory region(s) being used by 'port'.
811  */
812 static int bfin_serial_request_port(struct uart_port *port)
813 {
814         return 0;
815 }
816
817 /*
818  * Configure/autoconfigure the port.
819  */
820 static void bfin_serial_config_port(struct uart_port *port, int flags)
821 {
822         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
823
824         if (flags & UART_CONFIG_TYPE &&
825             bfin_serial_request_port(&uart->port) == 0)
826                 uart->port.type = PORT_BFIN;
827 }
828
829 /*
830  * Verify the new serial_struct (for TIOCSSERIAL).
831  * The only change we allow are to the flags and type, and
832  * even then only between PORT_BFIN and PORT_UNKNOWN
833  */
834 static int
835 bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
836 {
837         return 0;
838 }
839
840 /*
841  * Enable the IrDA function if tty->ldisc.num is N_IRDA.
842  * In other cases, disable IrDA function.
843  */
844 static void bfin_serial_set_ldisc(struct uart_port *port)
845 {
846         int line = port->line;
847         unsigned short val;
848
849         if (line >= port->info->port.tty->driver->num)
850                 return;
851
852         switch (port->info->port.tty->termios->c_line) {
853         case N_IRDA:
854                 val = UART_GET_GCTL(&bfin_serial_ports[line]);
855                 val |= (IREN | RPOLC);
856                 UART_PUT_GCTL(&bfin_serial_ports[line], val);
857                 break;
858         default:
859                 val = UART_GET_GCTL(&bfin_serial_ports[line]);
860                 val &= ~(IREN | RPOLC);
861                 UART_PUT_GCTL(&bfin_serial_ports[line], val);
862         }
863 }
864
865 #ifdef CONFIG_CONSOLE_POLL
866 static void bfin_serial_poll_put_char(struct uart_port *port, unsigned char chr)
867 {
868         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
869
870         while (!(UART_GET_LSR(uart) & THRE))
871                 cpu_relax();
872
873         UART_CLEAR_DLAB(uart);
874         UART_PUT_CHAR(uart, (unsigned char)chr);
875 }
876
877 static int bfin_serial_poll_get_char(struct uart_port *port)
878 {
879         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
880         unsigned char chr;
881
882         while (!(UART_GET_LSR(uart) & DR))
883                 cpu_relax();
884
885         UART_CLEAR_DLAB(uart);
886         chr = UART_GET_CHAR(uart);
887
888         return chr;
889 }
890 #endif
891
892 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
893         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
894 static void bfin_kgdboc_port_shutdown(struct uart_port *port)
895 {
896         if (kgdboc_break_enabled) {
897                 kgdboc_break_enabled = 0;
898                 bfin_serial_shutdown(port);
899         }
900 }
901
902 static int bfin_kgdboc_port_startup(struct uart_port *port)
903 {
904         kgdboc_port_line = port->line;
905         kgdboc_break_enabled = !bfin_serial_startup(port);
906         return 0;
907 }
908 #endif
909
910 static void bfin_serial_reset_irda(struct uart_port *port)
911 {
912         int line = port->line;
913         unsigned short val;
914
915         val = UART_GET_GCTL(&bfin_serial_ports[line]);
916         val &= ~(IREN | RPOLC);
917         UART_PUT_GCTL(&bfin_serial_ports[line], val);
918         SSYNC();
919         val |= (IREN | RPOLC);
920         UART_PUT_GCTL(&bfin_serial_ports[line], val);
921         SSYNC();
922 }
923
924 static struct uart_ops bfin_serial_pops = {
925         .tx_empty       = bfin_serial_tx_empty,
926         .set_mctrl      = bfin_serial_set_mctrl,
927         .get_mctrl      = bfin_serial_get_mctrl,
928         .stop_tx        = bfin_serial_stop_tx,
929         .start_tx       = bfin_serial_start_tx,
930         .stop_rx        = bfin_serial_stop_rx,
931         .enable_ms      = bfin_serial_enable_ms,
932         .break_ctl      = bfin_serial_break_ctl,
933         .startup        = bfin_serial_startup,
934         .shutdown       = bfin_serial_shutdown,
935         .set_termios    = bfin_serial_set_termios,
936         .set_ldisc      = bfin_serial_set_ldisc,
937         .type           = bfin_serial_type,
938         .release_port   = bfin_serial_release_port,
939         .request_port   = bfin_serial_request_port,
940         .config_port    = bfin_serial_config_port,
941         .verify_port    = bfin_serial_verify_port,
942 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
943         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
944         .kgdboc_port_startup    = bfin_kgdboc_port_startup,
945         .kgdboc_port_shutdown   = bfin_kgdboc_port_shutdown,
946 #endif
947 #ifdef CONFIG_CONSOLE_POLL
948         .poll_put_char  = bfin_serial_poll_put_char,
949         .poll_get_char  = bfin_serial_poll_get_char,
950 #endif
951 };
952
953 static void __init bfin_serial_init_ports(void)
954 {
955         static int first = 1;
956         int i;
957
958         if (!first)
959                 return;
960         first = 0;
961
962         for (i = 0; i < nr_active_ports; i++) {
963                 bfin_serial_ports[i].port.uartclk   = get_sclk();
964                 bfin_serial_ports[i].port.fifosize  = BFIN_UART_TX_FIFO_SIZE;
965                 bfin_serial_ports[i].port.ops       = &bfin_serial_pops;
966                 bfin_serial_ports[i].port.line      = i;
967                 bfin_serial_ports[i].port.iotype    = UPIO_MEM;
968                 bfin_serial_ports[i].port.membase   =
969                         (void __iomem *)bfin_serial_resource[i].uart_base_addr;
970                 bfin_serial_ports[i].port.mapbase   =
971                         bfin_serial_resource[i].uart_base_addr;
972                 bfin_serial_ports[i].port.irq       =
973                         bfin_serial_resource[i].uart_irq;
974                 bfin_serial_ports[i].port.flags     = UPF_BOOT_AUTOCONF;
975 #ifdef CONFIG_SERIAL_BFIN_DMA
976                 bfin_serial_ports[i].tx_done        = 1;
977                 bfin_serial_ports[i].tx_count       = 0;
978                 bfin_serial_ports[i].tx_dma_channel =
979                         bfin_serial_resource[i].uart_tx_dma_channel;
980                 bfin_serial_ports[i].rx_dma_channel =
981                         bfin_serial_resource[i].uart_rx_dma_channel;
982                 init_timer(&(bfin_serial_ports[i].rx_dma_timer));
983 #endif
984 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
985                 init_timer(&(bfin_serial_ports[i].cts_timer));
986                 bfin_serial_ports[i].cts_pin        =
987                         bfin_serial_resource[i].uart_cts_pin;
988                 bfin_serial_ports[i].rts_pin        =
989                         bfin_serial_resource[i].uart_rts_pin;
990 #endif
991                 bfin_serial_hw_init(&bfin_serial_ports[i]);
992         }
993
994 }
995
996 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
997 /*
998  * If the port was already initialised (eg, by a boot loader),
999  * try to determine the current setup.
1000  */
1001 static void __init
1002 bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
1003                            int *parity, int *bits)
1004 {
1005         unsigned short status;
1006
1007         status = UART_GET_IER(uart) & (ERBFI | ETBEI);
1008         if (status == (ERBFI | ETBEI)) {
1009                 /* ok, the port was enabled */
1010                 u16 lcr, dlh, dll;
1011
1012                 lcr = UART_GET_LCR(uart);
1013
1014                 *parity = 'n';
1015                 if (lcr & PEN) {
1016                         if (lcr & EPS)
1017                                 *parity = 'e';
1018                         else
1019                                 *parity = 'o';
1020                 }
1021                 switch (lcr & 0x03) {
1022                         case 0: *bits = 5; break;
1023                         case 1: *bits = 6; break;
1024                         case 2: *bits = 7; break;
1025                         case 3: *bits = 8; break;
1026                 }
1027                 /* Set DLAB in LCR to Access DLL and DLH */
1028                 UART_SET_DLAB(uart);
1029
1030                 dll = UART_GET_DLL(uart);
1031                 dlh = UART_GET_DLH(uart);
1032
1033                 /* Clear DLAB in LCR to Access THR RBR IER */
1034                 UART_CLEAR_DLAB(uart);
1035
1036                 *baud = get_sclk() / (16*(dll | dlh << 8));
1037         }
1038         pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __func__, *baud, *parity, *bits);
1039 }
1040
1041 static struct uart_driver bfin_serial_reg;
1042
1043 static int __init
1044 bfin_serial_console_setup(struct console *co, char *options)
1045 {
1046         struct bfin_serial_port *uart;
1047         int baud = 57600;
1048         int bits = 8;
1049         int parity = 'n';
1050 # ifdef CONFIG_SERIAL_BFIN_CTSRTS
1051         int flow = 'r';
1052 # else
1053         int flow = 'n';
1054 # endif
1055
1056         /*
1057          * Check whether an invalid uart number has been specified, and
1058          * if so, search for the first available port that does have
1059          * console support.
1060          */
1061         if (co->index == -1 || co->index >= nr_active_ports)
1062                 co->index = 0;
1063         uart = &bfin_serial_ports[co->index];
1064
1065         if (options)
1066                 uart_parse_options(options, &baud, &parity, &bits, &flow);
1067         else
1068                 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
1069
1070         return uart_set_options(&uart->port, co, baud, parity, bits, flow);
1071 }
1072 #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
1073                                  defined (CONFIG_EARLY_PRINTK) */
1074
1075 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1076 static void bfin_serial_console_putchar(struct uart_port *port, int ch)
1077 {
1078         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1079         while (!(UART_GET_LSR(uart) & THRE))
1080                 barrier();
1081         UART_PUT_CHAR(uart, ch);
1082         SSYNC();
1083 }
1084
1085 /*
1086  * Interrupts are disabled on entering
1087  */
1088 static void
1089 bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
1090 {
1091         struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
1092         unsigned long flags;
1093
1094         spin_lock_irqsave(&uart->port.lock, flags);
1095         uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
1096         spin_unlock_irqrestore(&uart->port.lock, flags);
1097
1098 }
1099
1100 static struct console bfin_serial_console = {
1101         .name           = BFIN_SERIAL_NAME,
1102         .write          = bfin_serial_console_write,
1103         .device         = uart_console_device,
1104         .setup          = bfin_serial_console_setup,
1105         .flags          = CON_PRINTBUFFER,
1106         .index          = -1,
1107         .data           = &bfin_serial_reg,
1108 };
1109
1110 static int __init bfin_serial_rs_console_init(void)
1111 {
1112         bfin_serial_init_ports();
1113         register_console(&bfin_serial_console);
1114
1115         return 0;
1116 }
1117 console_initcall(bfin_serial_rs_console_init);
1118
1119 #define BFIN_SERIAL_CONSOLE     &bfin_serial_console
1120 #else
1121 #define BFIN_SERIAL_CONSOLE     NULL
1122 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1123
1124
1125 #ifdef CONFIG_EARLY_PRINTK
1126 static __init void early_serial_putc(struct uart_port *port, int ch)
1127 {
1128         unsigned timeout = 0xffff;
1129         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1130
1131         while ((!(UART_GET_LSR(uart) & THRE)) && --timeout)
1132                 cpu_relax();
1133         UART_PUT_CHAR(uart, ch);
1134 }
1135
1136 static __init void early_serial_write(struct console *con, const char *s,
1137                                         unsigned int n)
1138 {
1139         struct bfin_serial_port *uart = &bfin_serial_ports[con->index];
1140         unsigned int i;
1141
1142         for (i = 0; i < n; i++, s++) {
1143                 if (*s == '\n')
1144                         early_serial_putc(&uart->port, '\r');
1145                 early_serial_putc(&uart->port, *s);
1146         }
1147 }
1148
1149 static struct __initdata console bfin_early_serial_console = {
1150         .name = "early_BFuart",
1151         .write = early_serial_write,
1152         .device = uart_console_device,
1153         .flags = CON_PRINTBUFFER,
1154         .setup = bfin_serial_console_setup,
1155         .index = -1,
1156         .data  = &bfin_serial_reg,
1157 };
1158
1159 struct console __init *bfin_earlyserial_init(unsigned int port,
1160                                                 unsigned int cflag)
1161 {
1162         struct bfin_serial_port *uart;
1163         struct ktermios t;
1164
1165         if (port == -1 || port >= nr_active_ports)
1166                 port = 0;
1167         bfin_serial_init_ports();
1168         bfin_early_serial_console.index = port;
1169         uart = &bfin_serial_ports[port];
1170         t.c_cflag = cflag;
1171         t.c_iflag = 0;
1172         t.c_oflag = 0;
1173         t.c_lflag = ICANON;
1174         t.c_line = port;
1175         bfin_serial_set_termios(&uart->port, &t, &t);
1176         return &bfin_early_serial_console;
1177 }
1178
1179 #endif /* CONFIG_EARLY_PRINTK */
1180
1181 static struct uart_driver bfin_serial_reg = {
1182         .owner                  = THIS_MODULE,
1183         .driver_name            = "bfin-uart",
1184         .dev_name               = BFIN_SERIAL_NAME,
1185         .major                  = BFIN_SERIAL_MAJOR,
1186         .minor                  = BFIN_SERIAL_MINOR,
1187         .nr                     = BFIN_UART_NR_PORTS,
1188         .cons                   = BFIN_SERIAL_CONSOLE,
1189 };
1190
1191 static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
1192 {
1193         int i;
1194
1195         for (i = 0; i < nr_active_ports; i++) {
1196                 if (bfin_serial_ports[i].port.dev != &dev->dev)
1197                         continue;
1198                 uart_suspend_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1199         }
1200
1201         return 0;
1202 }
1203
1204 static int bfin_serial_resume(struct platform_device *dev)
1205 {
1206         int i;
1207
1208         for (i = 0; i < nr_active_ports; i++) {
1209                 if (bfin_serial_ports[i].port.dev != &dev->dev)
1210                         continue;
1211                 uart_resume_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1212         }
1213
1214         return 0;
1215 }
1216
1217 static int bfin_serial_probe(struct platform_device *dev)
1218 {
1219         struct resource *res = dev->resource;
1220         int i;
1221
1222         for (i = 0; i < dev->num_resources; i++, res++)
1223                 if (res->flags & IORESOURCE_MEM)
1224                         break;
1225
1226         if (i < dev->num_resources) {
1227                 for (i = 0; i < nr_active_ports; i++, res++) {
1228                         if (bfin_serial_ports[i].port.mapbase != res->start)
1229                                 continue;
1230                         bfin_serial_ports[i].port.dev = &dev->dev;
1231                         uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1232                 }
1233         }
1234
1235         return 0;
1236 }
1237
1238 static int bfin_serial_remove(struct platform_device *dev)
1239 {
1240         int i;
1241
1242         for (i = 0; i < nr_active_ports; i++) {
1243                 if (bfin_serial_ports[i].port.dev != &dev->dev)
1244                         continue;
1245                 uart_remove_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1246                 bfin_serial_ports[i].port.dev = NULL;
1247 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
1248                 gpio_free(bfin_serial_ports[i].cts_pin);
1249                 gpio_free(bfin_serial_ports[i].rts_pin);
1250 #endif
1251         }
1252
1253         return 0;
1254 }
1255
1256 static struct platform_driver bfin_serial_driver = {
1257         .probe          = bfin_serial_probe,
1258         .remove         = bfin_serial_remove,
1259         .suspend        = bfin_serial_suspend,
1260         .resume         = bfin_serial_resume,
1261         .driver         = {
1262                 .name   = "bfin-uart",
1263                 .owner  = THIS_MODULE,
1264         },
1265 };
1266
1267 static int __init bfin_serial_init(void)
1268 {
1269         int ret;
1270
1271         pr_info("Serial: Blackfin serial driver\n");
1272
1273         bfin_serial_init_ports();
1274
1275         ret = uart_register_driver(&bfin_serial_reg);
1276         if (ret == 0) {
1277                 ret = platform_driver_register(&bfin_serial_driver);
1278                 if (ret) {
1279                         pr_debug("uart register failed\n");
1280                         uart_unregister_driver(&bfin_serial_reg);
1281                 }
1282         }
1283         return ret;
1284 }
1285
1286 static void __exit bfin_serial_exit(void)
1287 {
1288         platform_driver_unregister(&bfin_serial_driver);
1289         uart_unregister_driver(&bfin_serial_reg);
1290 }
1291
1292
1293 module_init(bfin_serial_init);
1294 module_exit(bfin_serial_exit);
1295
1296 MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
1297 MODULE_DESCRIPTION("Blackfin generic serial port driver");
1298 MODULE_LICENSE("GPL");
1299 MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
1300 MODULE_ALIAS("platform:bfin-uart");