2 * linux/drivers/serial/imx.c
4 * Driver for Motorola IMX serial ports
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * Author: Sascha Hauer <sascha@saschahauer.de>
9 * Copyright (C) 2004 Pengutronix
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 * [29-Mar-2005] Mike Lee
26 * Added hardware handshake
29 #if defined(CONFIG_SERIAL_IMX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
33 #include <linux/module.h>
34 #include <linux/ioport.h>
35 #include <linux/init.h>
36 #include <linux/console.h>
37 #include <linux/sysrq.h>
38 #include <linux/platform_device.h>
39 #include <linux/tty.h>
40 #include <linux/tty_flip.h>
41 #include <linux/serial_core.h>
42 #include <linux/serial.h>
46 #include <asm/hardware.h>
47 #include <asm/arch/imx-uart.h>
49 /* We've been assigned a range on the "Low-density serial ports" major */
50 #define SERIAL_IMX_MAJOR 204
51 #define MINOR_START 41
55 #define IMX_ISR_PASS_LIMIT 256
58 * This is the size of our serial port register set.
60 #define UART_PORT_SIZE 0x100
63 * This determines how often we check the modem status signals
64 * for any change. They generally aren't connected to an IRQ
65 * so we have to poll them. We also check immediately before
66 * filling the TX fifo incase CTS has been dropped.
68 #define MCTRL_TIMEOUT (250*HZ/1000)
70 #define DRIVER_NAME "IMX-uart"
73 struct uart_port port;
74 struct timer_list timer;
75 unsigned int old_status;
76 int txirq,rxirq,rtsirq;
81 * Handle any change of modem status signal since we were last called.
83 static void imx_mctrl_check(struct imx_port *sport)
85 unsigned int status, changed;
87 status = sport->port.ops->get_mctrl(&sport->port);
88 changed = status ^ sport->old_status;
93 sport->old_status = status;
95 if (changed & TIOCM_RI)
96 sport->port.icount.rng++;
97 if (changed & TIOCM_DSR)
98 sport->port.icount.dsr++;
99 if (changed & TIOCM_CAR)
100 uart_handle_dcd_change(&sport->port, status & TIOCM_CAR);
101 if (changed & TIOCM_CTS)
102 uart_handle_cts_change(&sport->port, status & TIOCM_CTS);
104 wake_up_interruptible(&sport->port.info->delta_msr_wait);
108 * This is our per-port timeout handler, for checking the
109 * modem status signals.
111 static void imx_timeout(unsigned long data)
113 struct imx_port *sport = (struct imx_port *)data;
116 if (sport->port.info) {
117 spin_lock_irqsave(&sport->port.lock, flags);
118 imx_mctrl_check(sport);
119 spin_unlock_irqrestore(&sport->port.lock, flags);
121 mod_timer(&sport->timer, jiffies + MCTRL_TIMEOUT);
126 * interrupts disabled on entry
128 static void imx_stop_tx(struct uart_port *port)
130 struct imx_port *sport = (struct imx_port *)port;
131 UCR1((u32)sport->port.membase) &= ~UCR1_TXMPTYEN;
135 * interrupts disabled on entry
137 static void imx_stop_rx(struct uart_port *port)
139 struct imx_port *sport = (struct imx_port *)port;
140 UCR2((u32)sport->port.membase) &= ~UCR2_RXEN;
144 * Set the modem control timer to fire immediately.
146 static void imx_enable_ms(struct uart_port *port)
148 struct imx_port *sport = (struct imx_port *)port;
150 mod_timer(&sport->timer, jiffies);
153 static inline void imx_transmit_buffer(struct imx_port *sport)
155 struct circ_buf *xmit = &sport->port.info->xmit;
157 while (!(UTS((u32)sport->port.membase) & UTS_TXFULL)) {
158 /* send xmit->buf[xmit->tail]
159 * out the port here */
160 URTX0((u32)sport->port.membase) = xmit->buf[xmit->tail];
161 xmit->tail = (xmit->tail + 1) &
162 (UART_XMIT_SIZE - 1);
163 sport->port.icount.tx++;
164 if (uart_circ_empty(xmit))
168 if (uart_circ_empty(xmit))
169 imx_stop_tx(&sport->port);
173 * interrupts disabled on entry
175 static void imx_start_tx(struct uart_port *port)
177 struct imx_port *sport = (struct imx_port *)port;
179 UCR1((u32)sport->port.membase) |= UCR1_TXMPTYEN;
181 imx_transmit_buffer(sport);
184 static irqreturn_t imx_rtsint(int irq, void *dev_id)
186 struct imx_port *sport = (struct imx_port *)dev_id;
187 unsigned int val = USR1((u32)sport->port.membase)&USR1_RTSS;
190 spin_lock_irqsave(&sport->port.lock, flags);
192 USR1((u32)sport->port.membase) = USR1_RTSD;
193 uart_handle_cts_change(&sport->port, !!val);
194 wake_up_interruptible(&sport->port.info->delta_msr_wait);
196 spin_unlock_irqrestore(&sport->port.lock, flags);
200 static irqreturn_t imx_txint(int irq, void *dev_id)
202 struct imx_port *sport = (struct imx_port *)dev_id;
203 struct circ_buf *xmit = &sport->port.info->xmit;
206 spin_lock_irqsave(&sport->port.lock,flags);
207 if (sport->port.x_char)
210 URTX0((u32)sport->port.membase) = sport->port.x_char;
214 if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) {
215 imx_stop_tx(&sport->port);
219 imx_transmit_buffer(sport);
221 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
222 uart_write_wakeup(&sport->port);
225 spin_unlock_irqrestore(&sport->port.lock,flags);
229 static irqreturn_t imx_rxint(int irq, void *dev_id)
231 struct imx_port *sport = dev_id;
232 unsigned int rx,flg,ignored = 0;
233 struct tty_struct *tty = sport->port.info->tty;
236 rx = URXD0((u32)sport->port.membase);
237 spin_lock_irqsave(&sport->port.lock,flags);
241 sport->port.icount.rx++;
243 if( USR2((u32)sport->port.membase) & USR2_BRCD ) {
244 USR2((u32)sport->port.membase) |= USR2_BRCD;
245 if(uart_handle_break(&sport->port))
249 if (uart_handle_sysrq_char
250 (&sport->port, (unsigned char)rx))
253 if( rx & (URXD_PRERR | URXD_OVRRUN | URXD_FRMERR) )
257 tty_insert_flip_char(tty, rx, flg);
260 rx = URXD0((u32)sport->port.membase);
261 } while(rx & URXD_CHARRDY);
264 spin_unlock_irqrestore(&sport->port.lock,flags);
265 tty_flip_buffer_push(tty);
270 sport->port.icount.parity++;
271 else if (rx & URXD_FRMERR)
272 sport->port.icount.frame++;
273 if (rx & URXD_OVRRUN)
274 sport->port.icount.overrun++;
276 if (rx & sport->port.ignore_status_mask) {
282 rx &= sport->port.read_status_mask;
286 else if (rx & URXD_FRMERR)
288 if (rx & URXD_OVRRUN)
292 sport->port.sysrq = 0;
298 * Return TIOCSER_TEMT when transmitter is not busy.
300 static unsigned int imx_tx_empty(struct uart_port *port)
302 struct imx_port *sport = (struct imx_port *)port;
304 return USR2((u32)sport->port.membase) & USR2_TXDC ? TIOCSER_TEMT : 0;
308 * We have a modem side uart, so the meanings of RTS and CTS are inverted.
310 static unsigned int imx_get_mctrl(struct uart_port *port)
312 struct imx_port *sport = (struct imx_port *)port;
313 unsigned int tmp = TIOCM_DSR | TIOCM_CAR;
315 if (USR1((u32)sport->port.membase) & USR1_RTSS)
318 if (UCR2((u32)sport->port.membase) & UCR2_CTS)
324 static void imx_set_mctrl(struct uart_port *port, unsigned int mctrl)
326 struct imx_port *sport = (struct imx_port *)port;
328 if (mctrl & TIOCM_RTS)
329 UCR2((u32)sport->port.membase) |= UCR2_CTS;
331 UCR2((u32)sport->port.membase) &= ~UCR2_CTS;
335 * Interrupts always disabled.
337 static void imx_break_ctl(struct uart_port *port, int break_state)
339 struct imx_port *sport = (struct imx_port *)port;
342 spin_lock_irqsave(&sport->port.lock, flags);
344 if ( break_state != 0 )
345 UCR1((u32)sport->port.membase) |= UCR1_SNDBRK;
347 UCR1((u32)sport->port.membase) &= ~UCR1_SNDBRK;
349 spin_unlock_irqrestore(&sport->port.lock, flags);
352 #define TXTL 2 /* reset default */
353 #define RXTL 1 /* reset default */
355 static int imx_setup_ufcr(struct imx_port *sport, unsigned int mode)
358 unsigned int ufcr_rfdiv;
360 /* set receiver / transmitter trigger level.
361 * RFDIV is set such way to satisfy requested uartclk value
363 val = TXTL<<10 | RXTL;
364 ufcr_rfdiv = (imx_get_perclk1() + sport->port.uartclk / 2) / sport->port.uartclk;
372 ufcr_rfdiv = 6 - ufcr_rfdiv;
374 val |= UFCR_RFDIV & (ufcr_rfdiv << 7);
376 UFCR((u32)sport->port.membase) = val;
381 static int imx_startup(struct uart_port *port)
383 struct imx_port *sport = (struct imx_port *)port;
387 imx_setup_ufcr(sport, 0);
389 /* disable the DREN bit (Data Ready interrupt enable) before
392 UCR4((u32)sport->port.membase) &= ~UCR4_DREN;
397 retval = request_irq(sport->rxirq, imx_rxint, 0,
399 if (retval) goto error_out1;
401 retval = request_irq(sport->txirq, imx_txint, 0,
403 if (retval) goto error_out2;
405 retval = request_irq(sport->rtsirq, imx_rtsint,
406 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
408 if (retval) goto error_out3;
411 * Finally, clear and enable interrupts
414 USR1((u32)sport->port.membase) = USR1_RTSD;
415 UCR1((u32)sport->port.membase) |=
416 (UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN);
418 UCR2((u32)sport->port.membase) |= (UCR2_RXEN | UCR2_TXEN);
420 * Enable modem status interrupts
422 spin_lock_irqsave(&sport->port.lock,flags);
423 imx_enable_ms(&sport->port);
424 spin_unlock_irqrestore(&sport->port.lock,flags);
429 free_irq(sport->txirq, sport);
431 free_irq(sport->rxirq, sport);
436 static void imx_shutdown(struct uart_port *port)
438 struct imx_port *sport = (struct imx_port *)port;
443 del_timer_sync(&sport->timer);
446 * Free the interrupts
448 free_irq(sport->rtsirq, sport);
449 free_irq(sport->txirq, sport);
450 free_irq(sport->rxirq, sport);
453 * Disable all interrupts, port and break condition.
456 UCR1((u32)sport->port.membase) &=
457 ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN);
461 imx_set_termios(struct uart_port *port, struct ktermios *termios,
462 struct ktermios *old)
464 struct imx_port *sport = (struct imx_port *)port;
466 unsigned int ucr2, old_ucr1, old_txrxen, baud, quot;
467 unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8;
470 * If we don't support modem control lines, don't allow
474 termios->c_cflag &= ~(HUPCL | CRTSCTS | CMSPAR);
475 termios->c_cflag |= CLOCAL;
479 * We only support CS7 and CS8.
481 while ((termios->c_cflag & CSIZE) != CS7 &&
482 (termios->c_cflag & CSIZE) != CS8) {
483 termios->c_cflag &= ~CSIZE;
484 termios->c_cflag |= old_csize;
488 if ((termios->c_cflag & CSIZE) == CS8)
489 ucr2 = UCR2_WS | UCR2_SRST | UCR2_IRTS;
491 ucr2 = UCR2_SRST | UCR2_IRTS;
493 if (termios->c_cflag & CRTSCTS) {
494 if( sport->have_rtscts ) {
498 termios->c_cflag &= ~CRTSCTS;
502 if (termios->c_cflag & CSTOPB)
504 if (termios->c_cflag & PARENB) {
506 if (termios->c_cflag & PARODD)
511 * Ask the core to calculate the divisor for us.
513 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
514 quot = uart_get_divisor(port, baud);
516 spin_lock_irqsave(&sport->port.lock, flags);
518 sport->port.read_status_mask = 0;
519 if (termios->c_iflag & INPCK)
520 sport->port.read_status_mask |= (URXD_FRMERR | URXD_PRERR);
521 if (termios->c_iflag & (BRKINT | PARMRK))
522 sport->port.read_status_mask |= URXD_BRK;
525 * Characters to ignore
527 sport->port.ignore_status_mask = 0;
528 if (termios->c_iflag & IGNPAR)
529 sport->port.ignore_status_mask |= URXD_PRERR;
530 if (termios->c_iflag & IGNBRK) {
531 sport->port.ignore_status_mask |= URXD_BRK;
533 * If we're ignoring parity and break indicators,
534 * ignore overruns too (for real raw support).
536 if (termios->c_iflag & IGNPAR)
537 sport->port.ignore_status_mask |= URXD_OVRRUN;
540 del_timer_sync(&sport->timer);
543 * Update the per-port timeout.
545 uart_update_timeout(port, termios->c_cflag, baud);
548 * disable interrupts and drain transmitter
550 old_ucr1 = UCR1((u32)sport->port.membase);
551 UCR1((u32)sport->port.membase) &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN);
553 while ( !(USR2((u32)sport->port.membase) & USR2_TXDC))
556 /* then, disable everything */
557 old_txrxen = UCR2((u32)sport->port.membase) & ( UCR2_TXEN | UCR2_RXEN );
558 UCR2((u32)sport->port.membase) &= ~( UCR2_TXEN | UCR2_RXEN);
560 /* set the parity, stop bits and data size */
561 UCR2((u32)sport->port.membase) = ucr2;
563 /* set the baud rate. We assume uartclk = 16 MHz
566 * --------- = --------
569 UBIR((u32)sport->port.membase) = (baud / 100) - 1;
570 UBMR((u32)sport->port.membase) = 10000 - 1;
572 UCR1((u32)sport->port.membase) = old_ucr1;
573 UCR2((u32)sport->port.membase) |= old_txrxen;
575 if (UART_ENABLE_MS(&sport->port, termios->c_cflag))
576 imx_enable_ms(&sport->port);
578 spin_unlock_irqrestore(&sport->port.lock, flags);
581 static const char *imx_type(struct uart_port *port)
583 struct imx_port *sport = (struct imx_port *)port;
585 return sport->port.type == PORT_IMX ? "IMX" : NULL;
589 * Release the memory region(s) being used by 'port'.
591 static void imx_release_port(struct uart_port *port)
593 struct imx_port *sport = (struct imx_port *)port;
595 release_mem_region(sport->port.mapbase, UART_PORT_SIZE);
599 * Request the memory region(s) being used by 'port'.
601 static int imx_request_port(struct uart_port *port)
603 struct imx_port *sport = (struct imx_port *)port;
605 return request_mem_region(sport->port.mapbase, UART_PORT_SIZE,
606 "imx-uart") != NULL ? 0 : -EBUSY;
610 * Configure/autoconfigure the port.
612 static void imx_config_port(struct uart_port *port, int flags)
614 struct imx_port *sport = (struct imx_port *)port;
616 if (flags & UART_CONFIG_TYPE &&
617 imx_request_port(&sport->port) == 0)
618 sport->port.type = PORT_IMX;
622 * Verify the new serial_struct (for TIOCSSERIAL).
623 * The only change we allow are to the flags and type, and
624 * even then only between PORT_IMX and PORT_UNKNOWN
627 imx_verify_port(struct uart_port *port, struct serial_struct *ser)
629 struct imx_port *sport = (struct imx_port *)port;
632 if (ser->type != PORT_UNKNOWN && ser->type != PORT_IMX)
634 if (sport->port.irq != ser->irq)
636 if (ser->io_type != UPIO_MEM)
638 if (sport->port.uartclk / 16 != ser->baud_base)
640 if ((void *)sport->port.mapbase != ser->iomem_base)
642 if (sport->port.iobase != ser->port)
649 static struct uart_ops imx_pops = {
650 .tx_empty = imx_tx_empty,
651 .set_mctrl = imx_set_mctrl,
652 .get_mctrl = imx_get_mctrl,
653 .stop_tx = imx_stop_tx,
654 .start_tx = imx_start_tx,
655 .stop_rx = imx_stop_rx,
656 .enable_ms = imx_enable_ms,
657 .break_ctl = imx_break_ctl,
658 .startup = imx_startup,
659 .shutdown = imx_shutdown,
660 .set_termios = imx_set_termios,
662 .release_port = imx_release_port,
663 .request_port = imx_request_port,
664 .config_port = imx_config_port,
665 .verify_port = imx_verify_port,
668 static struct imx_port imx_ports[] = {
670 .txirq = UART1_MINT_TX,
671 .rxirq = UART1_MINT_RX,
672 .rtsirq = UART1_MINT_RTS,
676 .membase = (void *)IMX_UART1_BASE,
677 .mapbase = IMX_UART1_BASE, /* FIXME */
678 .irq = UART1_MINT_RX,
681 .flags = UPF_BOOT_AUTOCONF,
686 .txirq = UART2_MINT_TX,
687 .rxirq = UART2_MINT_RX,
688 .rtsirq = UART2_MINT_RTS,
692 .membase = (void *)IMX_UART2_BASE,
693 .mapbase = IMX_UART2_BASE, /* FIXME */
694 .irq = UART2_MINT_RX,
697 .flags = UPF_BOOT_AUTOCONF,
705 * Setup the IMX serial ports.
706 * Note also that we support "console=ttySMXx" where "x" is either 0 or 1.
707 * Which serial port this ends up being depends on the machine you're
708 * running this kernel on. I'm not convinced that this is a good idea,
709 * but that's the way it traditionally works.
712 static void __init imx_init_ports(void)
714 static int first = 1;
721 for (i = 0; i < ARRAY_SIZE(imx_ports); i++) {
722 init_timer(&imx_ports[i].timer);
723 imx_ports[i].timer.function = imx_timeout;
724 imx_ports[i].timer.data = (unsigned long)&imx_ports[i];
728 #ifdef CONFIG_SERIAL_IMX_CONSOLE
729 static void imx_console_putchar(struct uart_port *port, int ch)
731 struct imx_port *sport = (struct imx_port *)port;
732 while ((UTS((u32)sport->port.membase) & UTS_TXFULL))
734 URTX0((u32)sport->port.membase) = ch;
738 * Interrupts are disabled on entering
741 imx_console_write(struct console *co, const char *s, unsigned int count)
743 struct imx_port *sport = &imx_ports[co->index];
744 unsigned int old_ucr1, old_ucr2;
747 * First, save UCR1/2 and then disable interrupts
749 old_ucr1 = UCR1((u32)sport->port.membase);
750 old_ucr2 = UCR2((u32)sport->port.membase);
752 UCR1((u32)sport->port.membase) =
753 (old_ucr1 | UCR1_UARTCLKEN | UCR1_UARTEN)
754 & ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN);
755 UCR2((u32)sport->port.membase) = old_ucr2 | UCR2_TXEN;
757 uart_console_write(&sport->port, s, count, imx_console_putchar);
760 * Finally, wait for transmitter to become empty
763 while (!(USR2((u32)sport->port.membase) & USR2_TXDC));
765 UCR1((u32)sport->port.membase) = old_ucr1;
766 UCR2((u32)sport->port.membase) = old_ucr2;
770 * If the port was already initialised (eg, by a boot loader),
771 * try to determine the current setup.
774 imx_console_get_options(struct imx_port *sport, int *baud,
775 int *parity, int *bits)
778 if ( UCR1((u32)sport->port.membase) | UCR1_UARTEN ) {
779 /* ok, the port was enabled */
780 unsigned int ucr2, ubir,ubmr, uartclk;
781 unsigned int baud_raw;
782 unsigned int ucfr_rfdiv;
784 ucr2 = UCR2((u32)sport->port.membase);
787 if (ucr2 & UCR2_PREN) {
788 if (ucr2 & UCR2_PROE)
799 ubir = UBIR((u32)sport->port.membase) & 0xffff;
800 ubmr = UBMR((u32)sport->port.membase) & 0xffff;
803 ucfr_rfdiv = (UFCR((u32)sport->port.membase) & UFCR_RFDIV) >> 7;
807 ucfr_rfdiv = 6 - ucfr_rfdiv;
809 uartclk = imx_get_perclk1();
810 uartclk /= ucfr_rfdiv;
813 * The next code provides exact computation of
814 * baud_raw = round(((uartclk/16) * (ubir + 1)) / (ubmr + 1))
815 * without need of float support or long long division,
816 * which would be required to prevent 32bit arithmetic overflow
818 unsigned int mul = ubir + 1;
819 unsigned int div = 16 * (ubmr + 1);
820 unsigned int rem = uartclk % div;
822 baud_raw = (uartclk / div) * mul;
823 baud_raw += (rem * mul + div / 2) / div;
824 *baud = (baud_raw + 50) / 100 * 100;
827 if(*baud != baud_raw)
828 printk(KERN_INFO "Serial: Console IMX rounded baud rate from %d to %d\n",
834 imx_console_setup(struct console *co, char *options)
836 struct imx_port *sport;
843 * Check whether an invalid uart number has been specified, and
844 * if so, search for the first available port that does have
847 if (co->index == -1 || co->index >= ARRAY_SIZE(imx_ports))
849 sport = &imx_ports[co->index];
852 uart_parse_options(options, &baud, &parity, &bits, &flow);
854 imx_console_get_options(sport, &baud, &parity, &bits);
856 imx_setup_ufcr(sport, 0);
858 return uart_set_options(&sport->port, co, baud, parity, bits, flow);
861 static struct uart_driver imx_reg;
862 static struct console imx_console = {
864 .write = imx_console_write,
865 .device = uart_console_device,
866 .setup = imx_console_setup,
867 .flags = CON_PRINTBUFFER,
872 static int __init imx_rs_console_init(void)
875 register_console(&imx_console);
878 console_initcall(imx_rs_console_init);
880 #define IMX_CONSOLE &imx_console
882 #define IMX_CONSOLE NULL
885 static struct uart_driver imx_reg = {
886 .owner = THIS_MODULE,
887 .driver_name = DRIVER_NAME,
888 .dev_name = "ttySMX",
889 .major = SERIAL_IMX_MAJOR,
890 .minor = MINOR_START,
891 .nr = ARRAY_SIZE(imx_ports),
895 static int serial_imx_suspend(struct platform_device *dev, pm_message_t state)
897 struct imx_port *sport = platform_get_drvdata(dev);
900 uart_suspend_port(&imx_reg, &sport->port);
905 static int serial_imx_resume(struct platform_device *dev)
907 struct imx_port *sport = platform_get_drvdata(dev);
910 uart_resume_port(&imx_reg, &sport->port);
915 static int serial_imx_probe(struct platform_device *dev)
917 struct imxuart_platform_data *pdata;
919 imx_ports[dev->id].port.dev = &dev->dev;
921 pdata = (struct imxuart_platform_data *)dev->dev.platform_data;
922 if(pdata && (pdata->flags & IMXUART_HAVE_RTSCTS))
923 imx_ports[dev->id].have_rtscts = 1;
925 uart_add_one_port(&imx_reg, &imx_ports[dev->id].port);
926 platform_set_drvdata(dev, &imx_ports[dev->id]);
930 static int serial_imx_remove(struct platform_device *dev)
932 struct imx_port *sport = platform_get_drvdata(dev);
934 platform_set_drvdata(dev, NULL);
937 uart_remove_one_port(&imx_reg, &sport->port);
942 static struct platform_driver serial_imx_driver = {
943 .probe = serial_imx_probe,
944 .remove = serial_imx_remove,
946 .suspend = serial_imx_suspend,
947 .resume = serial_imx_resume,
953 static int __init imx_serial_init(void)
957 printk(KERN_INFO "Serial: IMX driver\n");
961 ret = uart_register_driver(&imx_reg);
965 ret = platform_driver_register(&serial_imx_driver);
967 uart_unregister_driver(&imx_reg);
972 static void __exit imx_serial_exit(void)
974 uart_unregister_driver(&imx_reg);
975 platform_driver_unregister(&serial_imx_driver);
978 module_init(imx_serial_init);
979 module_exit(imx_serial_exit);
981 MODULE_AUTHOR("Sascha Hauer");
982 MODULE_DESCRIPTION("IMX generic serial port driver");
983 MODULE_LICENSE("GPL");