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1 /*
2  * uartlite.c: Serial driver for Xilinx uartlite serial controller
3  *
4  * Peter Korsgaard <jacmet@sunsite.dk>
5  *
6  * This file is licensed under the terms of the GNU General Public License
7  * version 2.  This program is licensed "as is" without any warranty of any
8  * kind, whether express or implied.
9  */
10
11 #include <linux/platform_device.h>
12 #include <linux/module.h>
13 #include <linux/console.h>
14 #include <linux/serial.h>
15 #include <linux/serial_core.h>
16 #include <linux/tty.h>
17 #include <linux/delay.h>
18 #include <linux/interrupt.h>
19 #include <asm/io.h>
20
21 #define ULITE_NAME              "ttyUL"
22 #define ULITE_MAJOR             204
23 #define ULITE_MINOR             187
24 #define ULITE_NR_UARTS          4
25
26 /* For register details see datasheet:
27    http://www.xilinx.com/bvdocs/ipcenter/data_sheet/opb_uartlite.pdf
28 */
29 #define ULITE_RX                0x00
30 #define ULITE_TX                0x04
31 #define ULITE_STATUS            0x08
32 #define ULITE_CONTROL           0x0c
33
34 #define ULITE_REGION            16
35
36 #define ULITE_STATUS_RXVALID    0x01
37 #define ULITE_STATUS_RXFULL     0x02
38 #define ULITE_STATUS_TXEMPTY    0x04
39 #define ULITE_STATUS_TXFULL     0x08
40 #define ULITE_STATUS_IE         0x10
41 #define ULITE_STATUS_OVERRUN    0x20
42 #define ULITE_STATUS_FRAME      0x40
43 #define ULITE_STATUS_PARITY     0x80
44
45 #define ULITE_CONTROL_RST_TX    0x01
46 #define ULITE_CONTROL_RST_RX    0x02
47 #define ULITE_CONTROL_IE        0x10
48
49
50 static struct uart_port ulite_ports[ULITE_NR_UARTS];
51
52 static int ulite_receive(struct uart_port *port, int stat)
53 {
54         struct tty_struct *tty = port->info->tty;
55         unsigned char ch = 0;
56         char flag = TTY_NORMAL;
57
58         if ((stat & (ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
59                      | ULITE_STATUS_FRAME)) == 0)
60                 return 0;
61
62         /* stats */
63         if (stat & ULITE_STATUS_RXVALID) {
64                 port->icount.rx++;
65                 ch = in_be32((void*)port->membase + ULITE_RX);
66
67                 if (stat & ULITE_STATUS_PARITY)
68                         port->icount.parity++;
69         }
70
71         if (stat & ULITE_STATUS_OVERRUN)
72                 port->icount.overrun++;
73
74         if (stat & ULITE_STATUS_FRAME)
75                 port->icount.frame++;
76
77
78         /* drop byte with parity error if IGNPAR specificed */
79         if (stat & port->ignore_status_mask & ULITE_STATUS_PARITY)
80                 stat &= ~ULITE_STATUS_RXVALID;
81
82         stat &= port->read_status_mask;
83
84         if (stat & ULITE_STATUS_PARITY)
85                 flag = TTY_PARITY;
86
87
88         stat &= ~port->ignore_status_mask;
89
90         if (stat & ULITE_STATUS_RXVALID)
91                 tty_insert_flip_char(tty, ch, flag);
92
93         if (stat & ULITE_STATUS_FRAME)
94                 tty_insert_flip_char(tty, 0, TTY_FRAME);
95
96         if (stat & ULITE_STATUS_OVERRUN)
97                 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
98
99         return 1;
100 }
101
102 static int ulite_transmit(struct uart_port *port, int stat)
103 {
104         struct circ_buf *xmit  = &port->info->xmit;
105
106         if (stat & ULITE_STATUS_TXFULL)
107                 return 0;
108
109         if (port->x_char) {
110                 out_be32((void*)port->membase + ULITE_TX, port->x_char);
111                 port->x_char = 0;
112                 port->icount.tx++;
113                 return 1;
114         }
115
116         if (uart_circ_empty(xmit) || uart_tx_stopped(port))
117                 return 0;
118
119         out_be32((void*)port->membase + ULITE_TX, xmit->buf[xmit->tail]);
120         xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
121         port->icount.tx++;
122
123         /* wake up */
124         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
125                 uart_write_wakeup(port);
126
127         return 1;
128 }
129
130 static irqreturn_t ulite_isr(int irq, void *dev_id)
131 {
132         struct uart_port *port = (struct uart_port *)dev_id;
133         int busy;
134
135         do {
136                 int stat = in_be32((void*)port->membase + ULITE_STATUS);
137                 busy  = ulite_receive(port, stat);
138                 busy |= ulite_transmit(port, stat);
139         } while (busy);
140
141         tty_flip_buffer_push(port->info->tty);
142
143         return IRQ_HANDLED;
144 }
145
146 static unsigned int ulite_tx_empty(struct uart_port *port)
147 {
148         unsigned long flags;
149         unsigned int ret;
150
151         spin_lock_irqsave(&port->lock, flags);
152         ret = in_be32((void*)port->membase + ULITE_STATUS);
153         spin_unlock_irqrestore(&port->lock, flags);
154
155         return ret & ULITE_STATUS_TXEMPTY ? TIOCSER_TEMT : 0;
156 }
157
158 static unsigned int ulite_get_mctrl(struct uart_port *port)
159 {
160         return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
161 }
162
163 static void ulite_set_mctrl(struct uart_port *port, unsigned int mctrl)
164 {
165         /* N/A */
166 }
167
168 static void ulite_stop_tx(struct uart_port *port)
169 {
170         /* N/A */
171 }
172
173 static void ulite_start_tx(struct uart_port *port)
174 {
175         ulite_transmit(port, in_be32((void*)port->membase + ULITE_STATUS));
176 }
177
178 static void ulite_stop_rx(struct uart_port *port)
179 {
180         /* don't forward any more data (like !CREAD) */
181         port->ignore_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
182                 | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
183 }
184
185 static void ulite_enable_ms(struct uart_port *port)
186 {
187         /* N/A */
188 }
189
190 static void ulite_break_ctl(struct uart_port *port, int ctl)
191 {
192         /* N/A */
193 }
194
195 static int ulite_startup(struct uart_port *port)
196 {
197         int ret;
198
199         ret = request_irq(port->irq, ulite_isr,
200                           IRQF_DISABLED | IRQF_SAMPLE_RANDOM, "uartlite", port);
201         if (ret)
202                 return ret;
203
204         out_be32((void*)port->membase + ULITE_CONTROL,
205                  ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX);
206         out_be32((void*)port->membase + ULITE_CONTROL, ULITE_CONTROL_IE);
207
208         return 0;
209 }
210
211 static void ulite_shutdown(struct uart_port *port)
212 {
213         out_be32((void*)port->membase + ULITE_CONTROL, 0);
214         in_be32((void*)port->membase + ULITE_CONTROL); /* dummy */
215         free_irq(port->irq, port);
216 }
217
218 static void ulite_set_termios(struct uart_port *port, struct ktermios *termios,
219                               struct ktermios *old)
220 {
221         unsigned long flags;
222         unsigned int baud;
223
224         spin_lock_irqsave(&port->lock, flags);
225
226         port->read_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN
227                 | ULITE_STATUS_TXFULL;
228
229         if (termios->c_iflag & INPCK)
230                 port->read_status_mask |=
231                         ULITE_STATUS_PARITY | ULITE_STATUS_FRAME;
232
233         port->ignore_status_mask = 0;
234         if (termios->c_iflag & IGNPAR)
235                 port->ignore_status_mask |= ULITE_STATUS_PARITY
236                         | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
237
238         /* ignore all characters if CREAD is not set */
239         if ((termios->c_cflag & CREAD) == 0)
240                 port->ignore_status_mask |=
241                         ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY
242                         | ULITE_STATUS_FRAME | ULITE_STATUS_OVERRUN;
243
244         /* update timeout */
245         baud = uart_get_baud_rate(port, termios, old, 0, 460800);
246         uart_update_timeout(port, termios->c_cflag, baud);
247
248         spin_unlock_irqrestore(&port->lock, flags);
249 }
250
251 static const char *ulite_type(struct uart_port *port)
252 {
253         return port->type == PORT_UARTLITE ? "uartlite" : NULL;
254 }
255
256 static void ulite_release_port(struct uart_port *port)
257 {
258         release_mem_region(port->mapbase, ULITE_REGION);
259         iounmap(port->membase);
260         port->membase = NULL;
261 }
262
263 static int ulite_request_port(struct uart_port *port)
264 {
265         if (!request_mem_region(port->mapbase, ULITE_REGION, "uartlite")) {
266                 dev_err(port->dev, "Memory region busy\n");
267                 return -EBUSY;
268         }
269
270         port->membase = ioremap(port->mapbase, ULITE_REGION);
271         if (!port->membase) {
272                 dev_err(port->dev, "Unable to map registers\n");
273                 release_mem_region(port->mapbase, ULITE_REGION);
274                 return -EBUSY;
275         }
276
277         return 0;
278 }
279
280 static void ulite_config_port(struct uart_port *port, int flags)
281 {
282         if (!ulite_request_port(port))
283                 port->type = PORT_UARTLITE;
284 }
285
286 static int ulite_verify_port(struct uart_port *port, struct serial_struct *ser)
287 {
288         /* we don't want the core code to modify any port params */
289         return -EINVAL;
290 }
291
292 static struct uart_ops ulite_ops = {
293         .tx_empty       = ulite_tx_empty,
294         .set_mctrl      = ulite_set_mctrl,
295         .get_mctrl      = ulite_get_mctrl,
296         .stop_tx        = ulite_stop_tx,
297         .start_tx       = ulite_start_tx,
298         .stop_rx        = ulite_stop_rx,
299         .enable_ms      = ulite_enable_ms,
300         .break_ctl      = ulite_break_ctl,
301         .startup        = ulite_startup,
302         .shutdown       = ulite_shutdown,
303         .set_termios    = ulite_set_termios,
304         .type           = ulite_type,
305         .release_port   = ulite_release_port,
306         .request_port   = ulite_request_port,
307         .config_port    = ulite_config_port,
308         .verify_port    = ulite_verify_port
309 };
310
311 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
312 static void ulite_console_wait_tx(struct uart_port *port)
313 {
314         int i;
315
316         /* wait up to 10ms for the character(s) to be sent */
317         for (i = 0; i < 10000; i++) {
318                 if (in_be32((void*)port->membase + ULITE_STATUS) & ULITE_STATUS_TXEMPTY)
319                         break;
320                 udelay(1);
321         }
322 }
323
324 static void ulite_console_putchar(struct uart_port *port, int ch)
325 {
326         ulite_console_wait_tx(port);
327         out_be32((void*)port->membase + ULITE_TX, ch);
328 }
329
330 static void ulite_console_write(struct console *co, const char *s,
331                                 unsigned int count)
332 {
333         struct uart_port *port = &ulite_ports[co->index];
334         unsigned long flags;
335         unsigned int ier;
336         int locked = 1;
337
338         if (oops_in_progress) {
339                 locked = spin_trylock_irqsave(&port->lock, flags);
340         } else
341                 spin_lock_irqsave(&port->lock, flags);
342
343         /* save and disable interrupt */
344         ier = in_be32((void*)port->membase + ULITE_STATUS) & ULITE_STATUS_IE;
345         out_be32((void*)port->membase + ULITE_CONTROL, 0);
346
347         uart_console_write(port, s, count, ulite_console_putchar);
348
349         ulite_console_wait_tx(port);
350
351         /* restore interrupt state */
352         if (ier)
353                 out_be32((void*)port->membase + ULITE_CONTROL, ULITE_CONTROL_IE);
354
355         if (locked)
356                 spin_unlock_irqrestore(&port->lock, flags);
357 }
358
359 static int __init ulite_console_setup(struct console *co, char *options)
360 {
361         struct uart_port *port;
362         int baud = 9600;
363         int bits = 8;
364         int parity = 'n';
365         int flow = 'n';
366
367         if (co->index < 0 || co->index >= ULITE_NR_UARTS)
368                 return -EINVAL;
369
370         port = &ulite_ports[co->index];
371
372         /* not initialized yet? */
373         if (!port->membase)
374                 return -ENODEV;
375
376         if (options)
377                 uart_parse_options(options, &baud, &parity, &bits, &flow);
378
379         return uart_set_options(port, co, baud, parity, bits, flow);
380 }
381
382 static struct uart_driver ulite_uart_driver;
383
384 static struct console ulite_console = {
385         .name   = ULITE_NAME,
386         .write  = ulite_console_write,
387         .device = uart_console_device,
388         .setup  = ulite_console_setup,
389         .flags  = CON_PRINTBUFFER,
390         .index  = -1, /* Specified on the cmdline (e.g. console=ttyUL0 ) */
391         .data   = &ulite_uart_driver,
392 };
393
394 static int __init ulite_console_init(void)
395 {
396         register_console(&ulite_console);
397         return 0;
398 }
399
400 console_initcall(ulite_console_init);
401
402 #endif /* CONFIG_SERIAL_UARTLITE_CONSOLE */
403
404 static struct uart_driver ulite_uart_driver = {
405         .owner          = THIS_MODULE,
406         .driver_name    = "uartlite",
407         .dev_name       = ULITE_NAME,
408         .major          = ULITE_MAJOR,
409         .minor          = ULITE_MINOR,
410         .nr             = ULITE_NR_UARTS,
411 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
412         .cons           = &ulite_console,
413 #endif
414 };
415
416 static int __devinit ulite_probe(struct platform_device *pdev)
417 {
418         struct resource *res, *res2;
419         struct uart_port *port;
420
421         if (pdev->id < 0 || pdev->id >= ULITE_NR_UARTS)
422                 return -EINVAL;
423
424         if (ulite_ports[pdev->id].membase)
425                 return -EBUSY;
426
427         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
428         if (!res)
429                 return -ENODEV;
430
431         res2 = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
432         if (!res2)
433                 return -ENODEV;
434
435         port = &ulite_ports[pdev->id];
436
437         port->fifosize  = 16;
438         port->regshift  = 2;
439         port->iotype    = UPIO_MEM;
440         port->iobase    = 1; /* mark port in use */
441         port->mapbase   = res->start;
442         port->membase   = NULL;
443         port->ops       = &ulite_ops;
444         port->irq       = res2->start;
445         port->flags     = UPF_BOOT_AUTOCONF;
446         port->dev       = &pdev->dev;
447         port->type      = PORT_UNKNOWN;
448         port->line      = pdev->id;
449
450         uart_add_one_port(&ulite_uart_driver, port);
451         platform_set_drvdata(pdev, port);
452
453         return 0;
454 }
455
456 static int ulite_remove(struct platform_device *pdev)
457 {
458         struct uart_port *port = platform_get_drvdata(pdev);
459
460         platform_set_drvdata(pdev, NULL);
461
462         if (port)
463                 uart_remove_one_port(&ulite_uart_driver, port);
464
465         /* mark port as free */
466         port->membase = NULL;
467
468         return 0;
469 }
470
471 static struct platform_driver ulite_platform_driver = {
472         .probe  = ulite_probe,
473         .remove = ulite_remove,
474         .driver = {
475                    .owner = THIS_MODULE,
476                    .name  = "uartlite",
477                    },
478 };
479
480 int __init ulite_init(void)
481 {
482         int ret;
483
484         ret = uart_register_driver(&ulite_uart_driver);
485         if (ret)
486                 return ret;
487
488         ret = platform_driver_register(&ulite_platform_driver);
489         if (ret)
490                 uart_unregister_driver(&ulite_uart_driver);
491
492         return ret;
493 }
494
495 void __exit ulite_exit(void)
496 {
497         platform_driver_unregister(&ulite_platform_driver);
498         uart_unregister_driver(&ulite_uart_driver);
499 }
500
501 module_init(ulite_init);
502 module_exit(ulite_exit);
503
504 MODULE_AUTHOR("Peter Korsgaard <jacmet@sunsite.dk>");
505 MODULE_DESCRIPTION("Xilinx uartlite serial driver");
506 MODULE_LICENSE("GPL");