drivers/usb/gadget/fsl_usb2_udc.c

   1 /*
   2  * Copyright (C) 2004-2007 Freescale Semicondutor, Inc. All rights reserved.
   3  *
   4  * Author: Li Yang <leoli@freescale.com>
   5  *         Jiang Bo <tanya.jiang@freescale.com>
   6  *
   7  * Description:
   8  * Freescale high-speed USB SOC DR module device controller driver.
   9  * This can be found on MPC8349E/MPC8313E cpus.
  10  * The driver is previously named as mpc_udc.  Based on bare board
  11  * code from Dave Liu and Shlomi Gridish.
  12  *
  13  * This program is free software; you can redistribute  it and/or modify it
  14  * under  the terms of  the GNU General  Public License as published by the
  15  * Free Software Foundation;  either version 2 of the  License, or (at your
  16  * option) any later version.
  17  */
  18
  19 #undef VERBOSE
  20
  21 #include <linux/module.h>
  22 #include <linux/kernel.h>
  23 #include <linux/ioport.h>
  24 #include <linux/types.h>
  25 #include <linux/errno.h>
  26 #include <linux/slab.h>
  27 #include <linux/init.h>
  28 #include <linux/list.h>
  29 #include <linux/interrupt.h>
  30 #include <linux/proc_fs.h>
  31 #include <linux/mm.h>
  32 #include <linux/moduleparam.h>
  33 #include <linux/device.h>
  34 #include <linux/usb/ch9.h>
  35 #include <linux/usb/gadget.h>
  36 #include <linux/usb/otg.h>
  37 #include <linux/dma-mapping.h>
  38 #include <linux/platform_device.h>
  39 #include <linux/fsl_devices.h>
  40 #include <linux/dmapool.h>
  41
  42 #include <asm/byteorder.h>
  43 #include <asm/io.h>
  44 #include <asm/system.h>
  45 #include <asm/unaligned.h>
  46 #include <asm/dma.h>
  47
  48 #include "fsl_usb2_udc.h"
  49
  50 #define DRIVER_DESC     "Freescale High-Speed USB SOC Device Controller driver"
  51 #define DRIVER_AUTHOR   "Li Yang/Jiang Bo"
  52 #define DRIVER_VERSION  "Apr 20, 2007"
  53
  54 #define DMA_ADDR_INVALID        (~(dma_addr_t)0)
  55
  56 static const char driver_name[] = "fsl-usb2-udc";
  57 static const char driver_desc[] = DRIVER_DESC;
  58
  59 static struct usb_dr_device *dr_regs;
  60 static struct usb_sys_interface *usb_sys_regs;
  61
  62 /* it is initialized in probe()  */
  63 static struct fsl_udc *udc_controller = NULL;
  64
  65 static const struct usb_endpoint_descriptor
  66 fsl_ep0_desc = {
  67         .bLength =              USB_DT_ENDPOINT_SIZE,
  68         .bDescriptorType =      USB_DT_ENDPOINT,
  69         .bEndpointAddress =     0,
  70         .bmAttributes =         USB_ENDPOINT_XFER_CONTROL,
  71         .wMaxPacketSize =       USB_MAX_CTRL_PAYLOAD,
  72 };
  73
  74 static void fsl_ep_fifo_flush(struct usb_ep *_ep);
  75
  76 #ifdef CONFIG_PPC32
  77 #define fsl_readl(addr)         in_le32(addr)
  78 #define fsl_writel(val32, addr) out_le32(addr, val32)
  79 #else
  80 #define fsl_readl(addr)         readl(addr)
  81 #define fsl_writel(val32, addr) writel(val32, addr)
  82 #endif
  83
  84 /********************************************************************
  85  *      Internal Used Function
  86 ********************************************************************/
  87 /*-----------------------------------------------------------------
  88  * done() - retire a request; caller blocked irqs
  89  * @status : request status to be set, only works when
  90  *      request is still in progress.
  91  *--------------------------------------------------------------*/
  92 static void done(struct fsl_ep *ep, struct fsl_req *req, int status)
  93 {
  94         struct fsl_udc *udc = NULL;
  95         unsigned char stopped = ep->stopped;
  96         struct ep_td_struct *curr_td, *next_td;
  97         int j;
  98
  99         udc = (struct fsl_udc *)ep->udc;
 100         /* Removed the req from fsl_ep->queue */
 101         list_del_init(&req->queue);
 102
 103         /* req.status should be set as -EINPROGRESS in ep_queue() */
 104         if (req->req.status == -EINPROGRESS)
 105                 req->req.status = status;
 106         else
 107                 status = req->req.status;
 108
 109         /* Free dtd for the request */
 110         next_td = req->head;
 111         for (j = 0; j < req->dtd_count; j++) {
 112                 curr_td = next_td;
 113                 if (j != req->dtd_count - 1) {
 114                         next_td = curr_td->next_td_virt;
 115                 }
 116                 dma_pool_free(udc->td_pool, curr_td, curr_td->td_dma);
 117         }
 118
 119         if (req->mapped) {
 120                 dma_unmap_single(ep->udc->gadget.dev.parent,
 121                         req->req.dma, req->req.length,
 122                         ep_is_in(ep)
 123                                 ? DMA_TO_DEVICE
 124                                 : DMA_FROM_DEVICE);
 125                 req->req.dma = DMA_ADDR_INVALID;
 126                 req->mapped = 0;
 127         } else
 128                 dma_sync_single_for_cpu(ep->udc->gadget.dev.parent,
 129                         req->req.dma, req->req.length,
 130                         ep_is_in(ep)
 131                                 ? DMA_TO_DEVICE
 132                                 : DMA_FROM_DEVICE);
 133
 134         if (status && (status != -ESHUTDOWN))
 135                 VDBG("complete %s req %p stat %d len %u/%u",
 136                         ep->ep.name, &req->req, status,
 137                         req->req.actual, req->req.length);
 138
 139         ep->stopped = 1;
 140
 141         spin_unlock(&ep->udc->lock);
 142         /* complete() is from gadget layer,
 143          * eg fsg->bulk_in_complete() */
 144         if (req->req.complete)
 145                 req->req.complete(&ep->ep, &req->req);
 146
 147         spin_lock(&ep->udc->lock);
 148         ep->stopped = stopped;
 149 }
 150
 151 /*-----------------------------------------------------------------
 152  * nuke(): delete all requests related to this ep
 153  * called with spinlock held
 154  *--------------------------------------------------------------*/
 155 static void nuke(struct fsl_ep *ep, int status)
 156 {
 157         ep->stopped = 1;
 158
 159         /* Flush fifo */
 160         fsl_ep_fifo_flush(&ep->ep);
 161
 162         /* Whether this eq has request linked */
 163         while (!list_empty(&ep->queue)) {
 164                 struct fsl_req *req = NULL;
 165
 166                 req = list_entry(ep->queue.next, struct fsl_req, queue);
 167                 done(ep, req, status);
 168         }
 169 }
 170
 171 /*------------------------------------------------------------------
 172         Internal Hardware related function
 173  ------------------------------------------------------------------*/
 174
 175 static int dr_controller_setup(struct fsl_udc *udc)
 176 {
 177         unsigned int tmp = 0, portctrl = 0, ctrl = 0;
 178         unsigned long timeout;
 179 #define FSL_UDC_RESET_TIMEOUT 1000
 180
 181         /* Stop and reset the usb controller */
 182         tmp = fsl_readl(&dr_regs->usbcmd);
 183         tmp &= ~USB_CMD_RUN_STOP;
 184         fsl_writel(tmp, &dr_regs->usbcmd);
 185
 186         tmp = fsl_readl(&dr_regs->usbcmd);
 187         tmp |= USB_CMD_CTRL_RESET;
 188         fsl_writel(tmp, &dr_regs->usbcmd);
 189
 190         /* Wait for reset to complete */
 191         timeout = jiffies + FSL_UDC_RESET_TIMEOUT;
 192         while (fsl_readl(&dr_regs->usbcmd) & USB_CMD_CTRL_RESET) {
 193                 if (time_after(jiffies, timeout)) {
 194                         ERR("udc reset timeout!\n");
 195                         return -ETIMEDOUT;
 196                 }
 197                 cpu_relax();
 198         }
 199
 200         /* Set the controller as device mode */
 201         tmp = fsl_readl(&dr_regs->usbmode);
 202         tmp |= USB_MODE_CTRL_MODE_DEVICE;
 203         /* Disable Setup Lockout */
 204         tmp |= USB_MODE_SETUP_LOCK_OFF;
 205         fsl_writel(tmp, &dr_regs->usbmode);
 206
 207         /* Clear the setup status */
 208         fsl_writel(0, &dr_regs->usbsts);
 209
 210         tmp = udc->ep_qh_dma;
 211         tmp &= USB_EP_LIST_ADDRESS_MASK;
 212         fsl_writel(tmp, &dr_regs->endpointlistaddr);
 213
 214         VDBG("vir[qh_base] is %p phy[qh_base] is 0x%8x reg is 0x%8x",
 215                 udc->ep_qh, (int)tmp,
 216                 fsl_readl(&dr_regs->endpointlistaddr));
 217
 218         /* Config PHY interface */
 219         portctrl = fsl_readl(&dr_regs->portsc1);
 220         portctrl &= ~(PORTSCX_PHY_TYPE_SEL | PORTSCX_PORT_WIDTH);
 221         switch (udc->phy_mode) {
 222         case FSL_USB2_PHY_ULPI:
 223                 portctrl |= PORTSCX_PTS_ULPI;
 224                 break;
 225         case FSL_USB2_PHY_UTMI_WIDE:
 226                 portctrl |= PORTSCX_PTW_16BIT;
 227                 /* fall through */
 228         case FSL_USB2_PHY_UTMI:
 229                 portctrl |= PORTSCX_PTS_UTMI;
 230                 break;
 231         case FSL_USB2_PHY_SERIAL:
 232                 portctrl |= PORTSCX_PTS_FSLS;
 233                 break;
 234         default:
 235                 return -EINVAL;
 236         }
 237         fsl_writel(portctrl, &dr_regs->portsc1);
 238
 239         /* Config control enable i/o output, cpu endian register */
 240         ctrl = __raw_readl(&usb_sys_regs->control);
 241         ctrl |= USB_CTRL_IOENB;
 242         __raw_writel(ctrl, &usb_sys_regs->control);
 243
 244 #if defined(CONFIG_PPC32) && !defined(CONFIG_NOT_COHERENT_CACHE)
 245         /* Turn on cache snooping hardware, since some PowerPC platforms
 246          * wholly rely on hardware to deal with cache coherent. */
 247
 248         /* Setup Snooping for all the 4GB space */
 249         tmp = SNOOP_SIZE_2GB;   /* starts from 0x0, size 2G */
 250         __raw_writel(tmp, &usb_sys_regs->snoop1);
 251         tmp |= 0x80000000;      /* starts from 0x8000000, size 2G */
 252         __raw_writel(tmp, &usb_sys_regs->snoop2);
 253 #endif
 254
 255         return 0;
 256 }
 257
 258 /* Enable DR irq and set controller to run state */
 259 static void dr_controller_run(struct fsl_udc *udc)
 260 {
 261         u32 temp;
 262
 263         /* Enable DR irq reg */
 264         temp = USB_INTR_INT_EN | USB_INTR_ERR_INT_EN
 265                 | USB_INTR_PTC_DETECT_EN | USB_INTR_RESET_EN
 266                 | USB_INTR_DEVICE_SUSPEND | USB_INTR_SYS_ERR_EN;
 267
 268         fsl_writel(temp, &dr_regs->usbintr);
 269
 270         /* Clear stopped bit */
 271         udc->stopped = 0;
 272
 273         /* Set the controller as device mode */
 274         temp = fsl_readl(&dr_regs->usbmode);
 275         temp |= USB_MODE_CTRL_MODE_DEVICE;
 276         fsl_writel(temp, &dr_regs->usbmode);
 277
 278         /* Set controller to Run */
 279         temp = fsl_readl(&dr_regs->usbcmd);
 280         temp |= USB_CMD_RUN_STOP;
 281         fsl_writel(temp, &dr_regs->usbcmd);
 282
 283         return;
 284 }
 285
 286 static void dr_controller_stop(struct fsl_udc *udc)
 287 {
 288         unsigned int tmp;
 289
 290         /* disable all INTR */
 291         fsl_writel(0, &dr_regs->usbintr);
 292
 293         /* Set stopped bit for isr */
 294         udc->stopped = 1;
 295
 296         /* disable IO output */
 297 /*      usb_sys_regs->control = 0; */
 298
 299         /* set controller to Stop */
 300         tmp = fsl_readl(&dr_regs->usbcmd);
 301         tmp &= ~USB_CMD_RUN_STOP;
 302         fsl_writel(tmp, &dr_regs->usbcmd);
 303
 304         return;
 305 }
 306
 307 static void dr_ep_setup(unsigned char ep_num, unsigned char dir,
 308                         unsigned char ep_type)
 309 {
 310         unsigned int tmp_epctrl = 0;
 311
 312         tmp_epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
 313         if (dir) {
 314                 if (ep_num)
 315                         tmp_epctrl |= EPCTRL_TX_DATA_TOGGLE_RST;
 316                 tmp_epctrl |= EPCTRL_TX_ENABLE;
 317                 tmp_epctrl |= ((unsigned int)(ep_type)
 318                                 << EPCTRL_TX_EP_TYPE_SHIFT);
 319         } else {
 320                 if (ep_num)
 321                         tmp_epctrl |= EPCTRL_RX_DATA_TOGGLE_RST;
 322                 tmp_epctrl |= EPCTRL_RX_ENABLE;
 323                 tmp_epctrl |= ((unsigned int)(ep_type)
 324                                 << EPCTRL_RX_EP_TYPE_SHIFT);
 325         }
 326
 327         fsl_writel(tmp_epctrl, &dr_regs->endptctrl[ep_num]);
 328 }
 329
 330 static void
 331 dr_ep_change_stall(unsigned char ep_num, unsigned char dir, int value)
 332 {
 333         u32 tmp_epctrl = 0;
 334
 335         tmp_epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
 336
 337         if (value) {
 338                 /* set the stall bit */
 339                 if (dir)
 340                         tmp_epctrl |= EPCTRL_TX_EP_STALL;
 341                 else
 342                         tmp_epctrl |= EPCTRL_RX_EP_STALL;
 343         } else {
 344                 /* clear the stall bit and reset data toggle */
 345                 if (dir) {
 346                         tmp_epctrl &= ~EPCTRL_TX_EP_STALL;
 347                         tmp_epctrl |= EPCTRL_TX_DATA_TOGGLE_RST;
 348                 } else {
 349                         tmp_epctrl &= ~EPCTRL_RX_EP_STALL;
 350                         tmp_epctrl |= EPCTRL_RX_DATA_TOGGLE_RST;
 351                 }
 352         }
 353         fsl_writel(tmp_epctrl, &dr_regs->endptctrl[ep_num]);
 354 }
 355
 356 /* Get stall status of a specific ep
 357    Return: 0: not stalled; 1:stalled */
 358 static int dr_ep_get_stall(unsigned char ep_num, unsigned char dir)
 359 {
 360         u32 epctrl;
 361
 362         epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
 363         if (dir)
 364                 return (epctrl & EPCTRL_TX_EP_STALL) ? 1 : 0;
 365         else
 366                 return (epctrl & EPCTRL_RX_EP_STALL) ? 1 : 0;
 367 }
 368
 369 /********************************************************************
 370         Internal Structure Build up functions
 371 ********************************************************************/
 372
 373 /*------------------------------------------------------------------
 374 * struct_ep_qh_setup(): set the Endpoint Capabilites field of QH
 375  * @zlt: Zero Length Termination Select (1: disable; 0: enable)
 376  * @mult: Mult field
 377  ------------------------------------------------------------------*/
 378 static void struct_ep_qh_setup(struct fsl_udc *udc, unsigned char ep_num,
 379                 unsigned char dir, unsigned char ep_type,
 380                 unsigned int max_pkt_len,
 381                 unsigned int zlt, unsigned char mult)
 382 {
 383         struct ep_queue_head *p_QH = &udc->ep_qh[2 * ep_num + dir];
 384         unsigned int tmp = 0;
 385
 386         /* set the Endpoint Capabilites in QH */
 387         switch (ep_type) {
 388         case USB_ENDPOINT_XFER_CONTROL:
 389                 /* Interrupt On Setup (IOS). for control ep  */
 390                 tmp = (max_pkt_len << EP_QUEUE_HEAD_MAX_PKT_LEN_POS)
 391                         | EP_QUEUE_HEAD_IOS;
 392                 break;
 393         case USB_ENDPOINT_XFER_ISOC:
 394                 tmp = (max_pkt_len << EP_QUEUE_HEAD_MAX_PKT_LEN_POS)
 395                         | (mult << EP_QUEUE_HEAD_MULT_POS);
 396                 break;
 397         case USB_ENDPOINT_XFER_BULK:
 398         case USB_ENDPOINT_XFER_INT:
 399                 tmp = max_pkt_len << EP_QUEUE_HEAD_MAX_PKT_LEN_POS;
 400                 break;
 401         default:
 402                 VDBG("error ep type is %d", ep_type);
 403                 return;
 404         }
 405         if (zlt)
 406                 tmp |= EP_QUEUE_HEAD_ZLT_SEL;
 407
 408         p_QH->max_pkt_length = cpu_to_le32(tmp);
 409         p_QH->next_dtd_ptr = 1;
 410         p_QH->size_ioc_int_sts = 0;
 411
 412         return;
 413 }
 414
 415 /* Setup qh structure and ep register for ep0. */
 416 static void ep0_setup(struct fsl_udc *udc)
 417 {
 418         /* the intialization of an ep includes: fields in QH, Regs,
 419          * fsl_ep struct */
 420         struct_ep_qh_setup(udc, 0, USB_RECV, USB_ENDPOINT_XFER_CONTROL,
 421                         USB_MAX_CTRL_PAYLOAD, 0, 0);
 422         struct_ep_qh_setup(udc, 0, USB_SEND, USB_ENDPOINT_XFER_CONTROL,
 423                         USB_MAX_CTRL_PAYLOAD, 0, 0);
 424         dr_ep_setup(0, USB_RECV, USB_ENDPOINT_XFER_CONTROL);
 425         dr_ep_setup(0, USB_SEND, USB_ENDPOINT_XFER_CONTROL);
 426
 427         return;
 428
 429 }
 430
 431 /***********************************************************************
 432                 Endpoint Management Functions
 433 ***********************************************************************/
 434
 435 /*-------------------------------------------------------------------------
 436  * when configurations are set, or when interface settings change
 437  * for example the do_set_interface() in gadget layer,
 438  * the driver will enable or disable the relevant endpoints
 439  * ep0 doesn't use this routine. It is always enabled.
 440 -------------------------------------------------------------------------*/
 441 static int fsl_ep_enable(struct usb_ep *_ep,
 442                 const struct usb_endpoint_descriptor *desc)
 443 {
 444         struct fsl_udc *udc = NULL;
 445         struct fsl_ep *ep = NULL;
 446         unsigned short max = 0;
 447         unsigned char mult = 0, zlt;
 448         int retval = -EINVAL;
 449         unsigned long flags = 0;
 450
 451         ep = container_of(_ep, struct fsl_ep, ep);
 452
 453         /* catch various bogus parameters */
 454         if (!_ep || !desc || ep->desc
 455                         || (desc->bDescriptorType != USB_DT_ENDPOINT))
 456                 return -EINVAL;
 457
 458         udc = ep->udc;
 459
 460         if (!udc->driver || (udc->gadget.speed == USB_SPEED_UNKNOWN))
 461                 return -ESHUTDOWN;
 462
 463         max = le16_to_cpu(desc->wMaxPacketSize);
 464
 465         /* Disable automatic zlp generation.  Driver is reponsible to indicate
 466          * explicitly through req->req.zero.  This is needed to enable multi-td
 467          * request. */
 468         zlt = 1;
 469
 470         /* Assume the max packet size from gadget is always correct */
 471         switch (desc->bmAttributes & 0x03) {
 472         case USB_ENDPOINT_XFER_CONTROL:
 473         case USB_ENDPOINT_XFER_BULK:
 474         case USB_ENDPOINT_XFER_INT:
 475                 /* mult = 0.  Execute N Transactions as demonstrated by
 476                  * the USB variable length packet protocol where N is
 477                  * computed using the Maximum Packet Length (dQH) and
 478                  * the Total Bytes field (dTD) */
 479                 mult = 0;
 480                 break;
 481         case USB_ENDPOINT_XFER_ISOC:
 482                 /* Calculate transactions needed for high bandwidth iso */
 483                 mult = (unsigned char)(1 + ((max >> 11) & 0x03));
 484                 max = max & 0x8ff;      /* bit 0~10 */
 485                 /* 3 transactions at most */
 486                 if (mult > 3)
 487                         goto en_done;
 488                 break;
 489         default:
 490                 goto en_done;
 491         }
 492
 493         spin_lock_irqsave(&udc->lock, flags);
 494         ep->ep.maxpacket = max;
 495         ep->desc = desc;
 496         ep->stopped = 0;
 497
 498         /* Controller related setup */
 499         /* Init EPx Queue Head (Ep Capabilites field in QH
 500          * according to max, zlt, mult) */
 501         struct_ep_qh_setup(udc, (unsigned char) ep_index(ep),
 502                         (unsigned char) ((desc->bEndpointAddress & USB_DIR_IN)
 503                                         ?  USB_SEND : USB_RECV),
 504                         (unsigned char) (desc->bmAttributes
 505                                         & USB_ENDPOINT_XFERTYPE_MASK),
 506                         max, zlt, mult);
 507
 508         /* Init endpoint ctrl register */
 509         dr_ep_setup((unsigned char) ep_index(ep),
 510                         (unsigned char) ((desc->bEndpointAddress & USB_DIR_IN)
 511                                         ? USB_SEND : USB_RECV),
 512                         (unsigned char) (desc->bmAttributes
 513                                         & USB_ENDPOINT_XFERTYPE_MASK));
 514
 515         spin_unlock_irqrestore(&udc->lock, flags);
 516         retval = 0;
 517
 518         VDBG("enabled %s (ep%d%s) maxpacket %d",ep->ep.name,
 519                         ep->desc->bEndpointAddress & 0x0f,
 520                         (desc->bEndpointAddress & USB_DIR_IN)
 521                                 ? "in" : "out", max);
 522 en_done:
 523         return retval;
 524 }
 525
 526 /*---------------------------------------------------------------------
 527  * @ep : the ep being unconfigured. May not be ep0
 528  * Any pending and uncomplete req will complete with status (-ESHUTDOWN)
 529 *---------------------------------------------------------------------*/
 530 static int fsl_ep_disable(struct usb_ep *_ep)
 531 {
 532         struct fsl_udc *udc = NULL;
 533         struct fsl_ep *ep = NULL;
 534         unsigned long flags = 0;
 535         u32 epctrl;
 536         int ep_num;
 537
 538         ep = container_of(_ep, struct fsl_ep, ep);
 539         if (!_ep || !ep->desc) {
 540                 VDBG("%s not enabled", _ep ? ep->ep.name : NULL);
 541                 return -EINVAL;
 542         }
 543
 544         /* disable ep on controller */
 545         ep_num = ep_index(ep);
 546         epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
 547         if (ep_is_in(ep))
 548                 epctrl &= ~EPCTRL_TX_ENABLE;
 549         else
 550                 epctrl &= ~EPCTRL_RX_ENABLE;
 551         fsl_writel(epctrl, &dr_regs->endptctrl[ep_num]);
 552
 553         udc = (struct fsl_udc *)ep->udc;
 554         spin_lock_irqsave(&udc->lock, flags);
 555
 556         /* nuke all pending requests (does flush) */
 557         nuke(ep, -ESHUTDOWN);
 558
 559         ep->desc = NULL;
 560         ep->stopped = 1;
 561         spin_unlock_irqrestore(&udc->lock, flags);
 562
 563         VDBG("disabled %s OK", _ep->name);
 564         return 0;
 565 }
 566
 567 /*---------------------------------------------------------------------
 568  * allocate a request object used by this endpoint
 569  * the main operation is to insert the req->queue to the eq->queue
 570  * Returns the request, or null if one could not be allocated
 571 *---------------------------------------------------------------------*/
 572 static struct usb_request *
 573 fsl_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
 574 {
 575         struct fsl_req *req = NULL;
 576
 577         req = kzalloc(sizeof *req, gfp_flags);
 578         if (!req)
 579                 return NULL;
 580
 581         req->req.dma = DMA_ADDR_INVALID;
 582         INIT_LIST_HEAD(&req->queue);
 583
 584         return &req->req;
 585 }
 586
 587 static void fsl_free_request(struct usb_ep *_ep, struct usb_request *_req)
 588 {
 589         struct fsl_req *req = NULL;
 590
 591         req = container_of(_req, struct fsl_req, req);
 592
 593         if (_req)
 594                 kfree(req);
 595 }
 596
 597 /*-------------------------------------------------------------------------*/
 598 static void fsl_queue_td(struct fsl_ep *ep, struct fsl_req *req)
 599 {
 600         int i = ep_index(ep) * 2 + ep_is_in(ep);
 601         u32 temp, bitmask, tmp_stat;
 602         struct ep_queue_head *dQH = &ep->udc->ep_qh[i];
 603
 604         /* VDBG("QH addr Register 0x%8x", dr_regs->endpointlistaddr);
 605         VDBG("ep_qh[%d] addr is 0x%8x", i, (u32)&(ep->udc->ep_qh[i])); */
 606
 607         bitmask = ep_is_in(ep)
 608                 ? (1 << (ep_index(ep) + 16))
 609                 : (1 << (ep_index(ep)));
 610
 611         /* check if the pipe is empty */
 612         if (!(list_empty(&ep->queue))) {
 613                 /* Add td to the end */
 614                 struct fsl_req *lastreq;
 615                 lastreq = list_entry(ep->queue.prev, struct fsl_req, queue);
 616                 lastreq->tail->next_td_ptr =
 617                         cpu_to_le32(req->head->td_dma & DTD_ADDR_MASK);
 618                 /* Read prime bit, if 1 goto done */
 619                 if (fsl_readl(&dr_regs->endpointprime) & bitmask)
 620                         goto out;
 621
 622                 do {
 623                         /* Set ATDTW bit in USBCMD */
 624                         temp = fsl_readl(&dr_regs->usbcmd);
 625                         fsl_writel(temp | USB_CMD_ATDTW, &dr_regs->usbcmd);
 626
 627                         /* Read correct status bit */
 628                         tmp_stat = fsl_readl(&dr_regs->endptstatus) & bitmask;
 629
 630                 } while (!(fsl_readl(&dr_regs->usbcmd) & USB_CMD_ATDTW));
 631
 632                 /* Write ATDTW bit to 0 */
 633                 temp = fsl_readl(&dr_regs->usbcmd);
 634                 fsl_writel(temp & ~USB_CMD_ATDTW, &dr_regs->usbcmd);
 635
 636                 if (tmp_stat)
 637                         goto out;
 638         }
 639
 640         /* Write dQH next pointer and terminate bit to 0 */
 641         temp = req->head->td_dma & EP_QUEUE_HEAD_NEXT_POINTER_MASK;
 642         dQH->next_dtd_ptr = cpu_to_le32(temp);
 643
 644         /* Clear active and halt bit */
 645         temp = cpu_to_le32(~(EP_QUEUE_HEAD_STATUS_ACTIVE
 646                         | EP_QUEUE_HEAD_STATUS_HALT));
 647         dQH->size_ioc_int_sts &= temp;
 648
 649         /* Ensure that updates to the QH will occure before priming. */
 650         wmb();
 651
 652         /* Prime endpoint by writing 1 to ENDPTPRIME */
 653         temp = ep_is_in(ep)
 654                 ? (1 << (ep_index(ep) + 16))
 655                 : (1 << (ep_index(ep)));
 656         fsl_writel(temp, &dr_regs->endpointprime);
 657 out:
 658         return;
 659 }
 660
 661 /* Fill in the dTD structure
 662  * @req: request that the transfer belongs to
 663  * @length: return actually data length of the dTD
 664  * @dma: return dma address of the dTD
 665  * @is_last: return flag if it is the last dTD of the request
 666  * return: pointer to the built dTD */
 667 static struct ep_td_struct *fsl_build_dtd(struct fsl_req *req, unsigned *length,
 668                 dma_addr_t *dma, int *is_last)
 669 {
 670         u32 swap_temp;
 671         struct ep_td_struct *dtd;
 672
 673         /* how big will this transfer be? */
 674         *length = min(req->req.length - req->req.actual,
 675                         (unsigned)EP_MAX_LENGTH_TRANSFER);
 676
 677         dtd = dma_pool_alloc(udc_controller->td_pool, GFP_KERNEL, dma);
 678         if (dtd == NULL)
 679                 return dtd;
 680
 681         dtd->td_dma = *dma;
 682         /* Clear reserved field */
 683         swap_temp = cpu_to_le32(dtd->size_ioc_sts);
 684         swap_temp &= ~DTD_RESERVED_FIELDS;
 685         dtd->size_ioc_sts = cpu_to_le32(swap_temp);
 686
 687         /* Init all of buffer page pointers */
 688         swap_temp = (u32) (req->req.dma + req->req.actual);
 689         dtd->buff_ptr0 = cpu_to_le32(swap_temp);
 690         dtd->buff_ptr1 = cpu_to_le32(swap_temp + 0x1000);
 691         dtd->buff_ptr2 = cpu_to_le32(swap_temp + 0x2000);
 692         dtd->buff_ptr3 = cpu_to_le32(swap_temp + 0x3000);
 693         dtd->buff_ptr4 = cpu_to_le32(swap_temp + 0x4000);
 694
 695         req->req.actual += *length;
 696
 697         /* zlp is needed if req->req.zero is set */
 698         if (req->req.zero) {
 699                 if (*length == 0 || (*length % req->ep->ep.maxpacket) != 0)
 700                         *is_last = 1;
 701                 else
 702                         *is_last = 0;
 703         } else if (req->req.length == req->req.actual)
 704                 *is_last = 1;
 705         else
 706                 *is_last = 0;
 707
 708         if ((*is_last) == 0)
 709                 VDBG("multi-dtd request!");
 710         /* Fill in the transfer size; set active bit */
 711         swap_temp = ((*length << DTD_LENGTH_BIT_POS) | DTD_STATUS_ACTIVE);
 712
 713         /* Enable interrupt for the last dtd of a request */
 714         if (*is_last && !req->req.no_interrupt)
 715                 swap_temp |= DTD_IOC;
 716
 717         dtd->size_ioc_sts = cpu_to_le32(swap_temp);
 718
 719         mb();
 720
 721         VDBG("length = %d address= 0x%x", *length, (int)*dma);
 722
 723         return dtd;
 724 }
 725
 726 /* Generate dtd chain for a request */
 727 static int fsl_req_to_dtd(struct fsl_req *req)
 728 {
 729         unsigned        count;
 730         int             is_last;
 731         int             is_first =1;
 732         struct ep_td_struct     *last_dtd = NULL, *dtd;
 733         dma_addr_t dma;
 734
 735         do {
 736                 dtd = fsl_build_dtd(req, &count, &dma, &is_last);
 737                 if (dtd == NULL)
 738                         return -ENOMEM;
 739
 740                 if (is_first) {
 741                         is_first = 0;
 742                         req->head = dtd;
 743                 } else {
 744                         last_dtd->next_td_ptr = cpu_to_le32(dma);
 745                         last_dtd->next_td_virt = dtd;
 746                 }
 747                 last_dtd = dtd;
 748
 749                 req->dtd_count++;
 750         } while (!is_last);
 751
 752         dtd->next_td_ptr = cpu_to_le32(DTD_NEXT_TERMINATE);
 753
 754         req->tail = dtd;
 755
 756         return 0;
 757 }
 758
 759 /* queues (submits) an I/O request to an endpoint */
 760 static int
 761 fsl_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
 762 {
 763         struct fsl_ep *ep = container_of(_ep, struct fsl_ep, ep);
 764         struct fsl_req *req = container_of(_req, struct fsl_req, req);
 765         struct fsl_udc *udc;
 766         unsigned long flags;
 767         int is_iso = 0;
 768
 769         /* catch various bogus parameters */
 770         if (!_req || !req->req.complete || !req->req.buf
 771                         || !list_empty(&req->queue)) {
 772                 VDBG("%s, bad params", __func__);
 773                 return -EINVAL;
 774         }
 775         if (unlikely(!_ep || !ep->desc)) {
 776                 VDBG("%s, bad ep", __func__);
 777                 return -EINVAL;
 778         }
 779         if (ep->desc->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
 780                 if (req->req.length > ep->ep.maxpacket)
 781                         return -EMSGSIZE;
 782                 is_iso = 1;
 783         }
 784
 785         udc = ep->udc;
 786         if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN)
 787                 return -ESHUTDOWN;
 788
 789         req->ep = ep;
 790
 791         /* map virtual address to hardware */
 792         if (req->req.dma == DMA_ADDR_INVALID) {
 793                 req->req.dma = dma_map_single(ep->udc->gadget.dev.parent,
 794                                         req->req.buf,
 795                                         req->req.length, ep_is_in(ep)
 796                                                 ? DMA_TO_DEVICE
 797                                                 : DMA_FROM_DEVICE);
 798                 req->mapped = 1;
 799         } else {
 800                 dma_sync_single_for_device(ep->udc->gadget.dev.parent,
 801                                         req->req.dma, req->req.length,
 802                                         ep_is_in(ep)
 803                                                 ? DMA_TO_DEVICE
 804                                                 : DMA_FROM_DEVICE);
 805                 req->mapped = 0;
 806         }
 807
 808         req->req.status = -EINPROGRESS;
 809         req->req.actual = 0;
 810         req->dtd_count = 0;
 811
 812         spin_lock_irqsave(&udc->lock, flags);
 813
 814         /* build dtds and push them to device queue */
 815         if (!fsl_req_to_dtd(req)) {
 816                 fsl_queue_td(ep, req);
 817         } else {
 818                 spin_unlock_irqrestore(&udc->lock, flags);
 819                 return -ENOMEM;
 820         }
 821
 822         /* Update ep0 state */
 823         if ((ep_index(ep) == 0))
 824                 udc->ep0_state = DATA_STATE_XMIT;
 825
 826         /* irq handler advances the queue */
 827         if (req != NULL)
 828                 list_add_tail(&req->queue, &ep->queue);
 829         spin_unlock_irqrestore(&udc->lock, flags);
 830
 831         return 0;
 832 }
 833
 834 /* dequeues (cancels, unlinks) an I/O request from an endpoint */
 835 static int fsl_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
 836 {
 837         struct fsl_ep *ep = container_of(_ep, struct fsl_ep, ep);
 838         struct fsl_req *req;
 839         unsigned long flags;
 840         int ep_num, stopped, ret = 0;
 841         u32 epctrl;
 842
 843         if (!_ep || !_req)
 844                 return -EINVAL;
 845
 846         spin_lock_irqsave(&ep->udc->lock, flags);
 847         stopped = ep->stopped;
 848
 849         /* Stop the ep before we deal with the queue */
 850         ep->stopped = 1;
 851         ep_num = ep_index(ep);
 852         epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
 853         if (ep_is_in(ep))
 854                 epctrl &= ~EPCTRL_TX_ENABLE;
 855         else
 856                 epctrl &= ~EPCTRL_RX_ENABLE;
 857         fsl_writel(epctrl, &dr_regs->endptctrl[ep_num]);
 858
 859         /* make sure it's actually queued on this endpoint */
 860         list_for_each_entry(req, &ep->queue, queue) {
 861                 if (&req->req == _req)
 862                         break;
 863         }
 864         if (&req->req != _req) {
 865                 ret = -EINVAL;
 866                 goto out;
 867         }
 868
 869         /* The request is in progress, or completed but not dequeued */
 870         if (ep->queue.next == &req->queue) {
 871                 _req->status = -ECONNRESET;
 872                 fsl_ep_fifo_flush(_ep); /* flush current transfer */
 873
 874                 /* The request isn't the last request in this ep queue */
 875                 if (req->queue.next != &ep->queue) {
 876                         struct ep_queue_head *qh;
 877                         struct fsl_req *next_req;
 878
 879                         qh = ep->qh;
 880                         next_req = list_entry(req->queue.next, struct fsl_req,
 881                                         queue);
 882
 883                         /* Point the QH to the first TD of next request */
 884                         fsl_writel((u32) next_req->head, &qh->curr_dtd_ptr);
 885                 }
 886
 887                 /* The request hasn't been processed, patch up the TD chain */
 888         } else {
 889                 struct fsl_req *prev_req;
 890
 891                 prev_req = list_entry(req->queue.prev, struct fsl_req, queue);
 892                 fsl_writel(fsl_readl(&req->tail->next_td_ptr),
 893                                 &prev_req->tail->next_td_ptr);
 894
 895         }
 896
 897         done(ep, req, -ECONNRESET);
 898
 899         /* Enable EP */
 900 out:    epctrl = fsl_readl(&dr_regs->endptctrl[ep_num]);
 901         if (ep_is_in(ep))
 902                 epctrl |= EPCTRL_TX_ENABLE;
 903         else
 904                 epctrl |= EPCTRL_RX_ENABLE;
 905         fsl_writel(epctrl, &dr_regs->endptctrl[ep_num]);
 906         ep->stopped = stopped;
 907
 908         spin_unlock_irqrestore(&ep->udc->lock, flags);
 909         return ret;
 910 }
 911
 912 /*-------------------------------------------------------------------------*/
 913
 914 /*-----------------------------------------------------------------
 915  * modify the endpoint halt feature
 916  * @ep: the non-isochronous endpoint being stalled
 917  * @value: 1--set halt  0--clear halt
 918  * Returns zero, or a negative error code.
 919 *----------------------------------------------------------------*/
 920 static int fsl_ep_set_halt(struct usb_ep *_ep, int value)
 921 {
 922         struct fsl_ep *ep = NULL;
 923         unsigned long flags = 0;
 924         int status = -EOPNOTSUPP;       /* operation not supported */
 925         unsigned char ep_dir = 0, ep_num = 0;
 926         struct fsl_udc *udc = NULL;
 927
 928         ep = container_of(_ep, struct fsl_ep, ep);
 929         udc = ep->udc;
 930         if (!_ep || !ep->desc) {
 931                 status = -EINVAL;
 932                 goto out;
 933         }
 934
 935         if (ep->desc->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
 936                 status = -EOPNOTSUPP;
 937                 goto out;
 938         }
 939
 940         /* Attempt to halt IN ep will fail if any transfer requests
 941          * are still queue */
 942         if (value && ep_is_in(ep) && !list_empty(&ep->queue)) {
 943                 status = -EAGAIN;
 944                 goto out;
 945         }
 946
 947         status = 0;
 948         ep_dir = ep_is_in(ep) ? USB_SEND : USB_RECV;
 949         ep_num = (unsigned char)(ep_index(ep));
 950         spin_lock_irqsave(&ep->udc->lock, flags);
 951         dr_ep_change_stall(ep_num, ep_dir, value);
 952         spin_unlock_irqrestore(&ep->udc->lock, flags);
 953
 954         if (ep_index(ep) == 0) {
 955                 udc->ep0_state = WAIT_FOR_SETUP;
 956                 udc->ep0_dir = 0;
 957         }
 958 out:
 959         VDBG(" %s %s halt stat %d", ep->ep.name,
 960                         value ?  "set" : "clear", status);
 961
 962         return status;
 963 }
 964
 965 static void fsl_ep_fifo_flush(struct usb_ep *_ep)
 966 {
 967         struct fsl_ep *ep;
 968         int ep_num, ep_dir;
 969         u32 bits;
 970         unsigned long timeout;
 971 #define FSL_UDC_FLUSH_TIMEOUT 1000
 972
 973         if (!_ep) {
 974                 return;
 975         } else {
 976                 ep = container_of(_ep, struct fsl_ep, ep);
 977                 if (!ep->desc)
 978                         return;
 979         }
 980         ep_num = ep_index(ep);
 981         ep_dir = ep_is_in(ep) ? USB_SEND : USB_RECV;
 982
 983         if (ep_num == 0)
 984                 bits = (1 << 16) | 1;
 985         else if (ep_dir == USB_SEND)
 986                 bits = 1 << (16 + ep_num);
 987         else
 988                 bits = 1 << ep_num;
 989
 990         timeout = jiffies + FSL_UDC_FLUSH_TIMEOUT;
 991         do {
 992                 fsl_writel(bits, &dr_regs->endptflush);
 993
 994                 /* Wait until flush complete */
 995                 while (fsl_readl(&dr_regs->endptflush)) {
 996                         if (time_after(jiffies, timeout)) {
 997                                 ERR("ep flush timeout\n");
 998                                 return;
 999                         }
1000                         cpu_relax();
1001                 }
1002                 /* See if we need to flush again */
1003         } while (fsl_readl(&dr_regs->endptstatus) & bits);
1004 }
1005
1006 static struct usb_ep_ops fsl_ep_ops = {
1007         .enable = fsl_ep_enable,
1008         .disable = fsl_ep_disable,
1009
1010         .alloc_request = fsl_alloc_request,
1011         .free_request = fsl_free_request,
1012
1013         .queue = fsl_ep_queue,
1014         .dequeue = fsl_ep_dequeue,
1015
1016         .set_halt = fsl_ep_set_halt,
1017         .fifo_flush = fsl_ep_fifo_flush,        /* flush fifo */
1018 };
1019
1020 /*-------------------------------------------------------------------------
1021                 Gadget Driver Layer Operations
1022 -------------------------------------------------------------------------*/
1023
1024 /*----------------------------------------------------------------------
1025  * Get the current frame number (from DR frame_index Reg )
1026  *----------------------------------------------------------------------*/
1027 static int fsl_get_frame(struct usb_gadget *gadget)
1028 {
1029         return (int)(fsl_readl(&dr_regs->frindex) & USB_FRINDEX_MASKS);
1030 }
1031
1032 /*-----------------------------------------------------------------------
1033  * Tries to wake up the host connected to this gadget
1034  -----------------------------------------------------------------------*/
1035 static int fsl_wakeup(struct usb_gadget *gadget)
1036 {
1037         struct fsl_udc *udc = container_of(gadget, struct fsl_udc, gadget);
1038         u32 portsc;
1039
1040         /* Remote wakeup feature not enabled by host */
1041         if (!udc->remote_wakeup)
1042                 return -ENOTSUPP;
1043
1044         portsc = fsl_readl(&dr_regs->portsc1);
1045         /* not suspended? */
1046         if (!(portsc & PORTSCX_PORT_SUSPEND))
1047                 return 0;
1048         /* trigger force resume */
1049         portsc |= PORTSCX_PORT_FORCE_RESUME;
1050         fsl_writel(portsc, &dr_regs->portsc1);
1051         return 0;
1052 }
1053
1054 static int can_pullup(struct fsl_udc *udc)
1055 {
1056         return udc->driver && udc->softconnect && udc->vbus_active;
1057 }
1058
1059 /* Notify controller that VBUS is powered, Called by whatever
1060    detects VBUS sessions */
1061 static int fsl_vbus_session(struct usb_gadget *gadget, int is_active)
1062 {
1063         struct fsl_udc  *udc;
1064         unsigned long   flags;
1065
1066         udc = container_of(gadget, struct fsl_udc, gadget);
1067         spin_lock_irqsave(&udc->lock, flags);
1068         VDBG("VBUS %s", is_active ? "on" : "off");
1069         udc->vbus_active = (is_active != 0);
1070         if (can_pullup(udc))
1071                 fsl_writel((fsl_readl(&dr_regs->usbcmd) | USB_CMD_RUN_STOP),
1072                                 &dr_regs->usbcmd);
1073         else
1074                 fsl_writel((fsl_readl(&dr_regs->usbcmd) & ~USB_CMD_RUN_STOP),
1075                                 &dr_regs->usbcmd);
1076         spin_unlock_irqrestore(&udc->lock, flags);
1077         return 0;
1078 }
1079
1080 /* constrain controller's VBUS power usage
1081  * This call is used by gadget drivers during SET_CONFIGURATION calls,
1082  * reporting how much power the device may consume.  For example, this
1083  * could affect how quickly batteries are recharged.
1084  *
1085  * Returns zero on success, else negative errno.
1086  */
1087 static int fsl_vbus_draw(struct usb_gadget *gadget, unsigned mA)
1088 {
1089         struct fsl_udc *udc;
1090
1091         udc = container_of(gadget, struct fsl_udc, gadget);
1092         if (udc->transceiver)
1093                 return otg_set_power(udc->transceiver, mA);
1094         return -ENOTSUPP;
1095 }
1096
1097 /* Change Data+ pullup status
1098  * this func is used by usb_gadget_connect/disconnet
1099  */
1100 static int fsl_pullup(struct usb_gadget *gadget, int is_on)
1101 {
1102         struct fsl_udc *udc;
1103
1104         udc = container_of(gadget, struct fsl_udc, gadget);
1105         udc->softconnect = (is_on != 0);
1106         if (can_pullup(udc))
1107                 fsl_writel((fsl_readl(&dr_regs->usbcmd) | USB_CMD_RUN_STOP),
1108                                 &dr_regs->usbcmd);
1109         else
1110                 fsl_writel((fsl_readl(&dr_regs->usbcmd) & ~USB_CMD_RUN_STOP),
1111                                 &dr_regs->usbcmd);
1112
1113         return 0;
1114 }
1115
1116 /* defined in gadget.h */
1117 static struct usb_gadget_ops fsl_gadget_ops = {
1118         .get_frame = fsl_get_frame,
1119         .wakeup = fsl_wakeup,
1120 /*      .set_selfpowered = fsl_set_selfpowered, */ /* Always selfpowered */
1121         .vbus_session = fsl_vbus_session,
1122         .vbus_draw = fsl_vbus_draw,
1123         .pullup = fsl_pullup,
1124 };
1125
1126 /* Set protocol stall on ep0, protocol stall will automatically be cleared
1127    on new transaction */
1128 static void ep0stall(struct fsl_udc *udc)
1129 {
1130         u32 tmp;
1131
1132         /* must set tx and rx to stall at the same time */
1133         tmp = fsl_readl(&dr_regs->endptctrl[0]);
1134         tmp |= EPCTRL_TX_EP_STALL | EPCTRL_RX_EP_STALL;
1135         fsl_writel(tmp, &dr_regs->endptctrl[0]);
1136         udc->ep0_state = WAIT_FOR_SETUP;
1137         udc->ep0_dir = 0;
1138 }
1139
1140 /* Prime a status phase for ep0 */
1141 static int ep0_prime_status(struct fsl_udc *udc, int direction)
1142 {
1143         struct fsl_req *req = udc->status_req;
1144         struct fsl_ep *ep;
1145
1146         if (direction == EP_DIR_IN)
1147                 udc->ep0_dir = USB_DIR_IN;
1148         else
1149                 udc->ep0_dir = USB_DIR_OUT;
1150
1151         ep = &udc->eps[0];
1152         udc->ep0_state = WAIT_FOR_OUT_STATUS;
1153
1154         req->ep = ep;
1155         req->req.length = 0;
1156         req->req.status = -EINPROGRESS;
1157         req->req.actual = 0;
1158         req->req.complete = NULL;
1159         req->dtd_count = 0;
1160
1161         if (fsl_req_to_dtd(req) == 0)
1162                 fsl_queue_td(ep, req);
1163         else
1164                 return -ENOMEM;
1165
1166         list_add_tail(&req->queue, &ep->queue);
1167
1168         return 0;
1169 }
1170
1171 static void udc_reset_ep_queue(struct fsl_udc *udc, u8 pipe)
1172 {
1173         struct fsl_ep *ep = get_ep_by_pipe(udc, pipe);
1174
1175         if (ep->name)
1176                 nuke(ep, -ESHUTDOWN);
1177 }
1178
1179 /*
1180  * ch9 Set address
1181  */
1182 static void ch9setaddress(struct fsl_udc *udc, u16 value, u16 index, u16 length)
1183 {
1184         /* Save the new address to device struct */
1185         udc->device_address = (u8) value;
1186         /* Update usb state */
1187         udc->usb_state = USB_STATE_ADDRESS;
1188         /* Status phase */
1189         if (ep0_prime_status(udc, EP_DIR_IN))
1190                 ep0stall(udc);
1191 }
1192
1193 /*
1194  * ch9 Get status
1195  */
1196 static void ch9getstatus(struct fsl_udc *udc, u8 request_type, u16 value,
1197                 u16 index, u16 length)
1198 {
1199         u16 tmp = 0;            /* Status, cpu endian */
1200         struct fsl_req *req;
1201         struct fsl_ep *ep;
1202
1203         ep = &udc->eps[0];
1204
1205         if ((request_type & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
1206                 /* Get device status */
1207                 tmp = 1 << USB_DEVICE_SELF_POWERED;
1208                 tmp |= udc->remote_wakeup << USB_DEVICE_REMOTE_WAKEUP;
1209         } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_INTERFACE) {
1210                 /* Get interface status */
1211                 /* We don't have interface information in udc driver */
1212                 tmp = 0;
1213         } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_ENDPOINT) {
1214                 /* Get endpoint status */
1215                 struct fsl_ep *target_ep;
1216
1217                 target_ep = get_ep_by_pipe(udc, get_pipe_by_windex(index));
1218
1219                 /* stall if endpoint doesn't exist */
1220                 if (!target_ep->desc)
1221                         goto stall;
1222                 tmp = dr_ep_get_stall(ep_index(target_ep), ep_is_in(target_ep))
1223                                 << USB_ENDPOINT_HALT;
1224         }
1225
1226         udc->ep0_dir = USB_DIR_IN;
1227         /* Borrow the per device status_req */
1228         req = udc->status_req;
1229         /* Fill in the reqest structure */
1230         *((u16 *) req->req.buf) = cpu_to_le16(tmp);
1231         req->ep = ep;
1232         req->req.length = 2;
1233         req->req.status = -EINPROGRESS;
1234         req->req.actual = 0;
1235         req->req.complete = NULL;
1236         req->dtd_count = 0;
1237
1238         /* prime the data phase */
1239         if ((fsl_req_to_dtd(req) == 0))
1240                 fsl_queue_td(ep, req);
1241         else                    /* no mem */
1242                 goto stall;
1243
1244         list_add_tail(&req->queue, &ep->queue);
1245         udc->ep0_state = DATA_STATE_XMIT;
1246         return;
1247 stall:
1248         ep0stall(udc);
1249 }
1250
1251 static void setup_received_irq(struct fsl_udc *udc,
1252                 struct usb_ctrlrequest *setup)
1253 {
1254         u16 wValue = le16_to_cpu(setup->wValue);
1255         u16 wIndex = le16_to_cpu(setup->wIndex);
1256         u16 wLength = le16_to_cpu(setup->wLength);
1257
1258         udc_reset_ep_queue(udc, 0);
1259
1260         /* We process some stardard setup requests here */
1261         switch (setup->bRequest) {
1262         case USB_REQ_GET_STATUS:
1263                 /* Data+Status phase from udc */
1264                 if ((setup->bRequestType & (USB_DIR_IN | USB_TYPE_MASK))
1265                                         != (USB_DIR_IN | USB_TYPE_STANDARD))
1266                         break;
1267                 ch9getstatus(udc, setup->bRequestType, wValue, wIndex, wLength);
1268                 return;
1269
1270         case USB_REQ_SET_ADDRESS:
1271                 /* Status phase from udc */
1272                 if (setup->bRequestType != (USB_DIR_OUT | USB_TYPE_STANDARD
1273                                                 | USB_RECIP_DEVICE))
1274                         break;
1275                 ch9setaddress(udc, wValue, wIndex, wLength);
1276                 return;
1277
1278         case USB_REQ_CLEAR_FEATURE:
1279         case USB_REQ_SET_FEATURE:
1280                 /* Status phase from udc */
1281         {
1282                 int rc = -EOPNOTSUPP;
1283
1284                 if ((setup->bRequestType & (USB_RECIP_MASK | USB_TYPE_MASK))
1285                                 == (USB_RECIP_ENDPOINT | USB_TYPE_STANDARD)) {
1286                         int pipe = get_pipe_by_windex(wIndex);
1287                         struct fsl_ep *ep;
1288
1289                         if (wValue != 0 || wLength != 0 || pipe > udc->max_ep)
1290                                 break;
1291                         ep = get_ep_by_pipe(udc, pipe);
1292
1293                         spin_unlock(&udc->lock);
1294                         rc = fsl_ep_set_halt(&ep->ep,
1295                                         (setup->bRequest == USB_REQ_SET_FEATURE)
1296                                                 ? 1 : 0);
1297                         spin_lock(&udc->lock);
1298
1299                 } else if ((setup->bRequestType & (USB_RECIP_MASK
1300                                 | USB_TYPE_MASK)) == (USB_RECIP_DEVICE
1301                                 | USB_TYPE_STANDARD)) {
1302                         /* Note: The driver has not include OTG support yet.
1303                          * This will be set when OTG support is added */
1304                         if (!gadget_is_otg(&udc->gadget))
1305                                 break;
1306                         else if (setup->bRequest == USB_DEVICE_B_HNP_ENABLE)
1307                                 udc->gadget.b_hnp_enable = 1;
1308                         else if (setup->bRequest == USB_DEVICE_A_HNP_SUPPORT)
1309                                 udc->gadget.a_hnp_support = 1;
1310                         else if (setup->bRequest ==
1311                                         USB_DEVICE_A_ALT_HNP_SUPPORT)
1312                                 udc->gadget.a_alt_hnp_support = 1;
1313                         else
1314                                 break;
1315                         rc = 0;
1316                 } else
1317                         break;
1318
1319                 if (rc == 0) {
1320                         if (ep0_prime_status(udc, EP_DIR_IN))
1321                                 ep0stall(udc);
1322                 }
1323                 return;
1324         }
1325
1326         default:
1327                 break;
1328         }
1329
1330         /* Requests handled by gadget */
1331         if (wLength) {
1332                 /* Data phase from gadget, status phase from udc */
1333                 udc->ep0_dir = (setup->bRequestType & USB_DIR_IN)
1334                                 ?  USB_DIR_IN : USB_DIR_OUT;
1335                 spin_unlock(&udc->lock);
1336                 if (udc->driver->setup(&udc->gadget,
1337                                 &udc->local_setup_buff) < 0)
1338                         ep0stall(udc);
1339                 spin_lock(&udc->lock);
1340                 udc->ep0_state = (setup->bRequestType & USB_DIR_IN)
1341                                 ?  DATA_STATE_XMIT : DATA_STATE_RECV;
1342         } else {
1343                 /* No data phase, IN status from gadget */
1344                 udc->ep0_dir = USB_DIR_IN;
1345                 spin_unlock(&udc->lock);
1346                 if (udc->driver->setup(&udc->gadget,
1347                                 &udc->local_setup_buff) < 0)
1348                         ep0stall(udc);
1349                 spin_lock(&udc->lock);
1350                 udc->ep0_state = WAIT_FOR_OUT_STATUS;
1351         }
1352 }
1353
1354 /* Process request for Data or Status phase of ep0
1355  * prime status phase if needed */
1356 static void ep0_req_complete(struct fsl_udc *udc, struct fsl_ep *ep0,
1357                 struct fsl_req *req)
1358 {
1359         if (udc->usb_state == USB_STATE_ADDRESS) {
1360                 /* Set the new address */
1361                 u32 new_address = (u32) udc->device_address;
1362                 fsl_writel(new_address << USB_DEVICE_ADDRESS_BIT_POS,
1363                                 &dr_regs->deviceaddr);
1364         }
1365
1366         done(ep0, req, 0);
1367
1368         switch (udc->ep0_state) {
1369         case DATA_STATE_XMIT:
1370                 /* receive status phase */
1371                 if (ep0_prime_status(udc, EP_DIR_OUT))
1372                         ep0stall(udc);
1373                 break;
1374         case DATA_STATE_RECV:
1375                 /* send status phase */
1376                 if (ep0_prime_status(udc, EP_DIR_IN))
1377                         ep0stall(udc);
1378                 break;
1379         case WAIT_FOR_OUT_STATUS:
1380                 udc->ep0_state = WAIT_FOR_SETUP;
1381                 break;
1382         case WAIT_FOR_SETUP:
1383                 ERR("Unexpect ep0 packets\n");
1384                 break;
1385         default:
1386                 ep0stall(udc);
1387                 break;
1388         }
1389 }
1390
1391 /* Tripwire mechanism to ensure a setup packet payload is extracted without
1392  * being corrupted by another incoming setup packet */
1393 static void tripwire_handler(struct fsl_udc *udc, u8 ep_num, u8 *buffer_ptr)
1394 {
1395         u32 temp;
1396         struct ep_queue_head *qh;
1397
1398         qh = &udc->ep_qh[ep_num * 2 + EP_DIR_OUT];
1399
1400         /* Clear bit in ENDPTSETUPSTAT */
1401         temp = fsl_readl(&dr_regs->endptsetupstat);
1402         fsl_writel(temp | (1 << ep_num), &dr_regs->endptsetupstat);
1403
1404         /* while a hazard exists when setup package arrives */
1405         do {
1406                 /* Set Setup Tripwire */
1407                 temp = fsl_readl(&dr_regs->usbcmd);
1408                 fsl_writel(temp | USB_CMD_SUTW, &dr_regs->usbcmd);
1409
1410                 /* Copy the setup packet to local buffer */
1411                 memcpy(buffer_ptr, (u8 *) qh->setup_buffer, 8);
1412         } while (!(fsl_readl(&dr_regs->usbcmd) & USB_CMD_SUTW));
1413
1414         /* Clear Setup Tripwire */
1415         temp = fsl_readl(&dr_regs->usbcmd);
1416         fsl_writel(temp & ~USB_CMD_SUTW, &dr_regs->usbcmd);
1417 }
1418
1419 /* process-ep_req(): free the completed Tds for this req */
1420 static int process_ep_req(struct fsl_udc *udc, int pipe,
1421                 struct fsl_req *curr_req)
1422 {
1423         struct ep_td_struct *curr_td;
1424         int     td_complete, actual, remaining_length, j, tmp;
1425         int     status = 0;
1426         int     errors = 0;
1427         struct  ep_queue_head *curr_qh = &udc->ep_qh[pipe];
1428         int direction = pipe % 2;
1429
1430         curr_td = curr_req->head;
1431         td_complete = 0;
1432         actual = curr_req->req.length;
1433
1434         for (j = 0; j < curr_req->dtd_count; j++) {
1435                 remaining_length = (le32_to_cpu(curr_td->size_ioc_sts)
1436                                         & DTD_PACKET_SIZE)
1437                                 >> DTD_LENGTH_BIT_POS;
1438                 actual -= remaining_length;
1439
1440                 if ((errors = le32_to_cpu(curr_td->size_ioc_sts) &
1441                                                 DTD_ERROR_MASK)) {
1442                         if (errors & DTD_STATUS_HALTED) {
1443                                 ERR("dTD error %08x QH=%d\n", errors, pipe);
1444                                 /* Clear the errors and Halt condition */
1445                                 tmp = le32_to_cpu(curr_qh->size_ioc_int_sts);
1446                                 tmp &= ~errors;
1447                                 curr_qh->size_ioc_int_sts = cpu_to_le32(tmp);
1448                                 status = -EPIPE;
1449                                 /* FIXME: continue with next queued TD? */
1450
1451                                 break;
1452                         }
1453                         if (errors & DTD_STATUS_DATA_BUFF_ERR) {
1454                                 VDBG("Transfer overflow");
1455                                 status = -EPROTO;
1456                                 break;
1457                         } else if (errors & DTD_STATUS_TRANSACTION_ERR) {
1458                                 VDBG("ISO error");
1459                                 status = -EILSEQ;
1460                                 break;
1461                         } else
1462                                 ERR("Unknown error has occured (0x%x)!\n",
1463                                         errors);
1464
1465                 } else if (le32_to_cpu(curr_td->size_ioc_sts)
1466                                 & DTD_STATUS_ACTIVE) {
1467                         VDBG("Request not complete");
1468                         status = REQ_UNCOMPLETE;
1469                         return status;
1470                 } else if (remaining_length) {
1471                         if (direction) {
1472                                 VDBG("Transmit dTD remaining length not zero");
1473                                 status = -EPROTO;
1474                                 break;
1475                         } else {
1476                                 td_complete++;
1477                                 break;
1478                         }
1479                 } else {
1480                         td_complete++;
1481                         VDBG("dTD transmitted successful");
1482                 }
1483
1484                 if (j != curr_req->dtd_count - 1)
1485                         curr_td = (struct ep_td_struct *)curr_td->next_td_virt;
1486         }
1487
1488         if (status)
1489                 return status;
1490
1491         curr_req->req.actual = actual;
1492
1493         return 0;
1494 }
1495
1496 /* Process a DTD completion interrupt */
1497 static void dtd_complete_irq(struct fsl_udc *udc)
1498 {
1499         u32 bit_pos;
1500         int i, ep_num, direction, bit_mask, status;
1501         struct fsl_ep *curr_ep;
1502         struct fsl_req *curr_req, *temp_req;
1503
1504         /* Clear the bits in the register */
1505         bit_pos = fsl_readl(&dr_regs->endptcomplete);
1506         fsl_writel(bit_pos, &dr_regs->endptcomplete);
1507
1508         if (!bit_pos)
1509                 return;
1510
1511         for (i = 0; i < udc->max_ep * 2; i++) {
1512                 ep_num = i >> 1;
1513                 direction = i % 2;
1514
1515                 bit_mask = 1 << (ep_num + 16 * direction);
1516
1517                 if (!(bit_pos & bit_mask))
1518                         continue;
1519
1520                 curr_ep = get_ep_by_pipe(udc, i);
1521
1522                 /* If the ep is configured */
1523                 if (curr_ep->name == NULL) {
1524                         WARNING("Invalid EP?");
1525                         continue;
1526                 }
1527
1528                 /* process the req queue until an uncomplete request */
1529                 list_for_each_entry_safe(curr_req, temp_req, &curr_ep->queue,
1530                                 queue) {
1531                         status = process_ep_req(udc, i, curr_req);
1532
1533                         VDBG("status of process_ep_req= %d, ep = %d",
1534                                         status, ep_num);
1535                         if (status == REQ_UNCOMPLETE)
1536                                 break;
1537                         /* write back status to req */
1538                         curr_req->req.status = status;
1539
1540                         if (ep_num == 0) {
1541                                 ep0_req_complete(udc, curr_ep, curr_req);
1542                                 break;
1543                         } else
1544                                 done(curr_ep, curr_req, status);
1545                 }
1546         }
1547 }
1548
1549 /* Process a port change interrupt */
1550 static void port_change_irq(struct fsl_udc *udc)
1551 {
1552         u32 speed;
1553
1554         /* Bus resetting is finished */
1555         if (!(fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_RESET)) {
1556                 /* Get the speed */
1557                 speed = (fsl_readl(&dr_regs->portsc1)
1558                                 & PORTSCX_PORT_SPEED_MASK);
1559                 switch (speed) {
1560                 case PORTSCX_PORT_SPEED_HIGH:
1561                         udc->gadget.speed = USB_SPEED_HIGH;
1562                         break;
1563                 case PORTSCX_PORT_SPEED_FULL:
1564                         udc->gadget.speed = USB_SPEED_FULL;
1565                         break;
1566                 case PORTSCX_PORT_SPEED_LOW:
1567                         udc->gadget.speed = USB_SPEED_LOW;
1568                         break;
1569                 default:
1570                         udc->gadget.speed = USB_SPEED_UNKNOWN;
1571                         break;
1572                 }
1573         }
1574
1575         /* Update USB state */
1576         if (!udc->resume_state)
1577                 udc->usb_state = USB_STATE_DEFAULT;
1578 }
1579
1580 /* Process suspend interrupt */
1581 static void suspend_irq(struct fsl_udc *udc)
1582 {
1583         udc->resume_state = udc->usb_state;
1584         udc->usb_state = USB_STATE_SUSPENDED;
1585
1586         /* report suspend to the driver, serial.c does not support this */
1587         if (udc->driver->suspend)
1588                 udc->driver->suspend(&udc->gadget);
1589 }
1590
1591 static void bus_resume(struct fsl_udc *udc)
1592 {
1593         udc->usb_state = udc->resume_state;
1594         udc->resume_state = 0;
1595
1596         /* report resume to the driver, serial.c does not support this */
1597         if (udc->driver->resume)
1598                 udc->driver->resume(&udc->gadget);
1599 }
1600
1601 /* Clear up all ep queues */
1602 static int reset_queues(struct fsl_udc *udc)
1603 {
1604         u8 pipe;
1605
1606         for (pipe = 0; pipe < udc->max_pipes; pipe++)
1607                 udc_reset_ep_queue(udc, pipe);
1608
1609         /* report disconnect; the driver is already quiesced */
1610         spin_unlock(&udc->lock);
1611         udc->driver->disconnect(&udc->gadget);
1612         spin_lock(&udc->lock);
1613
1614         return 0;
1615 }
1616
1617 /* Process reset interrupt */
1618 static void reset_irq(struct fsl_udc *udc)
1619 {
1620         u32 temp;
1621         unsigned long timeout;
1622
1623         /* Clear the device address */
1624         temp = fsl_readl(&dr_regs->deviceaddr);
1625         fsl_writel(temp & ~USB_DEVICE_ADDRESS_MASK, &dr_regs->deviceaddr);
1626
1627         udc->device_address = 0;
1628
1629         /* Clear usb state */
1630         udc->resume_state = 0;
1631         udc->ep0_dir = 0;
1632         udc->ep0_state = WAIT_FOR_SETUP;
1633         udc->remote_wakeup = 0; /* default to 0 on reset */
1634         udc->gadget.b_hnp_enable = 0;
1635         udc->gadget.a_hnp_support = 0;
1636         udc->gadget.a_alt_hnp_support = 0;
1637
1638         /* Clear all the setup token semaphores */
1639         temp = fsl_readl(&dr_regs->endptsetupstat);
1640         fsl_writel(temp, &dr_regs->endptsetupstat);
1641
1642         /* Clear all the endpoint complete status bits */
1643         temp = fsl_readl(&dr_regs->endptcomplete);
1644         fsl_writel(temp, &dr_regs->endptcomplete);
1645
1646         timeout = jiffies + 100;
1647         while (fsl_readl(&dr_regs->endpointprime)) {
1648                 /* Wait until all endptprime bits cleared */
1649                 if (time_after(jiffies, timeout)) {
1650                         ERR("Timeout for reset\n");
1651                         break;
1652                 }
1653                 cpu_relax();
1654         }
1655
1656         /* Write 1s to the flush register */
1657         fsl_writel(0xffffffff, &dr_regs->endptflush);
1658
1659         if (fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_RESET) {
1660                 VDBG("Bus reset");
1661                 /* Reset all the queues, include XD, dTD, EP queue
1662                  * head and TR Queue */
1663                 reset_queues(udc);
1664                 udc->usb_state = USB_STATE_DEFAULT;
1665         } else {
1666                 VDBG("Controller reset");
1667                 /* initialize usb hw reg except for regs for EP, not
1668                  * touch usbintr reg */
1669                 dr_controller_setup(udc);
1670
1671                 /* Reset all internal used Queues */
1672                 reset_queues(udc);
1673
1674                 ep0_setup(udc);
1675
1676                 /* Enable DR IRQ reg, Set Run bit, change udc state */
1677                 dr_controller_run(udc);
1678                 udc->usb_state = USB_STATE_ATTACHED;
1679         }
1680 }
1681
1682 /*
1683  * USB device controller interrupt handler
1684  */
1685 static irqreturn_t fsl_udc_irq(int irq, void *_udc)
1686 {
1687         struct fsl_udc *udc = _udc;
1688         u32 irq_src;
1689         irqreturn_t status = IRQ_NONE;
1690         unsigned long flags;
1691
1692         /* Disable ISR for OTG host mode */
1693         if (udc->stopped)
1694                 return IRQ_NONE;
1695         spin_lock_irqsave(&udc->lock, flags);
1696         irq_src = fsl_readl(&dr_regs->usbsts) & fsl_readl(&dr_regs->usbintr);
1697         /* Clear notification bits */
1698         fsl_writel(irq_src, &dr_regs->usbsts);
1699
1700         /* VDBG("irq_src [0x%8x]", irq_src); */
1701
1702         /* Need to resume? */
1703         if (udc->usb_state == USB_STATE_SUSPENDED)
1704                 if ((fsl_readl(&dr_regs->portsc1) & PORTSCX_PORT_SUSPEND) == 0)
1705                         bus_resume(udc);
1706
1707         /* USB Interrupt */
1708         if (irq_src & USB_STS_INT) {
1709                 VDBG("Packet int");
1710                 /* Setup package, we only support ep0 as control ep */
1711                 if (fsl_readl(&dr_regs->endptsetupstat) & EP_SETUP_STATUS_EP0) {
1712                         tripwire_handler(udc, 0,
1713                                         (u8 *) (&udc->local_setup_buff));
1714                         setup_received_irq(udc, &udc->local_setup_buff);
1715                         status = IRQ_HANDLED;
1716                 }
1717
1718                 /* completion of dtd */
1719                 if (fsl_readl(&dr_regs->endptcomplete)) {
1720                         dtd_complete_irq(udc);
1721                         status = IRQ_HANDLED;
1722                 }
1723         }
1724
1725         /* SOF (for ISO transfer) */
1726         if (irq_src & USB_STS_SOF) {
1727                 status = IRQ_HANDLED;
1728         }
1729
1730         /* Port Change */
1731         if (irq_src & USB_STS_PORT_CHANGE) {
1732                 port_change_irq(udc);
1733                 status = IRQ_HANDLED;
1734         }
1735
1736         /* Reset Received */
1737         if (irq_src & USB_STS_RESET) {
1738                 reset_irq(udc);
1739                 status = IRQ_HANDLED;
1740         }
1741
1742         /* Sleep Enable (Suspend) */
1743         if (irq_src & USB_STS_SUSPEND) {
1744                 suspend_irq(udc);
1745                 status = IRQ_HANDLED;
1746         }
1747
1748         if (irq_src & (USB_STS_ERR | USB_STS_SYS_ERR)) {
1749                 VDBG("Error IRQ %x", irq_src);
1750         }
1751
1752         spin_unlock_irqrestore(&udc->lock, flags);
1753         return status;
1754 }
1755
1756 /*----------------------------------------------------------------*
1757  * Hook to gadget drivers
1758  * Called by initialization code of gadget drivers
1759 *----------------------------------------------------------------*/
1760 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1761 {
1762         int retval = -ENODEV;
1763         unsigned long flags = 0;
1764
1765         if (!udc_controller)
1766                 return -ENODEV;
1767
1768         if (!driver || (driver->speed != USB_SPEED_FULL
1769                                 && driver->speed != USB_SPEED_HIGH)
1770                         || !driver->bind || !driver->disconnect
1771                         || !driver->setup)
1772                 return -EINVAL;
1773
1774         if (udc_controller->driver)
1775                 return -EBUSY;
1776
1777         /* lock is needed but whether should use this lock or another */
1778         spin_lock_irqsave(&udc_controller->lock, flags);
1779
1780         driver->driver.bus = NULL;
1781         /* hook up the driver */
1782         udc_controller->driver = driver;
1783         udc_controller->gadget.dev.driver = &driver->driver;
1784         spin_unlock_irqrestore(&udc_controller->lock, flags);
1785
1786         /* bind udc driver to gadget driver */
1787         retval = driver->bind(&udc_controller->gadget);
1788         if (retval) {
1789                 VDBG("bind to %s --> %d", driver->driver.name, retval);
1790                 udc_controller->gadget.dev.driver = NULL;
1791                 udc_controller->driver = NULL;
1792                 goto out;
1793         }
1794
1795         /* Enable DR IRQ reg and Set usbcmd reg  Run bit */
1796         dr_controller_run(udc_controller);
1797         udc_controller->usb_state = USB_STATE_ATTACHED;
1798         udc_controller->ep0_state = WAIT_FOR_SETUP;
1799         udc_controller->ep0_dir = 0;
1800         printk(KERN_INFO "%s: bind to driver %s\n",
1801                         udc_controller->gadget.name, driver->driver.name);
1802
1803 out:
1804         if (retval)
1805                 printk("gadget driver register failed %d\n", retval);
1806         return retval;
1807 }
1808 EXPORT_SYMBOL(usb_gadget_register_driver);
1809
1810 /* Disconnect from gadget driver */
1811 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1812 {
1813         struct fsl_ep *loop_ep;
1814         unsigned long flags;
1815
1816         if (!udc_controller)
1817                 return -ENODEV;
1818
1819         if (!driver || driver != udc_controller->driver || !driver->unbind)
1820                 return -EINVAL;
1821
1822         if (udc_controller->transceiver)
1823                 otg_set_peripheral(udc_controller->transceiver, NULL);
1824
1825         /* stop DR, disable intr */
1826         dr_controller_stop(udc_controller);
1827
1828         /* in fact, no needed */
1829         udc_controller->usb_state = USB_STATE_ATTACHED;
1830         udc_controller->ep0_state = WAIT_FOR_SETUP;
1831         udc_controller->ep0_dir = 0;
1832
1833         /* stand operation */
1834         spin_lock_irqsave(&udc_controller->lock, flags);
1835         udc_controller->gadget.speed = USB_SPEED_UNKNOWN;
1836         nuke(&udc_controller->eps[0], -ESHUTDOWN);
1837         list_for_each_entry(loop_ep, &udc_controller->gadget.ep_list,
1838                         ep.ep_list)
1839                 nuke(loop_ep, -ESHUTDOWN);
1840         spin_unlock_irqrestore(&udc_controller->lock, flags);
1841
1842         /* report disconnect; the controller is already quiesced */
1843         driver->disconnect(&udc_controller->gadget);
1844
1845         /* unbind gadget and unhook driver. */
1846         driver->unbind(&udc_controller->gadget);
1847         udc_controller->gadget.dev.driver = NULL;
1848         udc_controller->driver = NULL;
1849
1850         printk("unregistered gadget driver '%s'\n", driver->driver.name);
1851         return 0;
1852 }
1853 EXPORT_SYMBOL(usb_gadget_unregister_driver);
1854
1855 /*-------------------------------------------------------------------------
1856                 PROC File System Support
1857 -------------------------------------------------------------------------*/
1858 #ifdef CONFIG_USB_GADGET_DEBUG_FILES
1859
1860 #include <linux/seq_file.h>
1861
1862 static const char proc_filename[] = "driver/fsl_usb2_udc";
1863
1864 static int fsl_proc_read(char *page, char **start, off_t off, int count,
1865                 int *eof, void *_dev)
1866 {
1867         char *buf = page;
1868         char *next = buf;
1869         unsigned size = count;
1870         unsigned long flags;
1871         int t, i;
1872         u32 tmp_reg;
1873         struct fsl_ep *ep = NULL;
1874         struct fsl_req *req;
1875
1876         struct fsl_udc *udc = udc_controller;
1877         if (off != 0)
1878                 return 0;
1879
1880         spin_lock_irqsave(&udc->lock, flags);
1881
1882         /* ------basic driver information ---- */
1883         t = scnprintf(next, size,
1884                         DRIVER_DESC "\n"
1885                         "%s version: %s\n"
1886                         "Gadget driver: %s\n\n",
1887                         driver_name, DRIVER_VERSION,
1888                         udc->driver ? udc->driver->driver.name : "(none)");
1889         size -= t;
1890         next += t;
1891
1892         /* ------ DR Registers ----- */
1893         tmp_reg = fsl_readl(&dr_regs->usbcmd);
1894         t = scnprintf(next, size,
1895                         "USBCMD reg:\n"
1896                         "SetupTW: %d\n"
1897                         "Run/Stop: %s\n\n",
1898                         (tmp_reg & USB_CMD_SUTW) ? 1 : 0,
1899                         (tmp_reg & USB_CMD_RUN_STOP) ? "Run" : "Stop");
1900         size -= t;
1901         next += t;
1902
1903         tmp_reg = fsl_readl(&dr_regs->usbsts);
1904         t = scnprintf(next, size,
1905                         "USB Status Reg:\n"
1906                         "Dr Suspend: %d Reset Received: %d System Error: %s "
1907                         "USB Error Interrupt: %s\n\n",
1908                         (tmp_reg & USB_STS_SUSPEND) ? 1 : 0,
1909                         (tmp_reg & USB_STS_RESET) ? 1 : 0,
1910                         (tmp_reg & USB_STS_SYS_ERR) ? "Err" : "Normal",
1911                         (tmp_reg & USB_STS_ERR) ? "Err detected" : "No err");
1912         size -= t;
1913         next += t;
1914
1915         tmp_reg = fsl_readl(&dr_regs->usbintr);
1916         t = scnprintf(next, size,
1917                         "USB Intrrupt Enable Reg:\n"
1918                         "Sleep Enable: %d SOF Received Enable: %d "
1919                         "Reset Enable: %d\n"
1920                         "System Error Enable: %d "
1921                         "Port Change Dectected Enable: %d\n"
1922                         "USB Error Intr Enable: %d USB Intr Enable: %d\n\n",
1923                         (tmp_reg & USB_INTR_DEVICE_SUSPEND) ? 1 : 0,
1924                         (tmp_reg & USB_INTR_SOF_EN) ? 1 : 0,
1925                         (tmp_reg & USB_INTR_RESET_EN) ? 1 : 0,
1926                         (tmp_reg & USB_INTR_SYS_ERR_EN) ? 1 : 0,
1927                         (tmp_reg & USB_INTR_PTC_DETECT_EN) ? 1 : 0,
1928                         (tmp_reg & USB_INTR_ERR_INT_EN) ? 1 : 0,
1929                         (tmp_reg & USB_INTR_INT_EN) ? 1 : 0);
1930         size -= t;
1931         next += t;
1932
1933         tmp_reg = fsl_readl(&dr_regs->frindex);
1934         t = scnprintf(next, size,
1935                         "USB Frame Index Reg: Frame Number is 0x%x\n\n",
1936                         (tmp_reg & USB_FRINDEX_MASKS));
1937         size -= t;
1938         next += t;
1939
1940         tmp_reg = fsl_readl(&dr_regs->deviceaddr);
1941         t = scnprintf(next, size,
1942                         "USB Device Address Reg: Device Addr is 0x%x\n\n",
1943                         (tmp_reg & USB_DEVICE_ADDRESS_MASK));
1944         size -= t;
1945         next += t;
1946
1947         tmp_reg = fsl_readl(&dr_regs->endpointlistaddr);
1948         t = scnprintf(next, size,
1949                         "USB Endpoint List Address Reg: "
1950                         "Device Addr is 0x%x\n\n",
1951                         (tmp_reg & USB_EP_LIST_ADDRESS_MASK));
1952         size -= t;
1953         next += t;
1954
1955         tmp_reg = fsl_readl(&dr_regs->portsc1);
1956         t = scnprintf(next, size,
1957                 "USB Port Status&Control Reg:\n"
1958                 "Port Transceiver Type : %s Port Speed: %s\n"
1959                 "PHY Low Power Suspend: %s Port Reset: %s "
1960                 "Port Suspend Mode: %s\n"
1961                 "Over-current Change: %s "
1962                 "Port Enable/Disable Change: %s\n"
1963                 "Port Enabled/Disabled: %s "
1964                 "Current Connect Status: %s\n\n", ( {
1965                         char *s;
1966                         switch (tmp_reg & PORTSCX_PTS_FSLS) {
1967                         case PORTSCX_PTS_UTMI:
1968                                 s = "UTMI"; break;
1969                         case PORTSCX_PTS_ULPI:
1970                                 s = "ULPI "; break;
1971                         case PORTSCX_PTS_FSLS:
1972                                 s = "FS/LS Serial"; break;
1973                         default:
1974                                 s = "None"; break;
1975                         }
1976                         s;} ), ( {
1977                         char *s;
1978                         switch (tmp_reg & PORTSCX_PORT_SPEED_UNDEF) {
1979                         case PORTSCX_PORT_SPEED_FULL:
1980                                 s = "Full Speed"; break;
1981                         case PORTSCX_PORT_SPEED_LOW:
1982                                 s = "Low Speed"; break;
1983                         case PORTSCX_PORT_SPEED_HIGH:
1984                                 s = "High Speed"; break;
1985                         default:
1986                                 s = "Undefined"; break;
1987                         }
1988                         s;
1989                 } ),
1990                 (tmp_reg & PORTSCX_PHY_LOW_POWER_SPD) ?
1991                 "Normal PHY mode" : "Low power mode",
1992                 (tmp_reg & PORTSCX_PORT_RESET) ? "In Reset" :
1993                 "Not in Reset",
1994                 (tmp_reg & PORTSCX_PORT_SUSPEND) ? "In " : "Not in",
1995                 (tmp_reg & PORTSCX_OVER_CURRENT_CHG) ? "Dected" :
1996                 "No",
1997                 (tmp_reg & PORTSCX_PORT_EN_DIS_CHANGE) ? "Disable" :
1998                 "Not change",
1999                 (tmp_reg & PORTSCX_PORT_ENABLE) ? "Enable" :
2000                 "Not correct",
2001                 (tmp_reg & PORTSCX_CURRENT_CONNECT_STATUS) ?
2002                 "Attached" : "Not-Att");
2003         size -= t;
2004         next += t;
2005
2006         tmp_reg = fsl_readl(&dr_regs->usbmode);
2007         t = scnprintf(next, size,
2008                         "USB Mode Reg: Controller Mode is: %s\n\n", ( {
2009                                 char *s;
2010                                 switch (tmp_reg & USB_MODE_CTRL_MODE_HOST) {
2011                                 case USB_MODE_CTRL_MODE_IDLE:
2012                                         s = "Idle"; break;
2013                                 case USB_MODE_CTRL_MODE_DEVICE:
2014                                         s = "Device Controller"; break;
2015                                 case USB_MODE_CTRL_MODE_HOST:
2016                                         s = "Host Controller"; break;
2017                                 default:
2018                                         s = "None"; break;
2019                                 }
2020                                 s;
2021                         } ));
2022         size -= t;
2023         next += t;
2024
2025         tmp_reg = fsl_readl(&dr_regs->endptsetupstat);
2026         t = scnprintf(next, size,
2027                         "Endpoint Setup Status Reg: SETUP on ep 0x%x\n\n",
2028                         (tmp_reg & EP_SETUP_STATUS_MASK));
2029         size -= t;
2030         next += t;
2031
2032         for (i = 0; i < udc->max_ep / 2; i++) {
2033                 tmp_reg = fsl_readl(&dr_regs->endptctrl[i]);
2034                 t = scnprintf(next, size, "EP Ctrl Reg [0x%x]: = [0x%x]\n",
2035                                 i, tmp_reg);
2036                 size -= t;
2037                 next += t;
2038         }
2039         tmp_reg = fsl_readl(&dr_regs->endpointprime);
2040         t = scnprintf(next, size, "EP Prime Reg = [0x%x]\n\n", tmp_reg);
2041         size -= t;
2042         next += t;
2043
2044         tmp_reg = usb_sys_regs->snoop1;
2045         t = scnprintf(next, size, "Snoop1 Reg : = [0x%x]\n\n", tmp_reg);
2046         size -= t;
2047         next += t;
2048
2049         tmp_reg = usb_sys_regs->control;
2050         t = scnprintf(next, size, "General Control Reg : = [0x%x]\n\n",
2051                         tmp_reg);
2052         size -= t;
2053         next += t;
2054
2055         /* ------fsl_udc, fsl_ep, fsl_request structure information ----- */
2056         ep = &udc->eps[0];
2057         t = scnprintf(next, size, "For %s Maxpkt is 0x%x index is 0x%x\n",
2058                         ep->ep.name, ep_maxpacket(ep), ep_index(ep));
2059         size -= t;
2060         next += t;
2061
2062         if (list_empty(&ep->queue)) {
2063                 t = scnprintf(next, size, "its req queue is empty\n\n");
2064                 size -= t;
2065                 next += t;
2066         } else {
2067                 list_for_each_entry(req, &ep->queue, queue) {
2068                         t = scnprintf(next, size,
2069                                 "req %p actual 0x%x length 0x%x buf %p\n",
2070                                 &req->req, req->req.actual,
2071                                 req->req.length, req->req.buf);
2072                         size -= t;
2073                         next += t;
2074                 }
2075         }
2076         /* other gadget->eplist ep */
2077         list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
2078                 if (ep->desc) {
2079                         t = scnprintf(next, size,
2080                                         "\nFor %s Maxpkt is 0x%x "
2081                                         "index is 0x%x\n",
2082                                         ep->ep.name, ep_maxpacket(ep),
2083                                         ep_index(ep));
2084                         size -= t;
2085                         next += t;
2086
2087                         if (list_empty(&ep->queue)) {
2088                                 t = scnprintf(next, size,
2089                                                 "its req queue is empty\n\n");
2090                                 size -= t;
2091                                 next += t;
2092                         } else {
2093                                 list_for_each_entry(req, &ep->queue, queue) {
2094                                         t = scnprintf(next, size,
2095                                                 "req %p actual 0x%x length "
2096                                                 "0x%x  buf %p\n",
2097                                                 &req->req, req->req.actual,
2098                                                 req->req.length, req->req.buf);
2099                                         size -= t;
2100                                         next += t;
2101                                         }       /* end for each_entry of ep req */
2102                                 }       /* end for else */
2103                         }       /* end for if(ep->queue) */
2104                 }               /* end (ep->desc) */
2105
2106         spin_unlock_irqrestore(&udc->lock, flags);
2107
2108         *eof = 1;
2109         return count - size;
2110 }
2111
2112 #define create_proc_file()      create_proc_read_entry(proc_filename, \
2113                                 0, NULL, fsl_proc_read, NULL)
2114
2115 #define remove_proc_file()      remove_proc_entry(proc_filename, NULL)
2116
2117 #else                           /* !CONFIG_USB_GADGET_DEBUG_FILES */
2118
2119 #define create_proc_file()      do {} while (0)
2120 #define remove_proc_file()      do {} while (0)
2121
2122 #endif                          /* CONFIG_USB_GADGET_DEBUG_FILES */
2123
2124 /*-------------------------------------------------------------------------*/
2125
2126 /* Release udc structures */
2127 static void fsl_udc_release(struct device *dev)
2128 {
2129         complete(udc_controller->done);
2130         dma_free_coherent(dev, udc_controller->ep_qh_size,
2131                         udc_controller->ep_qh, udc_controller->ep_qh_dma);
2132         kfree(udc_controller);
2133 }
2134
2135 /******************************************************************
2136         Internal structure setup functions
2137 *******************************************************************/
2138 /*------------------------------------------------------------------
2139  * init resource for globle controller
2140  * Return the udc handle on success or NULL on failure
2141  ------------------------------------------------------------------*/
2142 static int __init struct_udc_setup(struct fsl_udc *udc,
2143                 struct platform_device *pdev)
2144 {
2145         struct fsl_usb2_platform_data *pdata;
2146         size_t size;
2147
2148         pdata = pdev->dev.platform_data;
2149         udc->phy_mode = pdata->phy_mode;
2150
2151         udc->eps = kzalloc(sizeof(struct fsl_ep) * udc->max_ep, GFP_KERNEL);
2152         if (!udc->eps) {
2153                 ERR("malloc fsl_ep failed\n");
2154                 return -1;
2155         }
2156
2157         /* initialized QHs, take care of alignment */
2158         size = udc->max_ep * sizeof(struct ep_queue_head);
2159         if (size < QH_ALIGNMENT)
2160                 size = QH_ALIGNMENT;
2161         else if ((size % QH_ALIGNMENT) != 0) {
2162                 size += QH_ALIGNMENT + 1;
2163                 size &= ~(QH_ALIGNMENT - 1);
2164         }
2165         udc->ep_qh = dma_alloc_coherent(&pdev->dev, size,
2166                                         &udc->ep_qh_dma, GFP_KERNEL);
2167         if (!udc->ep_qh) {
2168                 ERR("malloc QHs for udc failed\n");
2169                 kfree(udc->eps);
2170                 return -1;
2171         }
2172
2173         udc->ep_qh_size = size;
2174
2175         /* Initialize ep0 status request structure */
2176         /* FIXME: fsl_alloc_request() ignores ep argument */
2177         udc->status_req = container_of(fsl_alloc_request(NULL, GFP_KERNEL),
2178                         struct fsl_req, req);
2179         /* allocate a small amount of memory to get valid address */
2180         udc->status_req->req.buf = kmalloc(8, GFP_KERNEL);
2181         udc->status_req->req.dma = virt_to_phys(udc->status_req->req.buf);
2182
2183         udc->resume_state = USB_STATE_NOTATTACHED;
2184         udc->usb_state = USB_STATE_POWERED;
2185         udc->ep0_dir = 0;
2186         udc->remote_wakeup = 0; /* default to 0 on reset */
2187
2188         return 0;
2189 }
2190
2191 /*----------------------------------------------------------------
2192  * Setup the fsl_ep struct for eps
2193  * Link fsl_ep->ep to gadget->ep_list
2194  * ep0out is not used so do nothing here
2195  * ep0in should be taken care
2196  *--------------------------------------------------------------*/
2197 static int __init struct_ep_setup(struct fsl_udc *udc, unsigned char index,
2198                 char *name, int link)
2199 {
2200         struct fsl_ep *ep = &udc->eps[index];
2201
2202         ep->udc = udc;
2203         strcpy(ep->name, name);
2204         ep->ep.name = ep->name;
2205
2206         ep->ep.ops = &fsl_ep_ops;
2207         ep->stopped = 0;
2208
2209         /* for ep0: maxP defined in desc
2210          * for other eps, maxP is set by epautoconfig() called by gadget layer
2211          */
2212         ep->ep.maxpacket = (unsigned short) ~0;
2213
2214         /* the queue lists any req for this ep */
2215         INIT_LIST_HEAD(&ep->queue);
2216
2217         /* gagdet.ep_list used for ep_autoconfig so no ep0 */
2218         if (link)
2219                 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
2220         ep->gadget = &udc->gadget;
2221         ep->qh = &udc->ep_qh[index];
2222
2223         return 0;
2224 }
2225
2226 /* Driver probe function
2227  * all intialization operations implemented here except enabling usb_intr reg
2228  * board setup should have been done in the platform code
2229  */
2230 static int __init fsl_udc_probe(struct platform_device *pdev)
2231 {
2232         struct resource *res;
2233         int ret = -ENODEV;
2234         unsigned int i;
2235         u32 dccparams;
2236
2237         if (strcmp(pdev->name, driver_name)) {
2238                 VDBG("Wrong device");
2239                 return -ENODEV;
2240         }
2241
2242         udc_controller = kzalloc(sizeof(struct fsl_udc), GFP_KERNEL);
2243         if (udc_controller == NULL) {
2244                 ERR("malloc udc failed\n");
2245                 return -ENOMEM;
2246         }
2247
2248         spin_lock_init(&udc_controller->lock);
2249         udc_controller->stopped = 1;
2250
2251         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2252         if (!res) {
2253                 ret = -ENXIO;
2254                 goto err_kfree;
2255         }
2256
2257         if (!request_mem_region(res->start, res->end - res->start + 1,
2258                                 driver_name)) {
2259                 ERR("request mem region for %s failed\n", pdev->name);
2260                 ret = -EBUSY;
2261                 goto err_kfree;
2262         }
2263
2264         dr_regs = ioremap(res->start, res->end - res->start + 1);
2265         if (!dr_regs) {
2266                 ret = -ENOMEM;
2267                 goto err_release_mem_region;
2268         }
2269
2270         usb_sys_regs = (struct usb_sys_interface *)
2271                         ((u32)dr_regs + USB_DR_SYS_OFFSET);
2272
2273         /* Read Device Controller Capability Parameters register */
2274         dccparams = fsl_readl(&dr_regs->dccparams);
2275         if (!(dccparams & DCCPARAMS_DC)) {
2276                 ERR("This SOC doesn't support device role\n");
2277                 ret = -ENODEV;
2278                 goto err_iounmap;
2279         }
2280         /* Get max device endpoints */
2281         /* DEN is bidirectional ep number, max_ep doubles the number */
2282         udc_controller->max_ep = (dccparams & DCCPARAMS_DEN_MASK) * 2;
2283
2284         udc_controller->irq = platform_get_irq(pdev, 0);
2285         if (!udc_controller->irq) {
2286                 ret = -ENODEV;
2287                 goto err_iounmap;
2288         }
2289
2290         ret = request_irq(udc_controller->irq, fsl_udc_irq, IRQF_SHARED,
2291                         driver_name, udc_controller);
2292         if (ret != 0) {
2293                 ERR("cannot request irq %d err %d\n",
2294                                 udc_controller->irq, ret);
2295                 goto err_iounmap;
2296         }
2297
2298         /* Initialize the udc structure including QH member and other member */
2299         if (struct_udc_setup(udc_controller, pdev)) {
2300                 ERR("Can't initialize udc data structure\n");
2301                 ret = -ENOMEM;
2302                 goto err_free_irq;
2303         }
2304
2305         /* initialize usb hw reg except for regs for EP,
2306          * leave usbintr reg untouched */
2307         dr_controller_setup(udc_controller);
2308
2309         /* Setup gadget structure */
2310         udc_controller->gadget.ops = &fsl_gadget_ops;
2311         udc_controller->gadget.is_dualspeed = 1;
2312         udc_controller->gadget.ep0 = &udc_controller->eps[0].ep;
2313         INIT_LIST_HEAD(&udc_controller->gadget.ep_list);
2314         udc_controller->gadget.speed = USB_SPEED_UNKNOWN;
2315         udc_controller->gadget.name = driver_name;
2316
2317         /* Setup gadget.dev and register with kernel */
2318         dev_set_name(&udc_controller->gadget.dev, "gadget");
2319         udc_controller->gadget.dev.release = fsl_udc_release;
2320         udc_controller->gadget.dev.parent = &pdev->dev;
2321         ret = device_register(&udc_controller->gadget.dev);
2322         if (ret < 0)
2323                 goto err_free_irq;
2324
2325         /* setup QH and epctrl for ep0 */
2326         ep0_setup(udc_controller);
2327
2328         /* setup udc->eps[] for ep0 */
2329         struct_ep_setup(udc_controller, 0, "ep0", 0);
2330         /* for ep0: the desc defined here;
2331          * for other eps, gadget layer called ep_enable with defined desc
2332          */
2333         udc_controller->eps[0].desc = &fsl_ep0_desc;
2334         udc_controller->eps[0].ep.maxpacket = USB_MAX_CTRL_PAYLOAD;
2335
2336         /* setup the udc->eps[] for non-control endpoints and link
2337          * to gadget.ep_list */
2338         for (i = 1; i < (int)(udc_controller->max_ep / 2); i++) {
2339                 char name[14];
2340
2341                 sprintf(name, "ep%dout", i);
2342                 struct_ep_setup(udc_controller, i * 2, name, 1);
2343                 sprintf(name, "ep%din", i);
2344                 struct_ep_setup(udc_controller, i * 2 + 1, name, 1);
2345         }
2346
2347         /* use dma_pool for TD management */
2348         udc_controller->td_pool = dma_pool_create("udc_td", &pdev->dev,
2349                         sizeof(struct ep_td_struct),
2350                         DTD_ALIGNMENT, UDC_DMA_BOUNDARY);
2351         if (udc_controller->td_pool == NULL) {
2352                 ret = -ENOMEM;
2353                 goto err_unregister;
2354         }
2355         create_proc_file();
2356         return 0;
2357
2358 err_unregister:
2359         device_unregister(&udc_controller->gadget.dev);
2360 err_free_irq:
2361         free_irq(udc_controller->irq, udc_controller);
2362 err_iounmap:
2363         iounmap(dr_regs);
2364 err_release_mem_region:
2365         release_mem_region(res->start, res->end - res->start + 1);
2366 err_kfree:
2367         kfree(udc_controller);
2368         udc_controller = NULL;
2369         return ret;
2370 }
2371
2372 /* Driver removal function
2373  * Free resources and finish pending transactions
2374  */
2375 static int __exit fsl_udc_remove(struct platform_device *pdev)
2376 {
2377         struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2378
2379         DECLARE_COMPLETION(done);
2380
2381         if (!udc_controller)
2382                 return -ENODEV;
2383         udc_controller->done = &done;
2384
2385         /* DR has been stopped in usb_gadget_unregister_driver() */
2386         remove_proc_file();
2387
2388         /* Free allocated memory */
2389         kfree(udc_controller->status_req->req.buf);
2390         kfree(udc_controller->status_req);
2391         kfree(udc_controller->eps);
2392
2393         dma_pool_destroy(udc_controller->td_pool);
2394         free_irq(udc_controller->irq, udc_controller);
2395         iounmap(dr_regs);
2396         release_mem_region(res->start, res->end - res->start + 1);
2397
2398         device_unregister(&udc_controller->gadget.dev);
2399         /* free udc --wait for the release() finished */
2400         wait_for_completion(&done);
2401
2402         return 0;
2403 }
2404
2405 /*-----------------------------------------------------------------
2406  * Modify Power management attributes
2407  * Used by OTG statemachine to disable gadget temporarily
2408  -----------------------------------------------------------------*/
2409 static int fsl_udc_suspend(struct platform_device *pdev, pm_message_t state)
2410 {
2411         dr_controller_stop(udc_controller);
2412         return 0;
2413 }
2414
2415 /*-----------------------------------------------------------------
2416  * Invoked on USB resume. May be called in_interrupt.
2417  * Here we start the DR controller and enable the irq
2418  *-----------------------------------------------------------------*/
2419 static int fsl_udc_resume(struct platform_device *pdev)
2420 {
2421         /* Enable DR irq reg and set controller Run */
2422         if (udc_controller->stopped) {
2423                 dr_controller_setup(udc_controller);
2424                 dr_controller_run(udc_controller);
2425         }
2426         udc_controller->usb_state = USB_STATE_ATTACHED;
2427         udc_controller->ep0_state = WAIT_FOR_SETUP;
2428         udc_controller->ep0_dir = 0;
2429         return 0;
2430 }
2431
2432 /*-------------------------------------------------------------------------
2433         Register entry point for the peripheral controller driver
2434 --------------------------------------------------------------------------*/
2435
2436 static struct platform_driver udc_driver = {
2437         .remove  = __exit_p(fsl_udc_remove),
2438         /* these suspend and resume are not usb suspend and resume */
2439         .suspend = fsl_udc_suspend,
2440         .resume  = fsl_udc_resume,
2441         .driver  = {
2442                 .name = (char *)driver_name,
2443                 .owner = THIS_MODULE,
2444         },
2445 };
2446
2447 static int __init udc_init(void)
2448 {
2449         printk(KERN_INFO "%s (%s)\n", driver_desc, DRIVER_VERSION);
2450         return platform_driver_probe(&udc_driver, fsl_udc_probe);
2451 }
2452
2453 module_init(udc_init);
2454
2455 static void __exit udc_exit(void)
2456 {
2457         platform_driver_unregister(&udc_driver);
2458         printk("%s unregistered\n", driver_desc);
2459 }
2460
2461 module_exit(udc_exit);
2462
2463 MODULE_DESCRIPTION(DRIVER_DESC);
2464 MODULE_AUTHOR(DRIVER_AUTHOR);
2465 MODULE_LICENSE("GPL");
2466 MODULE_ALIAS("platform:fsl-usb2-udc");