1 /* Copyright (C) 2005-2006 by Texas Instruments */
6 #include <linux/slab.h>
7 #include <linux/list.h>
8 #include <linux/smp_lock.h>
9 #include <linux/errno.h>
10 #include <linux/dmapool.h>
17 /* hOptions bit masks for CPPI BDs */
18 #define CPPI_SOP_SET ((u32)(1 << 31))
19 #define CPPI_EOP_SET ((u32)(1 << 30))
20 #define CPPI_OWN_SET ((u32)(1 << 29)) /* owned by cppi */
21 #define CPPI_EOQ_MASK ((u32)(1 << 28))
22 #define CPPI_ZERO_SET ((u32)(1 << 23)) /* rx saw zlp; tx issues one */
23 #define CPPI_RXABT_MASK ((u32)(1 << 19)) /* need more rx buffers */
25 #define CPPI_RECV_PKTLEN_MASK 0xFFFF
26 #define CPPI_BUFFER_LEN_MASK 0xFFFF
28 #define CPPI_TEAR_READY ((u32)(1 << 31))
30 /* CPPI data structure definitions */
32 #define CPPI_DESCRIPTOR_ALIGN 16 // bytes; 5-dec docs say 4-byte align
34 struct cppi_descriptor {
35 /* Hardware Overlay */
36 u32 hNext; /**< Next(hardware) Buffer Descriptor Pointer */
37 u32 buffPtr; /**<Buffer Pointer (dma_addr_t) */
38 u32 bOffBLen; /**<Buffer_offset16,buffer_length16 */
39 u32 hOptions; /**<Option fields for SOP,EOP etc*/
41 struct cppi_descriptor *next;
42 dma_addr_t dma; /* address of this descriptor */
44 /* for Rx Desc, track original Buffer len to detect short packets */
46 } __attribute__ ((aligned(CPPI_DESCRIPTOR_ALIGN)));
49 /* forward declaration for CppiDmaController structure */
53 * Channel Control Structure
55 * CPPI Channel Control structure. Using he same for Tx/Rx. If need be
56 * derive out of this later.
59 /* First field must be dma_channel for easy type casting
60 * FIXME just use container_of() and be typesafe instead!
62 struct dma_channel Channel;
64 /* back pointer to the Dma Controller structure */
65 struct cppi *pController;
67 /* which direction of which endpoint? */
68 struct musb_hw_ep *pEndPt;
72 /* DMA modes: RNDIS or "transparent" */
75 /* book keeping for current transfer request */
79 u32 currOffset; /* requested segments */
80 u32 actualLen; /* completed (Channel.actual) */
82 void __iomem *stateRam; /* CPPI state */
84 /* BD management fields */
85 struct cppi_descriptor *bdPoolHead;
86 struct cppi_descriptor *activeQueueHead;
87 struct cppi_descriptor *activeQueueTail;
88 struct cppi_descriptor *lastHwBDProcessed;
90 /* use tx_complete in host role to track endpoints waiting for
91 * FIFONOTEMPTY to clear.
93 struct list_head tx_complete;
97 * CPPI Dma Controller Object
99 * CPPI Dma controller object.Encapsulates all bookeeping and Data
100 * structures pertaining to the CPPI Dma Controller.
103 struct dma_controller Controller;
105 void __iomem *pCoreBase;
107 struct cppi_channel txCppi[MUSB_C_NUM_EPT - 1];
108 struct cppi_channel rxCppi[MUSB_C_NUM_EPR - 1];
110 struct dma_pool *pool;
112 struct list_head tx_complete;
115 /* irq handling hook */
116 extern void cppi_completion(struct musb *, u32 rx, u32 tx);
118 #endif /* end of ifndef _CPPI_DMA_H_ */