1 /******************************************************************
2 * Copyright 2005 Mentor Graphics Corporation
3 * Copyright (C) 2005-2006 by Texas Instruments
5 * This file is part of the Inventra Controller Driver for Linux.
7 * The Inventra Controller Driver for Linux is free software; you
8 * can redistribute it and/or modify it under the terms of the GNU
9 * General Public License version 2 as published by the Free Software
12 * The Inventra Controller Driver for Linux is distributed in
13 * the hope that it will be useful, but WITHOUT ANY WARRANTY;
14 * without even the implied warranty of MERCHANTABILITY or
15 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 * License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with The Inventra Controller Driver for Linux ; if not,
20 * write to the Free Software Foundation, Inc., 59 Temple Place,
21 * Suite 330, Boston, MA 02111-1307 USA
23 * ANY DOWNLOAD, USE, REPRODUCTION, MODIFICATION OR DISTRIBUTION
24 * OF THIS DRIVER INDICATES YOUR COMPLETE AND UNCONDITIONAL ACCEPTANCE
25 * OF THOSE TERMS.THIS DRIVER IS PROVIDED "AS IS" AND MENTOR GRAPHICS
26 * MAKES NO WARRANTIES, EXPRESS OR IMPLIED, RELATED TO THIS DRIVER.
27 * MENTOR GRAPHICS SPECIFICALLY DISCLAIMS ALL IMPLIED WARRANTIES
28 * OF MERCHANTABILITY; FITNESS FOR A PARTICULAR PURPOSE AND
29 * NON-INFRINGEMENT. MENTOR GRAPHICS DOES NOT PROVIDE SUPPORT
30 * SERVICES OR UPDATES FOR THIS DRIVER, EVEN IF YOU ARE A MENTOR
31 * GRAPHICS SUPPORT CUSTOMER.
32 ******************************************************************/
34 #ifndef __MUSB_MUSBDEFS_H__
35 #define __MUSB_MUSBDEFS_H__
37 #include <linux/slab.h>
38 #include <linux/list.h>
39 #include <linux/interrupt.h>
40 #include <linux/smp_lock.h>
41 #include <linux/errno.h>
42 #include <linux/device.h>
43 #include <linux/usb_ch9.h>
44 #include <linux/usb_gadget.h>
45 #include <linux/usb.h>
46 #include <linux/usb/otg.h>
47 #include <linux/usb/musb.h>
57 #ifdef CONFIG_USB_MUSB_SOC
59 * Get core configuration from a header converted (by cfg_conv)
60 * from the Verilog config file generated by the core config utility
62 * For now we assume that header is provided along with other
63 * arch-specific files. Discrete chips will need a build tweak.
64 * So will using AHB IDs from silicon that provides them.
66 #include <asm/arch/hdrc_cnf.h>
72 #include "musb_gadget.h"
73 #include "../core/hcd.h"
74 #include "musb_host.h"
78 #ifdef CONFIG_USB_MUSB_OTG
80 #define is_peripheral_enabled(musb) ((musb)->board_mode != MUSB_HOST)
81 #define is_host_enabled(musb) ((musb)->board_mode != MUSB_PERIPHERAL)
82 #define is_otg_enabled(musb) ((musb)->board_mode == MUSB_OTG)
84 /* NOTE: otg and peripheral-only state machines start at B_IDLE.
85 * OTG or host-only go to A_IDLE when ID is sensed.
87 #define is_peripheral_active(m) (!(m)->bIsHost)
88 #define is_host_active(m) ((m)->bIsHost)
91 #define is_peripheral_enabled(musb) is_peripheral_capable()
92 #define is_host_enabled(musb) is_host_capable()
93 #define is_otg_enabled(musb) 0
95 #define is_peripheral_active(musb) is_peripheral_capable()
96 #define is_host_active(musb) is_host_capable()
99 #if defined(CONFIG_USB_MUSB_OTG) || defined(CONFIG_USB_MUSB_PERIPHERAL)
100 /* for some reason, the "select USB_GADGET_MUSB_HDRC" doesn't always
101 * override that choice selection (often USB_GADGET_DUMMY_HCD).
103 #ifndef CONFIG_USB_GADGET_MUSB_HDRC
104 #error bogus Kconfig output ... select CONFIG_USB_GADGET_MUSB_HDRC
106 #endif /* need MUSB gadget selection */
109 #ifdef CONFIG_PROC_FS
110 #include <linux/fs.h>
111 #define MUSB_CONFIG_PROC_FS
114 /****************************** PERIPHERAL ROLE *****************************/
116 #ifdef CONFIG_USB_GADGET_MUSB_HDRC
118 #define is_peripheral_capable() (1)
120 extern irqreturn_t musb_g_ep0_irq(struct musb *);
121 extern void musb_g_tx(struct musb *, u8);
122 extern void musb_g_rx(struct musb *, u8);
123 extern void musb_g_reset(struct musb *);
124 extern void musb_g_suspend(struct musb *);
125 extern void musb_g_resume(struct musb *);
126 extern void musb_g_disconnect(struct musb *);
130 #define is_peripheral_capable() (0)
132 static inline irqreturn_t musb_g_ep0_irq(struct musb *m) { return IRQ_NONE; }
133 static inline void musb_g_reset(struct musb *m) {}
134 static inline void musb_g_suspend(struct musb *m) {}
135 static inline void musb_g_resume(struct musb *m) {}
136 static inline void musb_g_disconnect(struct musb *m) {}
140 /****************************** HOST ROLE ***********************************/
142 #ifdef CONFIG_USB_MUSB_HDRC_HCD
144 #define is_host_capable() (1)
146 extern irqreturn_t musb_h_ep0_irq(struct musb *);
147 extern void musb_host_tx(struct musb *, u8);
148 extern void musb_host_rx(struct musb *, u8);
152 #define is_host_capable() (0)
154 static inline irqreturn_t musb_h_ep0_irq(struct musb *m) { return IRQ_NONE; }
155 static inline void musb_host_tx(struct musb *m, u8 e) {}
156 static inline void musb_host_rx(struct musb *m, u8 e) {}
161 /****************************** CONSTANTS ********************************/
170 #ifndef MUSB_C_NUM_EPS
171 #define MUSB_C_NUM_EPS ((u8)16)
174 #ifndef MUSB_MAX_END0_PACKET
175 #define MUSB_MAX_END0_PACKET ((u16)MGC_END0_FIFOSIZE)
178 /* host side ep0 states */
179 #define MGC_END0_START 0x0
180 #define MGC_END0_OUT 0x2
181 #define MGC_END0_IN 0x4
182 #define MGC_END0_STATUS 0x8
184 /* peripheral side ep0 states */
185 enum musb_g_ep0_state {
186 MGC_END0_STAGE_SETUP, /* idle, waiting for setup */
187 MGC_END0_STAGE_TX, /* IN data */
188 MGC_END0_STAGE_RX, /* OUT data */
189 MGC_END0_STAGE_STATUSIN, /* (after OUT data) */
190 MGC_END0_STAGE_STATUSOUT, /* (after IN data) */
191 MGC_END0_STAGE_ACKWAIT, /* after zlp, before statusin */
192 } __attribute__ ((packed));
194 /* OTG protocol constants */
195 #define OTG_TIME_A_WAIT_VRISE 100 /* msec (max) */
196 #define OTG_TIME_A_WAIT_BCON 0 /* 0=infinite; min 1000 msec */
197 #define OTG_TIME_A_IDLE_BDIS 200 /* msec (min) */
199 /*************************** REGISTER ACCESS ********************************/
201 /* Endpoint registers (other than dynfifo setup) can be accessed either
202 * directly with the "flat" model, or after setting up an index register.
205 #if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_ARCH_OMAP243X)
206 /* REVISIT "flat" takes about 1% more object code space and can't be very
207 * noticeable for speed differences. But for now indexed access seems to
208 * misbehave (on DaVinci) for at least peripheral IN ...
210 #define MUSB_FLAT_REG
213 /* TUSB mapping: "flat" plus ep0 special cases */
214 #if defined(CONFIG_USB_TUSB6010)
215 #define MGC_SelectEnd(_pBase, _bEnd) \
216 musb_writeb((_pBase), MGC_O_HDRC_INDEX, (_bEnd))
217 #define MGC_END_OFFSET MGC_TUSB_OFFSET
219 /* "flat" mapping: each endpoint has its own i/o address */
220 #elif defined(MUSB_FLAT_REG)
221 #define MGC_SelectEnd(_pBase, _bEnd) (((void)(_pBase)),((void)(_bEnd)))
222 #define MGC_END_OFFSET MGC_FLAT_OFFSET
224 /* "indexed" mapping: INDEX register controls register bank select */
226 #define MGC_SelectEnd(_pBase, _bEnd) \
227 musb_writeb((_pBase), MGC_O_HDRC_INDEX, (_bEnd))
228 #define MGC_END_OFFSET MGC_INDEXED_OFFSET
231 /* FIXME: replace with musb_readcsr(hw_ep *, REGNAME), etc
232 * using hw_ep->regs, for all access except writing INDEX
235 #define MGC_ReadCsr16(_pBase, _bOffset, _bEnd) \
236 musb_readw((_pBase), MGC_END_OFFSET((_bEnd), (_bOffset)))
237 #define MGC_WriteCsr16(_pBase, _bOffset, _bEnd, _bData) \
238 musb_writew((_pBase), MGC_END_OFFSET((_bEnd), (_bOffset)), (_bData))
240 #define MGC_ReadCsr16(_pBase, _bOffset, _bEnd) \
241 musb_readw(_pBase, (_bOffset + 0x10))
242 #define MGC_WriteCsr16(_pBase, _bOffset, _bEnd, _bData) \
243 musb_writew(_pBase, (_bOffset + 0x10), _bData)
246 /****************************** FUNCTIONS ********************************/
248 #define MUSB_HST_MODE(_pthis)\
249 { (_pthis)->bIsHost=TRUE; }
250 #define MUSB_DEV_MODE(_pthis) \
251 { (_pthis)->bIsHost=FALSE; }
253 #define test_devctl_hst_mode(_x) \
254 (musb_readb((_x)->pRegs, MGC_O_HDRC_DEVCTL)&MGC_M_DEVCTL_HM)
256 #define MUSB_MODE(musb) ((musb)->bIsHost ? "Host" : "Peripheral")
258 /************************** Ep Configuration ********************************/
260 /** The End point descriptor */
261 struct MUSB_EpFifoDescriptor {
262 u8 bType; /* 0 for autoconfig, CNTR, ISOC, BULK, INTR */
263 u8 bDir; /* 0 for autoconfig, INOUT, IN, OUT */
264 int wSize; /* 0 for autoconfig, or the size */
267 #define MUSB_EPD_AUTOCONFIG 0
269 #define MUSB_EPD_T_CNTRL 1
270 #define MUSB_EPD_T_ISOC 2
271 #define MUSB_EPD_T_BULK 3
272 #define MUSB_EPD_T_INTR 4
274 #define MUSB_EPD_D_INOUT 0
275 #define MUSB_EPD_D_TX 1
276 #define MUSB_EPD_D_RX 2
278 /******************************** TYPES *************************************/
281 * struct musb_hw_ep - endpoint hardware (bidirectional)
283 * Ordered slightly for better cacheline locality.
290 #ifdef CONFIG_USB_TUSB6010
294 /* index in musb->aLocalEnd[] */
297 /* hardware configuration, possibly dynamic */
299 u8 tx_double_buffered;
300 u8 rx_double_buffered;
301 u16 wMaxPacketSizeTx;
302 u16 wMaxPacketSizeRx;
304 struct dma_channel *tx_channel;
305 struct dma_channel *rx_channel;
307 #ifdef CONFIG_USB_TUSB6010
308 /* TUSB has "asynchronous" and "synchronous" dma modes */
309 dma_addr_t fifo_async;
310 dma_addr_t fifo_sync;
313 #ifdef CONFIG_USB_MUSB_HDRC_HCD
314 void __iomem *target_regs;
316 /* currently scheduled peripheral endpoint */
317 struct musb_qh *in_qh;
318 struct musb_qh *out_qh;
324 #ifdef CONFIG_USB_GADGET_MUSB_HDRC
325 /* peripheral side */
326 struct musb_ep ep_in; /* TX */
327 struct musb_ep ep_out; /* RX */
331 static inline struct usb_request *next_in_request(struct musb_hw_ep *hw_ep)
333 #ifdef CONFIG_USB_GADGET_MUSB_HDRC
334 return next_request(&hw_ep->ep_in);
340 static inline struct usb_request *next_out_request(struct musb_hw_ep *hw_ep)
342 #ifdef CONFIG_USB_GADGET_MUSB_HDRC
343 return next_request(&hw_ep->ep_out);
350 * struct musb - Driver instance data.
355 irqreturn_t (*isr)(int, void *);
356 struct work_struct irq_work;
358 #ifdef CONFIG_USB_MUSB_HDRC_HCD
360 /* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
361 #define MUSB_PORT_STAT_RESUME (1 << 31)
364 unsigned long rh_timer;
366 u8 bEnd0Stage; /* end0 stage while in host */
368 /* bulk traffic normally dedicates endpoint hardware, and each
369 * direction has its own ring of host side endpoints.
370 * we try to progress the transfer at the head of each endpoint's
371 * queue until it completes or NAKs too much; then we try the next
374 struct musb_hw_ep *bulk_ep;
376 struct list_head control; /* of musb_qh */
377 struct list_head in_bulk; /* of musb_qh */
378 struct list_head out_bulk; /* of musb_qh */
379 struct musb_qh *periodic[32]; /* tree of interrupt+iso */
382 /* called with IRQs blocked; ON/nonzero implies starting a session,
383 * and waiting at least a_wait_vrise_tmout.
385 void (*board_set_vbus)(struct musb *, int is_on);
387 struct dma_controller *pDmaController;
389 struct device *controller;
390 void __iomem *ctrl_base;
393 #ifdef CONFIG_USB_TUSB6010
398 /* passed down from chip/board specific irq handlers */
403 struct otg_transceiver xceiv;
407 struct musb_hw_ep aLocalEnd[MUSB_C_NUM_EPS];
408 #define control_ep aLocalEnd
410 #define VBUSERR_RETRY_COUNT 3
415 u8 board_mode; /* enum musb_mode */
416 int (*board_set_power)(int state);
418 u8 min_power; /* vbus for periph, in mA/2 */
420 /* active means connected and not suspended */
421 unsigned is_active:1;
423 unsigned bIsMultipoint:1;
425 unsigned bIgnoreDisconnect:1; /* during bus resets */
428 unsigned bBulkSplit:1;
429 #define can_bulk_split(musb,type) \
430 (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bBulkSplit)
432 #define can_bulk_split(musb,type) 0
436 unsigned bBulkCombine:1;
437 /* REVISIT allegedly doesn't work reliably */
439 #define can_bulk_combine(musb,type) \
440 (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bBulkCombine)
442 #define can_bulk_combine(musb,type) 0
445 #define can_bulk_combine(musb,type) 0
448 #ifdef CONFIG_USB_GADGET_MUSB_HDRC
449 unsigned bIsSelfPowered:1;
450 unsigned bMayWakeup:1;
451 unsigned bSetAddress:1;
452 unsigned bTestMode:1;
453 unsigned softconnect:1;
455 enum musb_g_ep0_state ep0_state;
458 u16 ackpend; /* ep0 */
459 struct usb_gadget g; /* the gadget */
460 struct usb_gadget_driver *pGadgetDriver; /* its driver */
463 #ifdef CONFIG_USB_MUSB_OTG
464 /* FIXME this can't be OTG-specific ... ? */
465 u8 bDelayPortPowerOff;
468 #ifdef MUSB_CONFIG_PROC_FS
469 struct proc_dir_entry *pProcEntry;
473 static inline void musb_set_vbus(struct musb *musb, int is_on)
475 musb->board_set_vbus(musb, is_on);
478 #ifdef CONFIG_USB_GADGET_MUSB_HDRC
479 static inline struct musb *gadget_to_musb(struct usb_gadget *g)
481 return container_of(g, struct musb, g);
486 /***************************** Glue it together *****************************/
488 extern const char musb_driver_name[];
490 extern void musb_start(struct musb *pThis);
491 extern void musb_stop(struct musb *pThis);
493 extern void musb_write_fifo(struct musb_hw_ep *ep,
494 u16 wCount, const u8 * pSource);
495 extern void musb_read_fifo(struct musb_hw_ep *ep,
496 u16 wCount, u8 * pDest);
498 extern void musb_load_testpacket(struct musb *);
500 extern irqreturn_t musb_interrupt(struct musb *);
502 extern void musb_platform_enable(struct musb *musb);
503 extern void musb_platform_disable(struct musb *musb);
505 #ifdef CONFIG_USB_TUSB6010
506 extern void musb_platform_try_idle(struct musb *musb);
507 extern int musb_platform_get_vbus_status(struct musb *musb);
509 #define musb_platform_try_idle(x) do {} while (0)
510 #define musb_platform_get_vbus_status(x) 0
513 extern int __init musb_platform_init(struct musb *musb);
514 extern int musb_platform_exit(struct musb *musb);
516 /*-------------------------- ProcFS definitions ---------------------*/
518 struct proc_dir_entry;
520 #if (MUSB_DEBUG > 0) && defined(MUSB_CONFIG_PROC_FS)
521 extern struct proc_dir_entry *musb_debug_create(char *name,
523 extern void musb_debug_delete(char *name, struct musb *data);
526 static inline struct proc_dir_entry *musb_debug_create(char *name,
531 static inline void musb_debug_delete(char *name, struct musb *data)
536 #endif /* __MUSB_MUSBDEFS_H__ */