5 * Author: Hannu Mallat <hmallat@cc.hut.fi>
7 * Copyright © 1999 Hannu Mallat
10 * Created : Thu Sep 23 18:17:43 1999, hmallat
11 * Last modified: Tue Nov 2 21:19:47 1999, hmallat
13 * Lots of the information here comes from the Daryll Strauss' Banshee
14 * patches to the XF86 server, and the rest comes from the 3dfx
15 * Banshee specification. I'm very much indebted to Daryll for his
16 * work on the X server.
18 * Voodoo3 support was contributed Harold Oga. Lots of additions
19 * (proper acceleration, 24 bpp, hardware cursor) and bug fixes by Attila
20 * Kesmarki. Thanks guys!
22 * Voodoo1 and Voodoo2 support aren't relevant to this driver as they
23 * behave very differently from the Voodoo3/4/5. For anyone wanting to
24 * use frame buffer on the Voodoo1/2, see the sstfb driver (which is
25 * located at http://www.sourceforge.net/projects/sstfb).
27 * While I _am_ grateful to 3Dfx for releasing the specs for Banshee,
28 * I do wish the next version is a bit more complete. Without the XF86
29 * patches I couldn't have gotten even this far... for instance, the
30 * extensions to the VGA register set go completely unmentioned in the
31 * spec! Also, lots of references are made to the 'SST core', but no
32 * spec is publicly available, AFAIK.
34 * The structure of this driver comes pretty much from the Permedia
35 * driver by Ilario Nardinocchi, which in turn is based on skeletonfb.
38 * - multihead support (basically need to support an array of fb_infos)
39 * - support other architectures (PPC, Alpha); does the fact that the VGA
40 * core can be accessed only thru I/O (not memory mapped) complicate
45 * 0.1.4 (released 2002-05-28) ported over to new fbdev api by James Simmons
47 * 0.1.3 (released 1999-11-02) added Attila's panning support, code
48 * reorg, hwcursor address page size alignment
49 * (for mmaping both frame buffer and regs),
50 * and my changes to get rid of hardcoded
51 * VGA i/o register locations (uses PCI
52 * configuration info now)
53 * 0.1.2 (released 1999-10-19) added Attila Kesmarki's bug fixes and
55 * 0.1.1 (released 1999-10-07) added Voodoo3 support by Harold Oga.
56 * 0.1.0 (released 1999-10-06) initial version
60 #include <linux/module.h>
61 #include <linux/kernel.h>
62 #include <linux/errno.h>
63 #include <linux/string.h>
65 #include <linux/slab.h>
67 #include <linux/init.h>
68 #include <linux/pci.h>
71 #include <video/tdfx.h>
75 #define DPRINTK(a,b...) printk(KERN_DEBUG "fb: %s: " a, __FUNCTION__ , ## b)
77 #define DPRINTK(a,b...)
83 /* duplicate asm/mtrr.h defines to work on archs without mtrr */
84 #define MTRR_TYPE_WRCOMB 1
86 static inline int mtrr_add(unsigned long base, unsigned long size,
87 unsigned int type, char increment)
91 static inline int mtrr_del(int reg, unsigned long base,
98 #define BANSHEE_MAX_PIXCLOCK 270000
99 #define VOODOO3_MAX_PIXCLOCK 300000
100 #define VOODOO5_MAX_PIXCLOCK 350000
102 static struct fb_fix_screeninfo tdfx_fix __devinitdata = {
104 .type = FB_TYPE_PACKED_PIXELS,
105 .visual = FB_VISUAL_PSEUDOCOLOR,
108 .accel = FB_ACCEL_3DFX_BANSHEE
111 static struct fb_var_screeninfo tdfx_var __devinitdata = {
112 /* "640x480, 8 bpp @ 60 Hz */
116 .yres_virtual = 1024,
121 .activate = FB_ACTIVATE_NOW,
124 .accel_flags = FB_ACCELF_TEXT,
132 .vmode = FB_VMODE_NONINTERLACED
136 * PCI driver prototypes
138 static int __devinit tdfxfb_probe(struct pci_dev *pdev,
139 const struct pci_device_id *id);
140 static void __devexit tdfxfb_remove(struct pci_dev *pdev);
142 static struct pci_device_id tdfxfb_id_table[] = {
143 { PCI_VENDOR_ID_3DFX, PCI_DEVICE_ID_3DFX_BANSHEE,
144 PCI_ANY_ID, PCI_ANY_ID, PCI_BASE_CLASS_DISPLAY << 16,
146 { PCI_VENDOR_ID_3DFX, PCI_DEVICE_ID_3DFX_VOODOO3,
147 PCI_ANY_ID, PCI_ANY_ID, PCI_BASE_CLASS_DISPLAY << 16,
149 { PCI_VENDOR_ID_3DFX, PCI_DEVICE_ID_3DFX_VOODOO5,
150 PCI_ANY_ID, PCI_ANY_ID, PCI_BASE_CLASS_DISPLAY << 16,
155 static struct pci_driver tdfxfb_driver = {
157 .id_table = tdfxfb_id_table,
158 .probe = tdfxfb_probe,
159 .remove = __devexit_p(tdfxfb_remove),
162 MODULE_DEVICE_TABLE(pci, tdfxfb_id_table);
168 static int nowrap = 1; /* not implemented (yet) */
169 static int hwcursor = 1;
170 static char *mode_option __devinitdata;
172 static int nomtrr __devinitdata;
174 /* -------------------------------------------------------------------------
175 * Hardware-specific funcions
176 * ------------------------------------------------------------------------- */
178 static inline u8 vga_inb(struct tdfx_par *par, u32 reg)
180 return inb(par->iobase + reg - 0x300);
183 static inline void vga_outb(struct tdfx_par *par, u32 reg, u8 val)
185 outb(val, par->iobase + reg - 0x300);
188 static inline void gra_outb(struct tdfx_par *par, u32 idx, u8 val)
190 vga_outb(par, GRA_I, idx);
192 vga_outb(par, GRA_D, val);
196 static inline void seq_outb(struct tdfx_par *par, u32 idx, u8 val)
198 vga_outb(par, SEQ_I, idx);
200 vga_outb(par, SEQ_D, val);
204 static inline u8 seq_inb(struct tdfx_par *par, u32 idx)
206 vga_outb(par, SEQ_I, idx);
208 return vga_inb(par, SEQ_D);
211 static inline void crt_outb(struct tdfx_par *par, u32 idx, u8 val)
213 vga_outb(par, CRT_I, idx);
215 vga_outb(par, CRT_D, val);
219 static inline u8 crt_inb(struct tdfx_par *par, u32 idx)
221 vga_outb(par, CRT_I, idx);
223 return vga_inb(par, CRT_D);
226 static inline void att_outb(struct tdfx_par *par, u32 idx, u8 val)
230 tmp = vga_inb(par, IS1_R);
231 vga_outb(par, ATT_IW, idx);
232 vga_outb(par, ATT_IW, val);
235 static inline void vga_disable_video(struct tdfx_par *par)
239 s = seq_inb(par, 0x01) | 0x20;
240 seq_outb(par, 0x00, 0x01);
241 seq_outb(par, 0x01, s);
242 seq_outb(par, 0x00, 0x03);
245 static inline void vga_enable_video(struct tdfx_par *par)
249 s = seq_inb(par, 0x01) & 0xdf;
250 seq_outb(par, 0x00, 0x01);
251 seq_outb(par, 0x01, s);
252 seq_outb(par, 0x00, 0x03);
255 static inline void vga_enable_palette(struct tdfx_par *par)
259 vga_outb(par, ATT_IW, 0x20);
262 static inline u32 tdfx_inl(struct tdfx_par *par, unsigned int reg)
264 return readl(par->regbase_virt + reg);
267 static inline void tdfx_outl(struct tdfx_par *par, unsigned int reg, u32 val)
269 writel(val, par->regbase_virt + reg);
272 static inline void banshee_make_room(struct tdfx_par *par, int size)
274 /* Note: The Voodoo3's onboard FIFO has 32 slots. This loop
275 * won't quit if you ask for more. */
276 while ((tdfx_inl(par, STATUS) & 0x1f) < size - 1)
280 static int banshee_wait_idle(struct fb_info *info)
282 struct tdfx_par *par = info->par;
285 banshee_make_room(par, 1);
286 tdfx_outl(par, COMMAND_3D, COMMAND_3D_NOP);
289 if ((tdfx_inl(par, STATUS) & STATUS_BUSY) == 0)
297 * Set the color of a palette entry in 8bpp mode
299 static inline void do_setpalentry(struct tdfx_par *par, unsigned regno, u32 c)
301 banshee_make_room(par, 2);
302 tdfx_outl(par, DACADDR, regno);
303 /* read after write makes it working */
304 tdfx_inl(par, DACADDR);
305 tdfx_outl(par, DACDATA, c);
308 static u32 do_calc_pll(int freq, int *freq_out)
310 int m, n, k, best_m, best_n, best_k, best_error;
314 best_n = best_m = best_k = 0;
316 for (k = 3; k >= 0; k--) {
317 for (m = 63; m >= 0; m--) {
319 * Estimate value of n that produces target frequency
320 * with current m and k
322 int n_estimated = ((freq * (m + 2) << k) / fref) - 2;
324 /* Search neighborhood of estimated n */
325 for (n = max(0, n_estimated);
326 n <= min(255, n_estimated + 1);
329 * Calculate PLL freqency with current m, k and
332 int f = (fref * (n + 2) / (m + 2)) >> k;
333 int error = abs(f - freq);
336 * If this is the closest we've come to the
337 * target frequency then remember n, m and k
339 if (error < best_error) {
352 *freq_out = (fref * (n + 2) / (m + 2)) >> k;
354 return (n << 8) | (m << 2) | k;
357 static void do_write_regs(struct fb_info *info, struct banshee_reg *reg)
359 struct tdfx_par *par = info->par;
362 banshee_wait_idle(info);
364 tdfx_outl(par, MISCINIT1, tdfx_inl(par, MISCINIT1) | 0x01);
366 crt_outb(par, 0x11, crt_inb(par, 0x11) & 0x7f); /* CRT unprotect */
368 banshee_make_room(par, 3);
369 tdfx_outl(par, VGAINIT1, reg->vgainit1 & 0x001FFFFF);
370 tdfx_outl(par, VIDPROCCFG, reg->vidcfg & ~0x00000001);
372 tdfx_outl(par, PLLCTRL1, reg->mempll);
373 tdfx_outl(par, PLLCTRL2, reg->gfxpll);
375 tdfx_outl(par, PLLCTRL0, reg->vidpll);
377 vga_outb(par, MISC_W, reg->misc[0x00] | 0x01);
379 for (i = 0; i < 5; i++)
380 seq_outb(par, i, reg->seq[i]);
382 for (i = 0; i < 25; i++)
383 crt_outb(par, i, reg->crt[i]);
385 for (i = 0; i < 9; i++)
386 gra_outb(par, i, reg->gra[i]);
388 for (i = 0; i < 21; i++)
389 att_outb(par, i, reg->att[i]);
391 crt_outb(par, 0x1a, reg->ext[0]);
392 crt_outb(par, 0x1b, reg->ext[1]);
394 vga_enable_palette(par);
395 vga_enable_video(par);
397 banshee_make_room(par, 9);
398 tdfx_outl(par, VGAINIT0, reg->vgainit0);
399 tdfx_outl(par, DACMODE, reg->dacmode);
400 tdfx_outl(par, VIDDESKSTRIDE, reg->stride);
401 tdfx_outl(par, HWCURPATADDR, reg->curspataddr);
403 tdfx_outl(par, VIDSCREENSIZE, reg->screensize);
404 tdfx_outl(par, VIDDESKSTART, reg->startaddr);
405 tdfx_outl(par, VIDPROCCFG, reg->vidcfg);
406 tdfx_outl(par, VGAINIT1, reg->vgainit1);
407 tdfx_outl(par, MISCINIT0, reg->miscinit0);
409 banshee_make_room(par, 8);
410 tdfx_outl(par, SRCBASE, reg->startaddr);
411 tdfx_outl(par, DSTBASE, reg->startaddr);
412 tdfx_outl(par, COMMANDEXTRA_2D, 0);
413 tdfx_outl(par, CLIP0MIN, 0);
414 tdfx_outl(par, CLIP0MAX, 0x0fff0fff);
415 tdfx_outl(par, CLIP1MIN, 0);
416 tdfx_outl(par, CLIP1MAX, 0x0fff0fff);
417 tdfx_outl(par, SRCXY, 0);
419 banshee_wait_idle(info);
422 static unsigned long do_lfb_size(struct tdfx_par *par, unsigned short dev_id)
424 u32 draminit0 = tdfx_inl(par, DRAMINIT0);
425 u32 draminit1 = tdfx_inl(par, DRAMINIT1);
427 int num_chips = (draminit0 & DRAMINIT0_SGRAM_NUM) ? 8 : 4;
428 int chip_size; /* in MB */
429 int has_sgram = draminit1 & DRAMINIT1_MEM_SDRAM;
431 if (dev_id < PCI_DEVICE_ID_3DFX_VOODOO5) {
432 /* Banshee/Voodoo3 */
434 if (has_sgram && (draminit0 & DRAMINIT0_SGRAM_TYPE))
439 chip_size = draminit0 & DRAMINIT0_SGRAM_TYPE_MASK;
440 chip_size = 1 << (chip_size >> DRAMINIT0_SGRAM_TYPE_SHIFT);
443 /* disable block writes for SDRAM */
444 miscinit1 = tdfx_inl(par, MISCINIT1);
445 miscinit1 |= has_sgram ? 0 : MISCINIT1_2DBLOCK_DIS;
446 miscinit1 |= MISCINIT1_CLUT_INV;
448 banshee_make_room(par, 1);
449 tdfx_outl(par, MISCINIT1, miscinit1);
450 return num_chips * chip_size * 1024l * 1024;
453 /* ------------------------------------------------------------------------- */
455 static int tdfxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
457 struct tdfx_par *par = info->par;
460 if (var->bits_per_pixel != 8 && var->bits_per_pixel != 16 &&
461 var->bits_per_pixel != 24 && var->bits_per_pixel != 32) {
462 DPRINTK("depth not supported: %u\n", var->bits_per_pixel);
466 if (var->xres != var->xres_virtual)
467 var->xres_virtual = var->xres;
469 if (var->yres > var->yres_virtual)
470 var->yres_virtual = var->yres;
473 DPRINTK("xoffset not supported\n");
478 /* Banshee doesn't support interlace, but Voodoo4/5 and probably Voodoo3 do. */
479 /* no direct information about device id now? use max_pixclock for this... */
480 if (((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) &&
481 (par->max_pixclock < VOODOO3_MAX_PIXCLOCK)) {
482 DPRINTK("interlace not supported\n");
486 var->xres = (var->xres + 15) & ~15; /* could sometimes be 8 */
487 lpitch = var->xres * ((var->bits_per_pixel + 7) >> 3);
489 if (var->xres < 320 || var->xres > 2048) {
490 DPRINTK("width not supported: %u\n", var->xres);
494 if (var->yres < 200 || var->yres > 2048) {
495 DPRINTK("height not supported: %u\n", var->yres);
499 if (lpitch * var->yres_virtual > info->fix.smem_len) {
500 var->yres_virtual = info->fix.smem_len / lpitch;
501 if (var->yres_virtual < var->yres) {
502 DPRINTK("no memory for screen (%ux%ux%u)\n",
503 var->xres, var->yres_virtual,
504 var->bits_per_pixel);
509 if (PICOS2KHZ(var->pixclock) > par->max_pixclock) {
510 DPRINTK("pixclock too high (%ldKHz)\n",
511 PICOS2KHZ(var->pixclock));
515 var->transp.offset = 0;
516 var->transp.length = 0;
517 switch (var->bits_per_pixel) {
519 var->red.length = var->green.length = var->blue.length = 8;
522 var->red.offset = 11;
524 var->green.offset = 5;
525 var->green.length = 6;
526 var->blue.offset = 0;
527 var->blue.length = 5;
530 var->transp.offset = 24;
531 var->transp.length = 8;
533 var->red.offset = 16;
534 var->green.offset = 8;
535 var->blue.offset = 0;
536 var->red.length = var->green.length = var->blue.length = 8;
539 var->height = var->width = -1;
541 var->accel_flags = FB_ACCELF_TEXT;
543 DPRINTK("Checking graphics mode at %dx%d depth %d\n",
544 var->xres, var->yres, var->bits_per_pixel);
548 static int tdfxfb_set_par(struct fb_info *info)
550 struct tdfx_par *par = info->par;
551 u32 hdispend = info->var.xres;
552 u32 hsyncsta = hdispend + info->var.right_margin;
553 u32 hsyncend = hsyncsta + info->var.hsync_len;
554 u32 htotal = hsyncend + info->var.left_margin;
555 u32 hd, hs, he, ht, hbs, hbe;
556 u32 vd, vs, ve, vt, vbs, vbe;
557 struct banshee_reg reg;
560 u32 cpp = (info->var.bits_per_pixel + 7) >> 3;
562 memset(®, 0, sizeof(reg));
564 reg.vidcfg = VIDCFG_VIDPROC_ENABLE | VIDCFG_DESK_ENABLE |
566 ((cpp - 1) << VIDCFG_PIXFMT_SHIFT) |
567 (cpp != 1 ? VIDCFG_CLUT_BYPASS : 0);
570 freq = PICOS2KHZ(info->var.pixclock);
572 reg.vidcfg &= ~VIDCFG_2X;
574 if (freq > par->max_pixclock / 2) {
575 freq = freq > par->max_pixclock ? par->max_pixclock : freq;
576 reg.dacmode |= DACMODE_2X;
577 reg.vidcfg |= VIDCFG_2X;
584 hd = wd = (hdispend >> 3) - 1;
585 hs = (hsyncsta >> 3) - 1;
586 he = (hsyncend >> 3) - 1;
587 ht = (htotal >> 3) - 1;
591 if ((info->var.vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) {
592 vbs = vd = (info->var.yres << 1) - 1;
593 vs = vd + (info->var.lower_margin << 1);
594 ve = vs + (info->var.vsync_len << 1);
595 vbe = vt = ve + (info->var.upper_margin << 1) - 1;
596 reg.screensize = info->var.xres | (info->var.yres << 13);
597 reg.vidcfg |= VIDCFG_HALF_MODE;
598 reg.crt[0x09] = 0x80;
600 vbs = vd = info->var.yres - 1;
601 vs = vd + info->var.lower_margin;
602 ve = vs + info->var.vsync_len;
603 vbe = vt = ve + info->var.upper_margin - 1;
604 reg.screensize = info->var.xres | (info->var.yres << 12);
605 reg.vidcfg &= ~VIDCFG_HALF_MODE;
608 /* this is all pretty standard VGA register stuffing */
609 reg.misc[0x00] = 0x0f |
610 (info->var.xres < 400 ? 0xa0 :
611 info->var.xres < 480 ? 0x60 :
612 info->var.xres < 768 ? 0xe0 : 0x20);
614 reg.gra[0x05] = 0x40;
615 reg.gra[0x06] = 0x05;
616 reg.gra[0x07] = 0x0f;
617 reg.gra[0x08] = 0xff;
619 reg.att[0x00] = 0x00;
620 reg.att[0x01] = 0x01;
621 reg.att[0x02] = 0x02;
622 reg.att[0x03] = 0x03;
623 reg.att[0x04] = 0x04;
624 reg.att[0x05] = 0x05;
625 reg.att[0x06] = 0x06;
626 reg.att[0x07] = 0x07;
627 reg.att[0x08] = 0x08;
628 reg.att[0x09] = 0x09;
629 reg.att[0x0a] = 0x0a;
630 reg.att[0x0b] = 0x0b;
631 reg.att[0x0c] = 0x0c;
632 reg.att[0x0d] = 0x0d;
633 reg.att[0x0e] = 0x0e;
634 reg.att[0x0f] = 0x0f;
635 reg.att[0x10] = 0x41;
636 reg.att[0x12] = 0x0f;
638 reg.seq[0x00] = 0x03;
639 reg.seq[0x01] = 0x01; /* fixme: clkdiv2? */
640 reg.seq[0x02] = 0x0f;
641 reg.seq[0x03] = 0x00;
642 reg.seq[0x04] = 0x0e;
644 reg.crt[0x00] = ht - 4;
647 reg.crt[0x03] = 0x80 | (hbe & 0x1f);
649 reg.crt[0x05] = ((hbe & 0x20) << 2) | (he & 0x1f);
651 reg.crt[0x07] = ((vs & 0x200) >> 2) |
652 ((vd & 0x200) >> 3) |
653 ((vt & 0x200) >> 4) | 0x10 |
654 ((vbs & 0x100) >> 5) |
655 ((vs & 0x100) >> 6) |
656 ((vd & 0x100) >> 7) |
658 reg.crt[0x09] |= 0x40 | ((vbs & 0x200) >> 4);
660 reg.crt[0x11] = (ve & 0x0f) | 0x20;
664 reg.crt[0x16] = vbe + 1;
665 reg.crt[0x17] = 0xc3;
666 reg.crt[0x18] = 0xff;
668 /* Banshee's nonvga stuff */
669 reg.ext[0x00] = (((ht & 0x100) >> 8) |
670 ((hd & 0x100) >> 6) |
671 ((hbs & 0x100) >> 4) |
672 ((hbe & 0x40) >> 1) |
673 ((hs & 0x100) >> 2) |
675 reg.ext[0x01] = (((vt & 0x400) >> 10) |
676 ((vd & 0x400) >> 8) |
677 ((vbs & 0x400) >> 6) |
678 ((vbe & 0x400) >> 4));
680 reg.vgainit0 = VGAINIT0_8BIT_DAC |
681 VGAINIT0_EXT_ENABLE |
682 VGAINIT0_WAKEUP_3C3 |
683 VGAINIT0_ALT_READBACK |
684 VGAINIT0_EXTSHIFTOUT;
685 reg.vgainit1 = tdfx_inl(par, VGAINIT1) & 0x1fffff;
688 reg.curspataddr = info->fix.smem_len;
693 reg.cursc1 = 0xffffff;
695 reg.stride = info->var.xres * cpp;
696 reg.startaddr = info->var.yoffset * reg.stride
697 + info->var.xoffset * cpp;
699 reg.vidpll = do_calc_pll(freq, &fout);
701 reg.mempll = do_calc_pll(..., &fout);
702 reg.gfxpll = do_calc_pll(..., &fout);
705 if ((info->var.vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED)
706 reg.vidcfg |= VIDCFG_INTERLACE;
707 reg.miscinit0 = tdfx_inl(par, MISCINIT0);
709 #if defined(__BIG_ENDIAN)
710 switch (info->var.bits_per_pixel) {
713 reg.miscinit0 &= ~(1 << 30);
714 reg.miscinit0 &= ~(1 << 31);
717 reg.miscinit0 |= (1 << 30);
718 reg.miscinit0 |= (1 << 31);
721 reg.miscinit0 |= (1 << 30);
722 reg.miscinit0 &= ~(1 << 31);
726 do_write_regs(info, ®);
728 /* Now change fb_fix_screeninfo according to changes in par */
729 info->fix.line_length = reg.stride;
730 info->fix.visual = (info->var.bits_per_pixel == 8)
731 ? FB_VISUAL_PSEUDOCOLOR
732 : FB_VISUAL_TRUECOLOR;
733 DPRINTK("Graphics mode is now set at %dx%d depth %d\n",
734 info->var.xres, info->var.yres, info->var.bits_per_pixel);
738 /* A handy macro shamelessly pinched from matroxfb */
739 #define CNVT_TOHW(val, width) ((((val)<<(width))+0x7FFF-(val))>>16)
741 static int tdfxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
742 unsigned blue, unsigned transp,
743 struct fb_info *info)
745 struct tdfx_par *par = info->par;
748 if (regno >= info->cmap.len || regno > 255)
751 /* grayscale works only partially under directcolor */
752 if (info->var.grayscale) {
753 /* grayscale = 0.30*R + 0.59*G + 0.11*B */
754 red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
757 switch (info->fix.visual) {
758 case FB_VISUAL_PSEUDOCOLOR:
759 rgbcol =(((u32)red & 0xff00) << 8) |
760 (((u32)green & 0xff00) << 0) |
761 (((u32)blue & 0xff00) >> 8);
762 do_setpalentry(par, regno, rgbcol);
764 /* Truecolor has no hardware color palettes. */
765 case FB_VISUAL_TRUECOLOR:
767 rgbcol = (CNVT_TOHW(red, info->var.red.length) <<
768 info->var.red.offset) |
769 (CNVT_TOHW(green, info->var.green.length) <<
770 info->var.green.offset) |
771 (CNVT_TOHW(blue, info->var.blue.length) <<
772 info->var.blue.offset) |
773 (CNVT_TOHW(transp, info->var.transp.length) <<
774 info->var.transp.offset);
775 par->palette[regno] = rgbcol;
780 DPRINTK("bad depth %u\n", info->var.bits_per_pixel);
787 /* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */
788 static int tdfxfb_blank(int blank, struct fb_info *info)
790 struct tdfx_par *par = info->par;
792 u32 dacmode = tdfx_inl(par, DACMODE);
794 dacmode &= ~(BIT(1) | BIT(3));
797 case FB_BLANK_UNBLANK: /* Screen: On; HSync: On, VSync: On */
800 case FB_BLANK_NORMAL: /* Screen: Off; HSync: On, VSync: On */
802 case FB_BLANK_VSYNC_SUSPEND: /* Screen: Off; HSync: On, VSync: Off */
805 case FB_BLANK_HSYNC_SUSPEND: /* Screen: Off; HSync: Off, VSync: On */
808 case FB_BLANK_POWERDOWN: /* Screen: Off; HSync: Off, VSync: Off */
809 dacmode |= BIT(1) | BIT(3);
813 banshee_make_room(par, 1);
814 tdfx_outl(par, DACMODE, dacmode);
816 vga_disable_video(par);
818 vga_enable_video(par);
823 * Set the starting position of the visible screen to var->yoffset
825 static int tdfxfb_pan_display(struct fb_var_screeninfo *var,
826 struct fb_info *info)
828 struct tdfx_par *par = info->par;
829 u32 addr = var->yoffset * info->fix.line_length;
831 if (nopan || var->xoffset || (var->yoffset > var->yres_virtual))
833 if ((var->yoffset + var->yres > var->yres_virtual && nowrap))
836 banshee_make_room(par, 1);
837 tdfx_outl(par, VIDDESKSTART, addr);
839 info->var.xoffset = var->xoffset;
840 info->var.yoffset = var->yoffset;
844 #ifdef CONFIG_FB_3DFX_ACCEL
846 * FillRect 2D command (solidfill or invert (via ROP_XOR))
848 static void tdfxfb_fillrect(struct fb_info *info,
849 const struct fb_fillrect *rect)
851 struct tdfx_par *par = info->par;
852 u32 bpp = info->var.bits_per_pixel;
853 u32 stride = info->fix.line_length;
854 u32 fmt= stride | ((bpp + ((bpp == 8) ? 0 : 8)) << 13);
860 if (rect->rop == ROP_COPY)
861 tdfx_rop = TDFX_ROP_COPY;
863 tdfx_rop = TDFX_ROP_XOR;
865 /* asume always rect->height < 4096 */
866 if (dy + rect->height > 4095) {
867 dstbase = stride * dy;
870 /* asume always rect->width < 4096 */
871 if (dx + rect->width > 4095) {
872 dstbase += dx * bpp >> 3;
875 banshee_make_room(par, 6);
876 tdfx_outl(par, DSTFORMAT, fmt);
877 if (info->fix.visual == FB_VISUAL_PSEUDOCOLOR) {
878 tdfx_outl(par, COLORFORE, rect->color);
879 } else { /* FB_VISUAL_TRUECOLOR */
880 tdfx_outl(par, COLORFORE, par->palette[rect->color]);
882 tdfx_outl(par, COMMAND_2D, COMMAND_2D_FILLRECT | (tdfx_rop << 24));
883 tdfx_outl(par, DSTBASE, dstbase);
884 tdfx_outl(par, DSTSIZE, rect->width | (rect->height << 16));
885 tdfx_outl(par, LAUNCH_2D, dx | (dy << 16));
889 * Screen-to-Screen BitBlt 2D command (for the bmove fb op.)
891 static void tdfxfb_copyarea(struct fb_info *info,
892 const struct fb_copyarea *area)
894 struct tdfx_par *par = info->par;
895 u32 sx = area->sx, sy = area->sy, dx = area->dx, dy = area->dy;
896 u32 bpp = info->var.bits_per_pixel;
897 u32 stride = info->fix.line_length;
898 u32 blitcmd = COMMAND_2D_S2S_BITBLT | (TDFX_ROP_COPY << 24);
899 u32 fmt = stride | ((bpp + ((bpp == 8) ? 0 : 8)) << 13);
903 /* asume always area->height < 4096 */
904 if (sy + area->height > 4095) {
905 srcbase = stride * sy;
908 /* asume always area->width < 4096 */
909 if (sx + area->width > 4095) {
910 srcbase += sx * bpp >> 3;
913 /* asume always area->height < 4096 */
914 if (dy + area->height > 4095) {
915 dstbase = stride * dy;
918 /* asume always area->width < 4096 */
919 if (dx + area->width > 4095) {
920 dstbase += dx * bpp >> 3;
924 if (area->sx <= area->dx) {
927 sx += area->width - 1;
928 dx += area->width - 1;
930 if (area->sy <= area->dy) {
933 sy += area->height - 1;
934 dy += area->height - 1;
937 banshee_make_room(par, 8);
939 tdfx_outl(par, SRCFORMAT, fmt);
940 tdfx_outl(par, DSTFORMAT, fmt);
941 tdfx_outl(par, COMMAND_2D, blitcmd);
942 tdfx_outl(par, DSTSIZE, area->width | (area->height << 16));
943 tdfx_outl(par, DSTXY, dx | (dy << 16));
944 tdfx_outl(par, SRCBASE, srcbase);
945 tdfx_outl(par, DSTBASE, dstbase);
946 tdfx_outl(par, LAUNCH_2D, sx | (sy << 16));
949 static void tdfxfb_imageblit(struct fb_info *info, const struct fb_image *image)
951 struct tdfx_par *par = info->par;
952 int size = image->height * ((image->width * image->depth + 7) >> 3);
954 int i, stride = info->fix.line_length;
955 u32 bpp = info->var.bits_per_pixel;
956 u32 dstfmt = stride | ((bpp + ((bpp == 8) ? 0 : 8)) << 13);
957 u8 *chardata = (u8 *) image->data;
963 if (image->depth != 1) {
964 //banshee_make_room(par, 6 + ((size + 3) >> 2));
965 //srcfmt = stride | ((bpp+((bpp==8) ? 0 : 8)) << 13) | 0x400000;
966 cfb_imageblit(info, image);
969 banshee_make_room(par, 9);
970 switch (info->fix.visual) {
971 case FB_VISUAL_PSEUDOCOLOR:
972 tdfx_outl(par, COLORFORE, image->fg_color);
973 tdfx_outl(par, COLORBACK, image->bg_color);
975 case FB_VISUAL_TRUECOLOR:
977 tdfx_outl(par, COLORFORE,
978 par->palette[image->fg_color]);
979 tdfx_outl(par, COLORBACK,
980 par->palette[image->bg_color]);
983 srcfmt = 0x400000 | BIT(20);
987 /* asume always image->height < 4096 */
988 if (dy + image->height > 4095) {
989 dstbase = stride * dy;
992 /* asume always image->width < 4096 */
993 if (dx + image->width > 4095) {
994 dstbase += dx * bpp >> 3;
998 tdfx_outl(par, DSTBASE, dstbase);
999 tdfx_outl(par, SRCXY, 0);
1000 tdfx_outl(par, DSTXY, dx | (dy << 16));
1001 tdfx_outl(par, COMMAND_2D, COMMAND_2D_H2S_BITBLT | (TDFX_ROP_COPY << 24));
1002 tdfx_outl(par, SRCFORMAT, srcfmt);
1003 tdfx_outl(par, DSTFORMAT, dstfmt);
1004 tdfx_outl(par, DSTSIZE, image->width | (image->height << 16));
1006 /* A count of how many free FIFO entries we've requested.
1007 * When this goes negative, we need to request more. */
1010 /* Send four bytes at a time of data */
1011 for (i = (size >> 2); i > 0; i--) {
1012 if (--fifo_free < 0) {
1014 banshee_make_room(par, fifo_free);
1016 tdfx_outl(par, LAUNCH_2D, *(u32*)chardata);
1020 /* Send the leftovers now */
1021 banshee_make_room(par, 3);
1026 tdfx_outl(par, LAUNCH_2D, *chardata);
1029 tdfx_outl(par, LAUNCH_2D, *(u16*)chardata);
1032 tdfx_outl(par, LAUNCH_2D,
1033 *(u16*)chardata | ((chardata[3]) << 24));
1037 #endif /* CONFIG_FB_3DFX_ACCEL */
1039 static int tdfxfb_cursor(struct fb_info *info, struct fb_cursor *cursor)
1041 struct tdfx_par *par = info->par;
1045 return -EINVAL; /* just to force soft_cursor() call */
1047 /* Too large of a cursor or wrong bpp :-( */
1048 if (cursor->image.width > 64 ||
1049 cursor->image.height > 64 ||
1050 cursor->image.depth > 1)
1053 vidcfg = tdfx_inl(par, VIDPROCCFG);
1055 tdfx_outl(par, VIDPROCCFG, vidcfg | VIDCFG_HWCURSOR_ENABLE);
1057 tdfx_outl(par, VIDPROCCFG, vidcfg & ~VIDCFG_HWCURSOR_ENABLE);
1060 * If the cursor is not be changed this means either we want the
1061 * current cursor state (if enable is set) or we want to query what
1062 * we can do with the cursor (if enable is not set)
1067 /* fix cursor color - XFree86 forgets to restore it properly */
1068 if (cursor->set & FB_CUR_SETCMAP) {
1069 struct fb_cmap cmap = info->cmap;
1070 u32 bg_idx = cursor->image.bg_color;
1071 u32 fg_idx = cursor->image.fg_color;
1072 unsigned long bg_color, fg_color;
1074 fg_color = (((u32)cmap.red[fg_idx] & 0xff00) << 8) |
1075 (((u32)cmap.green[fg_idx] & 0xff00) << 0) |
1076 (((u32)cmap.blue[fg_idx] & 0xff00) >> 8);
1077 bg_color = (((u32)cmap.red[bg_idx] & 0xff00) << 8) |
1078 (((u32)cmap.green[bg_idx] & 0xff00) << 0) |
1079 (((u32)cmap.blue[bg_idx] & 0xff00) >> 8);
1080 banshee_make_room(par, 2);
1081 tdfx_outl(par, HWCURC0, bg_color);
1082 tdfx_outl(par, HWCURC1, fg_color);
1085 if (cursor->set & FB_CUR_SETPOS) {
1086 int x = cursor->image.dx;
1087 int y = cursor->image.dy - info->var.yoffset;
1091 banshee_make_room(par, 1);
1092 tdfx_outl(par, HWCURLOC, (y << 16) + x);
1094 if (cursor->set & (FB_CUR_SETIMAGE | FB_CUR_SETSHAPE)) {
1096 * Voodoo 3 and above cards use 2 monochrome cursor patterns.
1097 * The reason is so the card can fetch 8 words at a time
1098 * and are stored on chip for use for the next 8 scanlines.
1099 * This reduces the number of times for access to draw the
1100 * cursor for each screen refresh.
1101 * Each pattern is a bitmap of 64 bit wide and 64 bit high
1102 * (total of 8192 bits or 1024 bytes). The two patterns are
1103 * stored in such a way that pattern 0 always resides in the
1104 * lower half (least significant 64 bits) of a 128 bit word
1105 * and pattern 1 the upper half. If you examine the data of
1106 * the cursor image the graphics card uses then from the
1107 * begining you see line one of pattern 0, line one of
1108 * pattern 1, line two of pattern 0, line two of pattern 1,
1109 * etc etc. The linear stride for the cursor is always 16 bytes
1110 * (128 bits) which is the maximum cursor width times two for
1111 * the two monochrome patterns.
1113 u8 __iomem *cursorbase = info->screen_base + info->fix.smem_len;
1114 u8 *bitmap = (u8 *)cursor->image.data;
1115 u8 *mask = (u8 *)cursor->mask;
1118 fb_memset(cursorbase, 0, 1024);
1120 for (i = 0; i < cursor->image.height; i++) {
1122 int j = (cursor->image.width + 7) >> 3;
1124 for (; j > 0; j--) {
1125 u8 data = *mask ^ *bitmap;
1126 if (cursor->rop == ROP_COPY)
1127 data = *mask & *bitmap;
1128 /* Pattern 0. Copy the cursor mask to it */
1129 fb_writeb(*mask, cursorbase + h);
1131 /* Pattern 1. Copy the cursor bitmap to it */
1132 fb_writeb(data, cursorbase + h + 8);
1142 static struct fb_ops tdfxfb_ops = {
1143 .owner = THIS_MODULE,
1144 .fb_check_var = tdfxfb_check_var,
1145 .fb_set_par = tdfxfb_set_par,
1146 .fb_setcolreg = tdfxfb_setcolreg,
1147 .fb_blank = tdfxfb_blank,
1148 .fb_pan_display = tdfxfb_pan_display,
1149 .fb_sync = banshee_wait_idle,
1150 .fb_cursor = tdfxfb_cursor,
1151 #ifdef CONFIG_FB_3DFX_ACCEL
1152 .fb_fillrect = tdfxfb_fillrect,
1153 .fb_copyarea = tdfxfb_copyarea,
1154 .fb_imageblit = tdfxfb_imageblit,
1156 .fb_fillrect = cfb_fillrect,
1157 .fb_copyarea = cfb_copyarea,
1158 .fb_imageblit = cfb_imageblit,
1163 * tdfxfb_probe - Device Initializiation
1165 * @pdev: PCI Device to initialize
1166 * @id: PCI Device ID
1168 * Initializes and allocates resources for PCI device @pdev.
1171 static int __devinit tdfxfb_probe(struct pci_dev *pdev,
1172 const struct pci_device_id *id)
1174 struct tdfx_par *default_par;
1175 struct fb_info *info;
1178 if ((err = pci_enable_device(pdev))) {
1179 printk(KERN_WARNING "tdfxfb: Can't enable pdev: %d\n", err);
1183 info = framebuffer_alloc(sizeof(struct tdfx_par), &pdev->dev);
1188 default_par = info->par;
1190 /* Configure the default fb_fix_screeninfo first */
1191 switch (pdev->device) {
1192 case PCI_DEVICE_ID_3DFX_BANSHEE:
1193 strcat(tdfx_fix.id, " Banshee");
1194 default_par->max_pixclock = BANSHEE_MAX_PIXCLOCK;
1196 case PCI_DEVICE_ID_3DFX_VOODOO3:
1197 strcat(tdfx_fix.id, " Voodoo3");
1198 default_par->max_pixclock = VOODOO3_MAX_PIXCLOCK;
1200 case PCI_DEVICE_ID_3DFX_VOODOO5:
1201 strcat(tdfx_fix.id, " Voodoo5");
1202 default_par->max_pixclock = VOODOO5_MAX_PIXCLOCK;
1206 tdfx_fix.mmio_start = pci_resource_start(pdev, 0);
1207 tdfx_fix.mmio_len = pci_resource_len(pdev, 0);
1208 if (!request_mem_region(tdfx_fix.mmio_start, tdfx_fix.mmio_len,
1210 printk(KERN_WARNING "tdfxfb: Can't reserve regbase\n");
1214 default_par->regbase_virt =
1215 ioremap_nocache(tdfx_fix.mmio_start, tdfx_fix.mmio_len);
1216 if (!default_par->regbase_virt) {
1217 printk("fb: Can't remap %s register area.\n", tdfx_fix.id);
1218 goto out_err_regbase;
1221 tdfx_fix.smem_start = pci_resource_start(pdev, 1);
1222 if (!(tdfx_fix.smem_len = do_lfb_size(default_par, pdev->device))) {
1223 printk("fb: Can't count %s memory.\n", tdfx_fix.id);
1224 goto out_err_regbase;
1227 if (!request_mem_region(tdfx_fix.smem_start,
1228 pci_resource_len(pdev, 1), "tdfx smem")) {
1229 printk(KERN_WARNING "tdfxfb: Can't reserve smem\n");
1230 goto out_err_regbase;
1233 info->screen_base = ioremap_nocache(tdfx_fix.smem_start,
1235 if (!info->screen_base) {
1236 printk("fb: Can't remap %s framebuffer.\n", tdfx_fix.id);
1237 goto out_err_screenbase;
1240 default_par->iobase = pci_resource_start(pdev, 2);
1242 if (!request_region(pci_resource_start(pdev, 2),
1243 pci_resource_len(pdev, 2), "tdfx iobase")) {
1244 printk(KERN_WARNING "tdfxfb: Can't reserve iobase\n");
1245 goto out_err_screenbase;
1248 printk("fb: %s memory = %dK\n", tdfx_fix.id, tdfx_fix.smem_len >> 10);
1250 default_par->mtrr_handle = -1;
1252 default_par->mtrr_handle =
1253 mtrr_add(tdfx_fix.smem_start, tdfx_fix.smem_len,
1254 MTRR_TYPE_WRCOMB, 1);
1256 tdfx_fix.ypanstep = nopan ? 0 : 1;
1257 tdfx_fix.ywrapstep = nowrap ? 0 : 1;
1259 info->fbops = &tdfxfb_ops;
1260 info->fix = tdfx_fix;
1261 info->pseudo_palette = default_par->palette;
1262 info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
1263 #ifdef CONFIG_FB_3DFX_ACCEL
1264 info->flags |= FBINFO_HWACCEL_FILLRECT |
1265 FBINFO_HWACCEL_COPYAREA |
1266 FBINFO_HWACCEL_IMAGEBLIT |
1269 /* reserve 8192 bits for cursor */
1270 /* the 2.4 driver says PAGE_MASK boundary is not enough for Voodoo4 */
1272 info->fix.smem_len = (info->fix.smem_len - 1024) &
1276 mode_option = "640x480@60";
1278 err = fb_find_mode(&info->var, info, mode_option, NULL, 0, NULL, 8);
1279 if (!err || err == 4)
1280 info->var = tdfx_var;
1282 /* maximize virtual vertical length */
1283 lpitch = info->var.xres_virtual * ((info->var.bits_per_pixel + 7) >> 3);
1284 info->var.yres_virtual = info->fix.smem_len / lpitch;
1285 if (info->var.yres_virtual < info->var.yres)
1286 goto out_err_iobase;
1288 if (fb_alloc_cmap(&info->cmap, 256, 0) < 0) {
1289 printk(KERN_WARNING "tdfxfb: Can't allocate color map\n");
1290 goto out_err_iobase;
1293 if (register_framebuffer(info) < 0) {
1294 printk("tdfxfb: can't register framebuffer\n");
1295 fb_dealloc_cmap(&info->cmap);
1296 goto out_err_iobase;
1301 pci_set_drvdata(pdev, info);
1305 if (default_par->mtrr_handle >= 0)
1306 mtrr_del(default_par->mtrr_handle, info->fix.smem_start,
1307 info->fix.smem_len);
1308 release_mem_region(pci_resource_start(pdev, 2),
1309 pci_resource_len(pdev, 2));
1311 if (info->screen_base)
1312 iounmap(info->screen_base);
1313 release_mem_region(tdfx_fix.smem_start, pci_resource_len(pdev, 1));
1316 * Cleanup after anything that was remapped/allocated.
1318 if (default_par->regbase_virt)
1319 iounmap(default_par->regbase_virt);
1320 release_mem_region(tdfx_fix.mmio_start, tdfx_fix.mmio_len);
1322 framebuffer_release(info);
1327 static void tdfxfb_setup(char *options)
1331 if (!options || !*options)
1334 while ((this_opt = strsep(&options, ",")) != NULL) {
1337 if (!strcmp(this_opt, "nopan")) {
1339 } else if (!strcmp(this_opt, "nowrap")) {
1341 } else if (!strncmp(this_opt, "hwcursor=", 9)) {
1342 hwcursor = simple_strtoul(this_opt + 9, NULL, 0);
1344 } else if (!strncmp(this_opt, "nomtrr", 6)) {
1348 mode_option = this_opt;
1355 * tdfxfb_remove - Device removal
1357 * @pdev: PCI Device to cleanup
1359 * Releases all resources allocated during the course of the driver's
1360 * lifetime for the PCI device @pdev.
1363 static void __devexit tdfxfb_remove(struct pci_dev *pdev)
1365 struct fb_info *info = pci_get_drvdata(pdev);
1366 struct tdfx_par *par = info->par;
1368 unregister_framebuffer(info);
1369 if (par->mtrr_handle >= 0)
1370 mtrr_del(par->mtrr_handle, info->fix.smem_start,
1371 info->fix.smem_len);
1372 iounmap(par->regbase_virt);
1373 iounmap(info->screen_base);
1375 /* Clean up after reserved regions */
1376 release_region(pci_resource_start(pdev, 2),
1377 pci_resource_len(pdev, 2));
1378 release_mem_region(pci_resource_start(pdev, 1),
1379 pci_resource_len(pdev, 1));
1380 release_mem_region(pci_resource_start(pdev, 0),
1381 pci_resource_len(pdev, 0));
1382 pci_set_drvdata(pdev, NULL);
1383 framebuffer_release(info);
1386 static int __init tdfxfb_init(void)
1389 char *option = NULL;
1391 if (fb_get_options("tdfxfb", &option))
1394 tdfxfb_setup(option);
1396 return pci_register_driver(&tdfxfb_driver);
1399 static void __exit tdfxfb_exit(void)
1401 pci_unregister_driver(&tdfxfb_driver);
1404 MODULE_AUTHOR("Hannu Mallat <hmallat@cc.hut.fi>");
1405 MODULE_DESCRIPTION("3Dfx framebuffer device driver");
1406 MODULE_LICENSE("GPL");
1408 module_param(hwcursor, int, 0644);
1409 MODULE_PARM_DESC(hwcursor, "Enable hardware cursor "
1410 "(1=enable, 0=disable, default=1)");
1412 module_param(nomtrr, bool, 0);
1413 MODULE_PARM_DESC(nomtrr, "Disable MTRR support (default: enabled)");
1416 module_init(tdfxfb_init);
1417 module_exit(tdfxfb_exit);