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[WATCHDOG] omap_wdt.c: another ioremap() fix
[linux-2.6-omap-h63xx.git] / drivers / watchdog / omap_wdt.c
1 /*
2  * omap_wdt.c
3  *
4  * Watchdog driver for the TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog
5  *
6  * Author: MontaVista Software, Inc.
7  *       <gdavis@mvista.com> or <source@mvista.com>
8  *
9  * 2003 (c) MontaVista Software, Inc. This file is licensed under the
10  * terms of the GNU General Public License version 2. This program is
11  * licensed "as is" without any warranty of any kind, whether express
12  * or implied.
13  *
14  * History:
15  *
16  * 20030527: George G. Davis <gdavis@mvista.com>
17  *      Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
18  *      (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
19  *      Based on SoftDog driver by Alan Cox <alan@redhat.com>
20  *
21  * Copyright (c) 2004 Texas Instruments.
22  *      1. Modified to support OMAP1610 32-KHz watchdog timer
23  *      2. Ported to 2.6 kernel
24  *
25  * Copyright (c) 2005 David Brownell
26  *      Use the driver model and standard identifiers; handle bigger timeouts.
27  */
28
29 #include <linux/module.h>
30 #include <linux/types.h>
31 #include <linux/kernel.h>
32 #include <linux/fs.h>
33 #include <linux/mm.h>
34 #include <linux/miscdevice.h>
35 #include <linux/watchdog.h>
36 #include <linux/reboot.h>
37 #include <linux/init.h>
38 #include <linux/err.h>
39 #include <linux/platform_device.h>
40 #include <linux/moduleparam.h>
41 #include <linux/clk.h>
42 #include <linux/bitops.h>
43 #include <linux/io.h>
44 #include <linux/uaccess.h>
45 #include <mach/hardware.h>
46 #include <mach/prcm.h>
47
48 #include "omap_wdt.h"
49
50 static struct platform_device *omap_wdt_dev;
51
52 static unsigned timer_margin;
53 module_param(timer_margin, uint, 0);
54 MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
55
56 static unsigned int wdt_trgr_pattern = 0x1234;
57 static spinlock_t wdt_lock;
58
59 struct omap_wdt_dev {
60         void __iomem    *base;          /* physical */
61         struct device   *dev;
62         int             omap_wdt_users;
63         struct clk      *armwdt_ck;
64         struct clk      *mpu_wdt_ick;
65         struct clk      *mpu_wdt_fck;
66         struct resource *mem;
67         struct miscdevice omap_wdt_miscdev;
68 };
69
70 static void omap_wdt_ping(struct omap_wdt_dev *wdev)
71 {
72         void __iomem    *base = wdev->base;
73         /* wait for posted write to complete */
74         while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
75                 cpu_relax();
76         wdt_trgr_pattern = ~wdt_trgr_pattern;
77         __raw_writel(wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR));
78         /* wait for posted write to complete */
79         while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
80                 cpu_relax();
81         /* reloaded WCRR from WLDR */
82 }
83
84 static void omap_wdt_enable(struct omap_wdt_dev *wdev)
85 {
86         void __iomem *base;
87         base = wdev->base;
88         /* Sequence to enable the watchdog */
89         __raw_writel(0xBBBB, base + OMAP_WATCHDOG_SPR);
90         while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
91                 cpu_relax();
92         __raw_writel(0x4444, base + OMAP_WATCHDOG_SPR);
93         while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
94                 cpu_relax();
95 }
96
97 static void omap_wdt_disable(struct omap_wdt_dev *wdev)
98 {
99         void __iomem *base;
100         base = wdev->base;
101         /* sequence required to disable watchdog */
102         __raw_writel(0xAAAA, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
103         while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
104                 cpu_relax();
105         __raw_writel(0x5555, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
106         while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
107                 cpu_relax();
108 }
109
110 static void omap_wdt_adjust_timeout(unsigned new_timeout)
111 {
112         if (new_timeout < TIMER_MARGIN_MIN)
113                 new_timeout = TIMER_MARGIN_DEFAULT;
114         if (new_timeout > TIMER_MARGIN_MAX)
115                 new_timeout = TIMER_MARGIN_MAX;
116         timer_margin = new_timeout;
117 }
118
119 static void omap_wdt_set_timeout(struct omap_wdt_dev *wdev)
120 {
121         u32 pre_margin = GET_WLDR_VAL(timer_margin);
122         void __iomem *base;
123         base = wdev->base;
124
125         /* just count up at 32 KHz */
126         while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
127                 cpu_relax();
128         __raw_writel(pre_margin, base + OMAP_WATCHDOG_LDR);
129         while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
130                 cpu_relax();
131 }
132
133 /*
134  *      Allow only one task to hold it open
135  */
136
137 static int omap_wdt_open(struct inode *inode, struct file *file)
138 {
139         struct omap_wdt_dev *wdev;
140         void __iomem *base;
141         wdev = platform_get_drvdata(omap_wdt_dev);
142         base = wdev->base;
143         if (test_and_set_bit(1, (unsigned long *)&(wdev->omap_wdt_users)))
144                 return -EBUSY;
145
146         if (cpu_is_omap16xx())
147                 clk_enable(wdev->armwdt_ck);    /* Enable the clock */
148
149         if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
150                 clk_enable(wdev->mpu_wdt_ick);    /* Enable the interface clock */
151                 clk_enable(wdev->mpu_wdt_fck);    /* Enable the functional clock */
152         }
153
154         /* initialize prescaler */
155         while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
156                 cpu_relax();
157         __raw_writel((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL);
158         while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
159                 cpu_relax();
160
161         file->private_data = (void *) wdev;
162
163         omap_wdt_set_timeout(wdev);
164         omap_wdt_enable(wdev);
165         return nonseekable_open(inode, file);
166 }
167
168 static int omap_wdt_release(struct inode *inode, struct file *file)
169 {
170         struct omap_wdt_dev *wdev;
171         wdev = file->private_data;
172         /*
173          *      Shut off the timer unless NOWAYOUT is defined.
174          */
175 #ifndef CONFIG_WATCHDOG_NOWAYOUT
176
177         omap_wdt_disable(wdev);
178
179         if (cpu_is_omap16xx())
180                 clk_disable(wdev->armwdt_ck);   /* Disable the clock */
181
182         if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
183                 clk_disable(wdev->mpu_wdt_ick); /* Disable the clock */
184                 clk_disable(wdev->mpu_wdt_fck); /* Disable the clock */
185         }
186 #else
187         printk(KERN_CRIT "omap_wdt: Unexpected close, not stopping!\n");
188 #endif
189         wdev->omap_wdt_users = 0;
190         return 0;
191 }
192
193 static ssize_t omap_wdt_write(struct file *file, const char __user *data,
194                 size_t len, loff_t *ppos)
195 {
196         struct omap_wdt_dev *wdev;
197         wdev = file->private_data;
198         /* Refresh LOAD_TIME. */
199         if (len) {
200                 spin_lock(&wdt_lock);
201                 omap_wdt_ping(wdev);
202                 spin_unlock(&wdt_lock);
203         }
204         return len;
205 }
206
207 static long omap_wdt_ioctl(struct file *file, unsigned int cmd,
208                                                 unsigned long arg)
209 {
210         struct omap_wdt_dev *wdev;
211         int new_margin;
212         static const struct watchdog_info ident = {
213                 .identity = "OMAP Watchdog",
214                 .options = WDIOF_SETTIMEOUT,
215                 .firmware_version = 0,
216         };
217         wdev = file->private_data;
218
219         switch (cmd) {
220         case WDIOC_GETSUPPORT:
221                 return copy_to_user((struct watchdog_info __user *)arg, &ident,
222                                 sizeof(ident));
223         case WDIOC_GETSTATUS:
224                 return put_user(0, (int __user *)arg);
225         case WDIOC_GETBOOTSTATUS:
226                 if (cpu_is_omap16xx())
227                         return put_user(__raw_readw(ARM_SYSST),
228                                         (int __user *)arg);
229                 if (cpu_is_omap24xx())
230                         return put_user(omap_prcm_get_reset_sources(),
231                                         (int __user *)arg);
232         case WDIOC_KEEPALIVE:
233                 spin_lock(&wdt_lock);
234                 omap_wdt_ping(wdev);
235                 spin_unlock(&wdt_lock);
236                 return 0;
237         case WDIOC_SETTIMEOUT:
238                 if (get_user(new_margin, (int __user *)arg))
239                         return -EFAULT;
240                 omap_wdt_adjust_timeout(new_margin);
241
242                 spin_lock(&wdt_lock);
243                 omap_wdt_disable(wdev);
244                 omap_wdt_set_timeout(wdev);
245                 omap_wdt_enable(wdev);
246
247                 omap_wdt_ping(wdev);
248                 spin_unlock(&wdt_lock);
249                 /* Fall */
250         case WDIOC_GETTIMEOUT:
251                 return put_user(timer_margin, (int __user *)arg);
252         default:
253                 return -ENOTTY;
254         }
255 }
256
257 static const struct file_operations omap_wdt_fops = {
258         .owner = THIS_MODULE,
259         .write = omap_wdt_write,
260         .unlocked_ioctl = omap_wdt_ioctl,
261         .open = omap_wdt_open,
262         .release = omap_wdt_release,
263 };
264
265
266 static int __init omap_wdt_probe(struct platform_device *pdev)
267 {
268         struct resource *res, *mem;
269         int ret;
270         struct omap_wdt_dev *wdev;
271
272         /* reserve static register mappings */
273         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
274         if (!res)
275                 return -ENOENT;
276
277         if (omap_wdt_dev)
278                 return -EBUSY;
279
280         mem = request_mem_region(res->start, res->end - res->start + 1,
281                                  pdev->name);
282         if (mem == NULL)
283                 return -EBUSY;
284
285         wdev = kzalloc(sizeof(struct omap_wdt_dev), GFP_KERNEL);
286         if (!wdev) {
287                 ret = -ENOMEM;
288                 goto fail;
289         }
290         wdev->omap_wdt_users = 0;
291         wdev->mem = mem;
292
293         if (cpu_is_omap16xx()) {
294                 wdev->armwdt_ck = clk_get(&pdev->dev, "armwdt_ck");
295                 if (IS_ERR(wdev->armwdt_ck)) {
296                         ret = PTR_ERR(wdev->armwdt_ck);
297                         wdev->armwdt_ck = NULL;
298                         goto fail;
299                 }
300         }
301
302         if (cpu_is_omap24xx()) {
303                 wdev->mpu_wdt_ick = clk_get(&pdev->dev, "mpu_wdt_ick");
304                 if (IS_ERR(wdev->mpu_wdt_ick)) {
305                         ret = PTR_ERR(wdev->mpu_wdt_ick);
306                         wdev->mpu_wdt_ick = NULL;
307                         goto fail;
308                 }
309                 wdev->mpu_wdt_fck = clk_get(&pdev->dev, "mpu_wdt_fck");
310                 if (IS_ERR(wdev->mpu_wdt_fck)) {
311                         ret = PTR_ERR(wdev->mpu_wdt_fck);
312                         wdev->mpu_wdt_fck = NULL;
313                         goto fail;
314                 }
315         }
316
317         if (cpu_is_omap34xx()) {
318                 wdev->mpu_wdt_ick = clk_get(&pdev->dev, "wdt2_ick");
319                 if (IS_ERR(wdev->mpu_wdt_ick)) {
320                         ret = PTR_ERR(wdev->mpu_wdt_ick);
321                         wdev->mpu_wdt_ick = NULL;
322                         goto fail;
323                 }
324                 wdev->mpu_wdt_fck = clk_get(&pdev->dev, "wdt2_fck");
325                 if (IS_ERR(wdev->mpu_wdt_fck)) {
326                         ret = PTR_ERR(wdev->mpu_wdt_fck);
327                         wdev->mpu_wdt_fck = NULL;
328                         goto fail;
329                 }
330         }
331         wdev->base = ioremap(res->start, res->end - res->start + 1);
332         if (!wdev->base) {
333                 ret = -ENOMEM;
334                 goto fail;
335         }
336
337         platform_set_drvdata(pdev, wdev);
338
339         omap_wdt_disable(wdev);
340         omap_wdt_adjust_timeout(timer_margin);
341
342         wdev->omap_wdt_miscdev.parent = &pdev->dev;
343         wdev->omap_wdt_miscdev.minor = WATCHDOG_MINOR;
344         wdev->omap_wdt_miscdev.name = "watchdog";
345         wdev->omap_wdt_miscdev.fops = &omap_wdt_fops;
346
347         ret = misc_register(&(wdev->omap_wdt_miscdev));
348         if (ret)
349                 goto fail;
350
351         pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n",
352                 __raw_readl(wdev->base + OMAP_WATCHDOG_REV) & 0xFF,
353                 timer_margin);
354
355         /* autogate OCP interface clock */
356         __raw_writel(0x01, wdev->base + OMAP_WATCHDOG_SYS_CONFIG);
357
358         omap_wdt_dev = pdev;
359
360         return 0;
361
362 fail:
363         if (wdev) {
364                 platform_set_drvdata(pdev, NULL);
365                 if (wdev->armwdt_ck)
366                         clk_put(wdev->armwdt_ck);
367                 if (wdev->mpu_wdt_ick)
368                         clk_put(wdev->mpu_wdt_ick);
369                 if (wdev->mpu_wdt_fck)
370                         clk_put(wdev->mpu_wdt_fck);
371                 iounmap(wdev->base);
372                 kfree(wdev);
373         }
374         if (mem) {
375                 release_mem_region(res->start, res->end - res->start + 1);
376         }
377         return ret;
378 }
379
380 static void omap_wdt_shutdown(struct platform_device *pdev)
381 {
382         struct omap_wdt_dev *wdev;
383         wdev = platform_get_drvdata(pdev);
384
385         if (wdev->omap_wdt_users)
386                 omap_wdt_disable(wdev);
387 }
388
389 static int omap_wdt_remove(struct platform_device *pdev)
390 {
391         struct omap_wdt_dev *wdev;
392         wdev = platform_get_drvdata(pdev);
393         struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
394
395         if (!res)
396                 return -ENOENT;
397
398         misc_deregister(&(wdev->omap_wdt_miscdev));
399         release_mem_region(res->start, res->end - res->start + 1);
400         platform_set_drvdata(pdev, NULL);
401         if (wdev->armwdt_ck) {
402                 clk_put(wdev->armwdt_ck);
403                 wdev->armwdt_ck = NULL;
404         }
405         if (wdev->mpu_wdt_ick) {
406                 clk_put(wdev->mpu_wdt_ick);
407                 wdev->mpu_wdt_ick = NULL;
408         }
409         if (wdev->mpu_wdt_fck) {
410                 clk_put(wdev->mpu_wdt_fck);
411                 wdev->mpu_wdt_fck = NULL;
412         }
413         iounmap(wdev->base);
414
415         kfree(wdev);
416         omap_wdt_dev = NULL;
417         return 0;
418 }
419
420 #ifdef  CONFIG_PM
421
422 /* REVISIT ... not clear this is the best way to handle system suspend; and
423  * it's very inappropriate for selective device suspend (e.g. suspending this
424  * through sysfs rather than by stopping the watchdog daemon).  Also, this
425  * may not play well enough with NOWAYOUT...
426  */
427
428 static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state)
429 {
430         struct omap_wdt_dev *wdev;
431         wdev = platform_get_drvdata(pdev);
432         if (wdev->omap_wdt_users)
433                 omap_wdt_disable(wdev);
434         return 0;
435 }
436
437 static int omap_wdt_resume(struct platform_device *pdev)
438 {
439         struct omap_wdt_dev *wdev;
440         wdev = platform_get_drvdata(pdev);
441         if (wdev->omap_wdt_users) {
442                 omap_wdt_enable(wdev);
443                 omap_wdt_ping(wdev);
444         }
445         return 0;
446 }
447
448 #else
449 #define omap_wdt_suspend        NULL
450 #define omap_wdt_resume         NULL
451 #endif
452
453 static struct platform_driver omap_wdt_driver = {
454         .probe          = omap_wdt_probe,
455         .remove         = omap_wdt_remove,
456         .shutdown       = omap_wdt_shutdown,
457         .suspend        = omap_wdt_suspend,
458         .resume         = omap_wdt_resume,
459         .driver         = {
460                 .owner  = THIS_MODULE,
461                 .name   = "omap_wdt",
462         },
463 };
464
465 static int __init omap_wdt_init(void)
466 {
467         spin_lock_init(&wdt_lock);
468         return platform_driver_register(&omap_wdt_driver);
469 }
470
471 static void __exit omap_wdt_exit(void)
472 {
473         platform_driver_unregister(&omap_wdt_driver);
474 }
475
476 module_init(omap_wdt_init);
477 module_exit(omap_wdt_exit);
478
479 MODULE_AUTHOR("George G. Davis");
480 MODULE_LICENSE("GPL");
481 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
482 MODULE_ALIAS("platform:omap_wdt");