1 #ifndef _DMA_REMAPPING_H
2 #define _DMA_REMAPPING_H
5 * VT-d hardware uses 4KiB page size regardless of host page size.
7 #define VTD_PAGE_SHIFT (12)
8 #define VTD_PAGE_SIZE (1UL << VTD_PAGE_SHIFT)
9 #define VTD_PAGE_MASK (((u64)-1) << VTD_PAGE_SHIFT)
10 #define VTD_PAGE_ALIGN(addr) (((addr) + VTD_PAGE_SIZE - 1) & VTD_PAGE_MASK)
20 * 12-63: Host physcial address
25 #define dma_clear_pte(p) do {(p).val = 0;} while (0)
27 #define DMA_PTE_READ (1)
28 #define DMA_PTE_WRITE (2)
30 #define dma_set_pte_readable(p) do {(p).val |= DMA_PTE_READ;} while (0)
31 #define dma_set_pte_writable(p) do {(p).val |= DMA_PTE_WRITE;} while (0)
32 #define dma_set_pte_prot(p, prot) \
33 do {(p).val = ((p).val & ~3) | ((prot) & 3); } while (0)
34 #define dma_pte_addr(p) ((p).val & VTD_PAGE_MASK)
35 #define dma_set_pte_addr(p, addr) do {\
36 (p).val |= ((addr) & VTD_PAGE_MASK); } while (0)
37 #define dma_pte_present(p) (((p).val & 3) != 0)
42 int id; /* domain id */
43 struct intel_iommu *iommu; /* back pointer to owning iommu */
45 struct list_head devices; /* all devices' list */
46 struct iova_domain iovad; /* iova's that belong to this domain */
48 struct dma_pte *pgd; /* virtual address */
49 spinlock_t mapping_lock; /* page table lock */
50 int gaw; /* max guest address width */
52 /* adjusted guest address width, 0 is level 2 30-bit */
55 #define DOMAIN_FLAG_MULTIPLE_DEVICES 1
59 /* PCI domain-device relationship */
60 struct device_domain_info {
61 struct list_head link; /* link to domain siblings */
62 struct list_head global; /* link to global list */
63 u8 bus; /* PCI bus numer */
64 u8 devfn; /* PCI devfn number */
65 struct pci_dev *dev; /* it's NULL for PCIE-to-PCI bridge */
66 struct dmar_domain *domain; /* pointer to domain */
69 extern void free_dmar_iommu(struct intel_iommu *iommu);
71 extern int dmar_disabled;
73 #ifndef CONFIG_DMAR_GFX_WA
74 static inline void iommu_prepare_gfx_mapping(void)
78 #endif /* !CONFIG_DMAR_GFX_WA */