5 * Please do not include this file in generic code. There is currently
6 * no requirement for any architecture to implement anything held
12 #include <linux/config.h>
14 #if !defined(CONFIG_ARCH_S390)
16 #include <linux/linkage.h>
17 #include <linux/cache.h>
18 #include <linux/spinlock.h>
19 #include <linux/cpumask.h>
22 #include <asm/ptrace.h>
27 #define IRQ_INPROGRESS 1 /* IRQ handler active - do not enter! */
28 #define IRQ_DISABLED 2 /* IRQ disabled - do not enter! */
29 #define IRQ_PENDING 4 /* IRQ pending - replay on enable */
30 #define IRQ_REPLAY 8 /* IRQ has been replayed but not acked yet */
31 #define IRQ_AUTODETECT 16 /* IRQ is being autodetected */
32 #define IRQ_WAITING 32 /* IRQ not yet seen - for autodetection */
33 #define IRQ_LEVEL 64 /* IRQ level triggered */
34 #define IRQ_MASKED 128 /* IRQ masked - shouldn't be seen again */
35 #define IRQ_PER_CPU 256 /* IRQ is per CPU */
38 * Interrupt controller descriptor. This is all we need
39 * to describe about the low-level hardware.
41 struct hw_interrupt_type {
42 const char * typename;
43 unsigned int (*startup)(unsigned int irq);
44 void (*shutdown)(unsigned int irq);
45 void (*enable)(unsigned int irq);
46 void (*disable)(unsigned int irq);
47 void (*ack)(unsigned int irq);
48 void (*end)(unsigned int irq);
49 void (*set_affinity)(unsigned int irq, cpumask_t dest);
50 /* Currently used only by UML, might disappear one day.*/
51 #ifdef CONFIG_IRQ_RELEASE_METHOD
52 void (*release)(unsigned int irq, void *dev_id);
56 typedef struct hw_interrupt_type hw_irq_controller;
59 * This is the "IRQ descriptor", which contains various information
60 * about the irq, including what kind of hardware handling it has,
61 * whether it is disabled etc etc.
63 * Pad this out to 32 bytes for cache and indexing reasons.
65 typedef struct irq_desc {
66 hw_irq_controller *handler;
68 struct irqaction *action; /* IRQ action list */
69 unsigned int status; /* IRQ status */
70 unsigned int depth; /* nested irq disables */
71 unsigned int irq_count; /* For detecting broken interrupts */
72 unsigned int irqs_unhandled;
74 #if defined (CONFIG_GENERIC_PENDING_IRQ) || defined (CONFIG_IRQBALANCE)
75 unsigned int move_irq; /* Flag need to re-target intr dest*/
77 } ____cacheline_aligned irq_desc_t;
79 extern irq_desc_t irq_desc [NR_IRQS];
81 /* Return a pointer to the irq descriptor for IRQ. */
82 static inline irq_desc_t *
85 return irq_desc + irq;
88 #include <asm/hw_irq.h> /* the arch dependent stuff */
90 extern int setup_irq(unsigned int irq, struct irqaction * new);
92 #ifdef CONFIG_GENERIC_HARDIRQS
93 extern cpumask_t irq_affinity[NR_IRQS];
96 static inline void set_native_irq_info(int irq, cpumask_t mask)
98 irq_affinity[irq] = mask;
101 static inline void set_native_irq_info(int irq, cpumask_t mask)
108 #if defined (CONFIG_GENERIC_PENDING_IRQ) || defined (CONFIG_IRQBALANCE)
109 extern cpumask_t pending_irq_cpumask[NR_IRQS];
111 static inline void set_pending_irq(unsigned int irq, cpumask_t mask)
113 irq_desc_t *desc = irq_desc + irq;
116 spin_lock_irqsave(&desc->lock, flags);
118 pending_irq_cpumask[irq] = mask;
119 spin_unlock_irqrestore(&desc->lock, flags);
123 move_native_irq(int irq)
126 irq_desc_t *desc = irq_descp(irq);
128 if (likely (!desc->move_irq))
133 if (likely(cpus_empty(pending_irq_cpumask[irq])))
136 if (!desc->handler->set_affinity)
139 /* note - we hold the desc->lock */
140 cpus_and(tmp, pending_irq_cpumask[irq], cpu_online_map);
143 * If there was a valid mask to work with, please
144 * do the disable, re-program, enable sequence.
145 * This is *not* particularly important for level triggered
146 * but in a edge trigger case, we might be setting rte
147 * when an active trigger is comming in. This could
148 * cause some ioapics to mal-function.
149 * Being paranoid i guess!
151 if (unlikely(!cpus_empty(tmp))) {
152 desc->handler->disable(irq);
153 desc->handler->set_affinity(irq,tmp);
154 desc->handler->enable(irq);
156 cpus_clear(pending_irq_cpumask[irq]);
159 #ifdef CONFIG_PCI_MSI
161 * Wonder why these are dummies?
162 * For e.g the set_ioapic_affinity_vector() calls the set_ioapic_affinity_irq()
163 * counter part after translating the vector to irq info. We need to perform
164 * this operation on the real irq, when we dont use vector, i.e when
165 * pci_use_vector() is false.
167 static inline void move_irq(int irq)
171 static inline void set_irq_info(int irq, cpumask_t mask)
175 #else // CONFIG_PCI_MSI
177 static inline void move_irq(int irq)
179 move_native_irq(irq);
182 static inline void set_irq_info(int irq, cpumask_t mask)
184 set_native_irq_info(irq, mask);
186 #endif // CONFIG_PCI_MSI
188 #else // CONFIG_GENERIC_PENDING_IRQ || CONFIG_IRQBALANCE
191 #define move_native_irq(x)
192 #define set_pending_irq(x,y)
193 static inline void set_irq_info(int irq, cpumask_t mask)
195 set_native_irq_info(irq, mask);
198 #endif // CONFIG_GENERIC_PENDING_IRQ
203 #define move_native_irq(x)
207 extern int no_irq_affinity;
208 extern int noirqdebug_setup(char *str);
210 extern fastcall int handle_IRQ_event(unsigned int irq, struct pt_regs *regs,
211 struct irqaction *action);
212 extern fastcall unsigned int __do_IRQ(unsigned int irq, struct pt_regs *regs);
213 extern void note_interrupt(unsigned int irq, irq_desc_t *desc,
214 int action_ret, struct pt_regs *regs);
215 extern int can_request_irq(unsigned int irq, unsigned long irqflags);
217 extern void init_irq_proc(void);
220 extern hw_irq_controller no_irq_type; /* needed in every arch ? */