1 2004-03-19 Philip Blundell <philb@gnu.org>
3 * config/arm/arm.c (adjacent_mem_locations): Reject location pairs
4 where both offsets are nonzero if target is Harvard architecture.
5 (load_multiple_sequence, store_multiple_sequence): Avoid two-word
6 LDM/STM on XScale unless -Os.
7 * config/arm/arm.md (arith_adjacentmem): Inhibit if tuning for
9 * genpeep.c: Have generated code include flags.h.
11 --- gcc/genpeep.c~ 2001-12-02 00:04:19.000000000 +0000
12 +++ gcc/genpeep.c 2004-03-19 11:17:18.000000000 +0000
14 printf ("#include \"recog.h\"\n");
15 printf ("#include \"except.h\"\n\n");
16 printf ("#include \"function.h\"\n\n");
17 + printf ("#include \"flags.h\"\n\n");
19 printf ("#ifdef HAVE_peephole\n");
20 printf ("extern rtx peep_operand[];\n\n");
22 --- gcc/config/arm/arm.md~ 2004-03-11 15:28:01.000000000 +0000
23 +++ gcc/config/arm/arm.md 2004-03-19 13:00:03.000000000 +0000
24 @@ -7958,13 +7958,16 @@
25 (set_attr "length" "4,8,8")]
28 +; Try to convert LDR+LDR+arith into [add+]LDM+arith
29 +; On XScale, LDM is always slower than two LDRs, so only do this if
30 +; optimising for size.
31 (define_insn "*arith_adjacentmem"
32 [(set (match_operand:SI 0 "s_register_operand" "=r")
33 (match_operator:SI 1 "shiftable_operator"
34 [(match_operand:SI 2 "memory_operand" "m")
35 (match_operand:SI 3 "memory_operand" "m")]))
36 (clobber (match_scratch:SI 4 "=r"))]
37 - "TARGET_ARM && adjacent_mem_locations (operands[2], operands[3])"
38 + "TARGET_ARM && (!arm_tune_xscale || optimize_size) && adjacent_mem_locations (operands[2], operands[3])"
46 + /* This would be a loss on a Harvard core, but adjacent_mem_locations()
47 + will prevent it from happening. */
49 ldm[0] = ops[0] = operands[4];
50 ops[1] = XEXP (XEXP (operands[2], 0), 0);
52 --- gcc/config/arm/arm.c~ 2004-03-11 15:28:01.000000000 +0000
53 +++ gcc/config/arm/arm.c 2004-03-19 15:36:03.000000000 +0000
54 @@ -3818,8 +3818,11 @@
56 if (!const_ok_for_op (PLUS, val0) || !const_ok_for_op (PLUS, val1))
59 - return (reg0 == reg1) && ((val1 - val0) == 4 || (val0 - val1) == 4);
61 + /* For Harvard cores, only accept pairs where one offset is zero.
62 + See comment in load_multiple_sequence. */
63 + return (reg0 == reg1) && ((val1 - val0) == 4 || (val0 - val1) == 4)
64 + && (!arm_ld_sched || val0 == 0 || val1 == 0);
68 @@ -4075,6 +4078,11 @@
69 *load_offset = unsorted_offsets[order[0]];
72 + /* For XScale a two-word LDM is a performance loss, so only do this if
73 + size is more important. See comments in arm_gen_load_multiple. */
74 + if (nops == 2 && arm_tune_xscale && !optimize_size)
77 if (unsorted_offsets[order[0]] == 0)
80 @@ -4307,6 +4315,11 @@
81 *load_offset = unsorted_offsets[order[0]];
84 + /* For XScale a two-word LDM is a performance loss, so only do this if
85 + size is more important. See comments in arm_gen_load_multiple. */
86 + if (nops == 2 && arm_tune_xscale && !optimize_size)
89 if (unsorted_offsets[order[0]] == 0)