3 # Patch managed by http://www.mn-logistik.de/unsupported/pxa250/patcher
6 --- /dev/null 2004-06-02 16:28:12.000000000 -0500
7 +++ glibc-2.2.5/sysdeps/arm/memcpy.S 2004-09-03 19:00:39.000000000 -0500
10 + * Optimized memcpy implementation for ARM processors
12 + * Author: Nicolas Pitre
13 + * Created: Dec 23, 2003
14 + * Copyright: (C) MontaVista Software, Inc.
16 + * This file is free software; you can redistribute it and/or
17 + * modify it under the terms of the GNU Lesser General Public
18 + * License as published by the Free Software Foundation; either
19 + * version 2.1 of the License, or (at your option) any later version.
21 + * This file is distributed in the hope that it will be useful,
22 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
24 + * Lesser General Public License for more details.
31 + * Endian independent macros for shifting bytes within registers.
42 + * Enable data preload for architectures that support it (ARMv5 and above)
44 +#if defined(__ARM_ARCH_5__) || \
45 + defined(__ARM_ARCH_5T__) || \
46 + defined(__ARM_ARCH_5TE__)
47 +#define PLD(code...) code
53 +/* char * memcpy (char *dst, const char *src) */
57 + stmfd sp!, {r0, r4, lr}
72 + PLD( subs r2, r2, #65 )
73 + stmfd sp!, {r5 - r8}
75 + PLD( pld [r1, #32] )
77 + PLD( @ cache alignment )
78 + PLD( ands ip, r1, #31 )
79 + PLD( pld [r1, #64] )
81 + PLD( rsb ip, ip, #32 )
83 + PLD( pld [r1, #96] )
86 + PLD( sub r2, r2, ip )
87 + PLD( ldmgeia r1!, {r3 - r6} )
88 + PLD( stmgeia r0!, {r3 - r6} )
90 + PLD( and ip, ip, #15 )
92 + PLD( ldr r3, [r1], #4 )
93 + PLD( ldrge r4, [r1], #4 )
94 + PLD( ldrgt r5, [r1], #4 )
95 + PLD( str r3, [r0], #4 )
96 + PLD( strge r4, [r0], #4 )
97 + PLD( strgt r5, [r0], #4 )
99 +2: PLD( pld [r1, #96] )
100 +3: ldmia r1!, {r3 - r8, ip, lr}
102 + stmia r0!, {r3 - r8, ip, lr}
106 + PLD( add r2, r2, #65 )
108 + ldmfd sp!, {r5 - r8}
109 + ldmeqfd sp!, {r0, r4, pc}
112 +4: ldmneia r1!, {r3, r4, ip, lr}
113 + stmneia r0!, {r3, r4, ip, lr}
116 +5: ldmneia r1!, {r3, r4}
117 + stmneia r0!, {r3, r4}
120 +6: ldrne r3, [r1], #4
124 + ldmeqfd sp!, {r0, r4, pc}
128 + ldrgeb r4, [r1], #1
131 + strgeb r4, [r0], #1
133 + ldmfd sp!, {r0, r4, pc}
138 + ldrgeb r4, [r1], #1
139 + ldrgtb lr, [r1], #1
141 + strgeb r4, [r0], #1
142 + strgtb lr, [r0], #1
155 + .macro forward_copy_shift pull push
158 + PLD( pld [r1, #0] )
161 + stmfd sp!, {r5 - r9}
164 + PLD( subs r2, r2, #97 )
166 + PLD( pld [r1, #32] )
168 + PLD( @ cache alignment )
169 + PLD( rsb ip, r1, #36 )
170 + PLD( pld [r1, #64] )
171 + PLD( ands ip, ip, #31 )
172 + PLD( pld [r1, #96] )
175 + PLD( pld [r1, #128] )
177 + PLD( sub r2, r2, ip )
178 +10: PLD( mov r3, lr, pull #\pull )
179 + PLD( ldr lr, [r1], #4 )
180 + PLD( subs ip, ip, #4 )
181 + PLD( orr r3, r3, lr, push #\push )
182 + PLD( str r3, [r0], #4 )
185 +11: PLD( pld [r1, #128] )
186 +12: mov r3, lr, pull #\pull
187 + ldmia r1!, {r4 - r9, ip, lr}
189 + orr r3, r3, r4, push #\push
190 + mov r4, r4, pull #\pull
191 + orr r4, r4, r5, push #\push
192 + mov r5, r5, pull #\pull
193 + orr r5, r5, r6, push #\push
194 + mov r6, r6, pull #\pull
195 + orr r6, r6, r7, push #\push
196 + mov r7, r7, pull #\pull
197 + orr r7, r7, r8, push #\push
198 + mov r8, r8, pull #\pull
199 + orr r8, r8, r9, push #\push
200 + mov r9, r9, pull #\pull
201 + orr r9, r9, ip, push #\push
202 + mov ip, ip, pull #\pull
203 + orr ip, ip, lr, push #\push
204 + stmia r0!, {r3 - r9, ip}
208 + PLD( add r2, r2, #97 )
211 +13: mov r3, lr, pull #\pull
212 + ldmia r1!, {r4 - r6, lr}
214 + orr r3, r3, r4, push #\push
215 + mov r4, r4, pull #\pull
216 + orr r4, r4, r5, push #\push
217 + mov r5, r5, pull #\pull
218 + orr r5, r5, r6, push #\push
219 + mov r6, r6, pull #\pull
220 + orr r6, r6, lr, push #\push
221 + stmia r0!, {r3 - r6}
222 +14: adds r2, r2, #28
223 + ldmfd sp!, {r5 - r9}
225 +15: mov r3, lr, pull #\pull
228 + orr r3, r3, lr, push #\push
235 + forward_copy_shift pull=8 push=24
239 +17: forward_copy_shift pull=16 push=16
243 +18: forward_copy_shift pull=24 push=8
247 + .size memcpy, . - memcpy
249 +libc_hidden_builtin_def (memcpy)
250 --- /dev/null 2004-06-02 16:28:12.000000000 -0500
251 +++ glibc-2.2.5/sysdeps/arm/memmove.S 2004-09-03 19:00:39.000000000 -0500
254 + * Optimized memmove implementation for ARM processors
256 + * Author: Nicolas Pitre
257 + * Created: Dec 23, 2003
258 + * Copyright: (C) MontaVista Software, Inc.
260 + * This file is free software; you can redistribute it and/or
261 + * modify it under the terms of the GNU Lesser General Public
262 + * License as published by the Free Software Foundation; either
263 + * version 2.1 of the License, or (at your option) any later version.
265 + * This file is distributed in the hope that it will be useful,
266 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
267 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
268 + * Lesser General Public License for more details.
275 + * Endian independent macros for shifting bytes within registers.
286 + * Enable data preload for architectures that support it (ARMv5 and above)
288 +#if defined(__ARM_ARCH_5__) || \
289 + defined(__ARM_ARCH_5T__) || \
290 + defined(__ARM_ARCH_5TE__)
291 +#define PLD(code...) code
293 +#define PLD(code...)
297 +/* char * memmove (char *dst, const char *src) */
303 + stmfd sp!, {r0, r4, lr}
309 + PLD( pld [r1, #-4] )
321 + PLD( pld [r1, #-32] )
322 + PLD( subs r2, r2, #96 )
323 + stmfd sp!, {r5 - r8}
326 + PLD( @ cache alignment )
327 + PLD( ands ip, r1, #31 )
328 + PLD( pld [r1, #-64] )
331 + PLD( pld [r1, #-96] )
334 + PLD( sub r2, r2, ip )
335 + PLD( ldmgedb r1!, {r3 - r6} )
336 + PLD( stmgedb r0!, {r3 - r6} )
338 + PLD( and ip, ip, #15 )
340 + PLD( ldr r3, [r1, #-4]! )
341 + PLD( ldrge r4, [r1, #-4]! )
342 + PLD( ldrgt r5, [r1, #-4]! )
343 + PLD( str r3, [r0, #-4]! )
344 + PLD( strge r4, [r0, #-4]! )
345 + PLD( strgt r5, [r0, #-4]! )
347 +20: PLD( pld [r1, #-96] )
348 + PLD( pld [r1, #-128] )
349 +21: ldmdb r1!, {r3, r4, ip, lr}
351 + stmdb r0!, {r3, r4, ip, lr}
352 + ldmdb r1!, {r3, r4, ip, lr}
353 + stmgedb r0!, {r3, r4, ip, lr}
354 + ldmgedb r1!, {r3, r4, ip, lr}
355 + stmgedb r0!, {r3, r4, ip, lr}
356 + ldmgedb r1!, {r3, r4, ip, lr}
358 + stmdb r0!, {r3, r4, ip, lr}
362 + PLD( add r2, r2, #96 )
364 + ldmfd sp!, {r5 - r8}
365 + ldmeqfd sp!, {r0, r4, pc}
368 +22: ldmnedb r1!, {r3, r4, ip, lr}
369 + stmnedb r0!, {r3, r4, ip, lr}
372 +23: ldmnedb r1!, {r3, r4}
373 + stmnedb r0!, {r3, r4}
376 +24: ldrne r3, [r1, #-4]!
377 + strne r3, [r0, #-4]!
380 + ldmeqfd sp!, {r0, r4, pc}
384 + ldrgeb r4, [r1, #-2]
385 + ldrgtb ip, [r1, #-3]
387 + strgeb r4, [r0, #-2]
388 + strgtb ip, [r0, #-3]
389 + ldmfd sp!, {r0, r4, pc}
392 + ldrb r3, [r1, #-1]!
393 + ldrgeb r4, [r1, #-1]!
394 + ldrgtb lr, [r1, #-1]!
395 + strb r3, [r0, #-1]!
396 + strgeb r4, [r0, #-1]!
397 + strgtb lr, [r0, #-1]!
410 + .macro backward_copy_shift push pull
413 + PLD( pld [r1, #-4] )
416 + stmfd sp!, {r5 - r9}
419 + PLD( subs r2, r2, #96 )
420 + PLD( pld [r1, #-32] )
422 + PLD( pld [r1, #-64] )
424 + PLD( @ cache alignment )
425 + PLD( ands ip, r1, #31 )
426 + PLD( pld [r1, #-96] )
429 + PLD( pld [r1, #-128] )
431 + PLD( sub r2, r2, ip )
432 +28: PLD( mov r4, r3, push #\push )
433 + PLD( ldr r3, [r1, #-4]! )
434 + PLD( subs ip, ip, #4 )
435 + PLD( orr r4, r4, r3, pull #\pull )
436 + PLD( str r4, [r0, #-4]! )
439 +29: PLD( pld [r1, #-128] )
440 +30: mov lr, r3, push #\push
441 + ldmdb r1!, {r3 - r9, ip}
443 + orr lr, lr, ip, pull #\pull
444 + mov ip, ip, push #\push
445 + orr ip, ip, r9, pull #\pull
446 + mov r9, r9, push #\push
447 + orr r9, r9, r8, pull #\pull
448 + mov r8, r8, push #\push
449 + orr r8, r8, r7, pull #\pull
450 + mov r7, r7, push #\push
451 + orr r7, r7, r6, pull #\pull
452 + mov r6, r6, push #\push
453 + orr r6, r6, r5, pull #\pull
454 + mov r5, r5, push #\push
455 + orr r5, r5, r4, pull #\pull
456 + mov r4, r4, push #\push
457 + orr r4, r4, r3, pull #\pull
458 + stmdb r0!, {r4 - r9, ip, lr}
462 + PLD( add r2, r2, #96 )
465 +31: mov r7, r3, push #\push
466 + ldmdb r1!, {r3 - r6}
468 + orr r7, r7, r6, pull #\pull
469 + mov r6, r6, push #\push
470 + orr r6, r6, r5, pull #\pull
471 + mov r5, r5, push #\push
472 + orr r5, r5, r4, pull #\pull
473 + mov r4, r4, push #\push
474 + orr r4, r4, r3, pull #\pull
475 + stmdb r0!, {r4 - r7}
476 +32: adds r2, r2, #28
477 + ldmfd sp!, {r5 - r9}
479 +33: mov r4, r3, push #\push
482 + orr r4, r4, r3, pull #\pull
489 + backward_copy_shift push=8 pull=24
493 +35: backward_copy_shift push=16 pull=16
497 +36: backward_copy_shift push=24 pull=8
501 + .size memmove, . - memmove
503 +libc_hidden_builtin_def (memmove)
504 --- /dev/null 2004-06-02 16:28:12.000000000 -0500
505 +++ glibc-2.2.5/sysdeps/arm/bcopy.S 2004-09-03 19:00:39.000000000 -0500
508 + * Optimized memmove implementation for ARM processors
510 + * Author: Nicolas Pitre
511 + * Created: Dec 23, 2003
512 + * Copyright: (C) MontaVista Software, Inc.
514 + * This file is free software; you can redistribute it and/or
515 + * modify it under the terms of the GNU Lesser General Public
516 + * License as published by the Free Software Foundation; either
517 + * version 2.1 of the License, or (at your option) any later version.
519 + * This file is distributed in the hope that it will be useful,
520 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
521 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
522 + * Lesser General Public License for more details.
529 + * Endian independent macros for shifting bytes within registers.
540 + * Enable data preload for architectures that support it (ARMv5 and above)
542 +#if defined(__ARM_ARCH_5__) || \
543 + defined(__ARM_ARCH_5T__) || \
544 + defined(__ARM_ARCH_5TE__)
545 +#define PLD(code...) code
547 +#define PLD(code...)
553 +/* void *bcopy (const char *src, char *dst, size_t size) */
562 + stmfd sp!, {r4, lr}
568 + PLD( pld [src, #-4] )
580 + PLD( pld [src, #-32] )
581 + PLD( subs r2, r2, #96 )
582 + stmfd sp!, {r5 - r8}
585 + PLD( @ cache alignment )
586 + PLD( ands ip, src, #31 )
587 + PLD( pld [src, #-64] )
590 + PLD( pld [src, #-96] )
593 + PLD( sub r2, r2, ip )
594 + PLD( ldmgedb src!, {r3 - r6} )
595 + PLD( stmgedb dst!, {r3 - r6} )
597 + PLD( and ip, ip, #15 )
599 + PLD( ldr r3, [src, #-4]! )
600 + PLD( ldrge r4, [src, #-4]! )
601 + PLD( ldrgt r5, [src, #-4]! )
602 + PLD( str r3, [dst, #-4]! )
603 + PLD( strge r4, [dst, #-4]! )
604 + PLD( strgt r5, [dst, #-4]! )
606 +20: PLD( pld [src, #-96] )
607 + PLD( pld [src, #-128] )
608 +21: ldmdb src!, {r3, r4, ip, lr}
610 + stmdb dst!, {r3, r4, ip, lr}
611 + ldmdb src!, {r3, r4, ip, lr}
612 + stmgedb dst!, {r3, r4, ip, lr}
613 + ldmgedb src!, {r3, r4, ip, lr}
614 + stmgedb dst!, {r3, r4, ip, lr}
615 + ldmgedb src!, {r3, r4, ip, lr}
617 + stmdb dst!, {r3, r4, ip, lr}
621 + PLD( add r2, r2, #96 )
623 + ldmfd sp!, {r5 - r8}
624 + ldmeqfd sp!, {r4, pc}
627 +22: ldmnedb src!, {r3, r4, ip, lr}
628 + stmnedb dst!, {r3, r4, ip, lr}
631 +23: ldmnedb src!, {r3, r4}
632 + stmnedb dst!, {r3, r4}
635 +24: ldrne r3, [src, #-4]!
636 + strne r3, [dst, #-4]!
639 + ldmeqfd sp!, {dst, r4, pc}
642 + ldrb r3, [src, #-1]
643 + ldrgeb r4, [src, #-2]
644 + ldrgtb ip, [src, #-3]
645 + strb r3, [dst, #-1]
646 + strgeb r4, [dst, #-2]
647 + strgtb ip, [dst, #-3]
648 + ldmfd sp!, {dst, r4, pc}
651 + ldrb r3, [src, #-1]!
652 + ldrgeb r4, [src, #-1]!
653 + ldrgtb lr, [src, #-1]!
654 + strb r3, [dst, #-1]!
655 + strgeb r4, [dst, #-1]!
656 + strgtb lr, [dst, #-1]!
662 +27: bic src, src, #3
669 + .macro backward_copy_shift push pull
672 + PLD( pld [src, #-4] )
675 + stmfd sp!, {r5 - r9}
678 + PLD( subs r2, r2, #96 )
679 + PLD( pld [src, #-32] )
681 + PLD( pld [src, #-64] )
683 + PLD( @ cache alignment )
684 + PLD( ands ip, src, #31 )
685 + PLD( pld [src, #-96] )
688 + PLD( pld [src, #-128] )
690 + PLD( sub r2, r2, ip )
691 +28: PLD( mov r4, r3, push #\push )
692 + PLD( ldr r3, [src, #-4]! )
693 + PLD( subs ip, ip, #4 )
694 + PLD( orr r4, r4, r3, pull #\pull )
695 + PLD( str r4, [dst, #-4]! )
698 +29: PLD( pld [src, #-128] )
699 +30: mov lr, r3, push #\push
700 + ldmdb src!, {r3 - r9, ip}
702 + orr lr, lr, ip, pull #\pull
703 + mov ip, ip, push #\push
704 + orr ip, ip, r9, pull #\pull
705 + mov r9, r9, push #\push
706 + orr r9, r9, r8, pull #\pull
707 + mov r8, r8, push #\push
708 + orr r8, r8, r7, pull #\pull
709 + mov r7, r7, push #\push
710 + orr r7, r7, r6, pull #\pull
711 + mov r6, r6, push #\push
712 + orr r6, r6, r5, pull #\pull
713 + mov r5, r5, push #\push
714 + orr r5, r5, r4, pull #\pull
715 + mov r4, r4, push #\push
716 + orr r4, r4, r3, pull #\pull
717 + stmdb dst!, {r4 - r9, ip, lr}
721 + PLD( add r2, r2, #96 )
724 +31: mov r7, r3, push #\push
725 + ldmdb src!, {r3 - r6}
727 + orr r7, r7, r6, pull #\pull
728 + mov r6, r6, push #\push
729 + orr r6, r6, r5, pull #\pull
730 + mov r5, r5, push #\push
731 + orr r5, r5, r4, pull #\pull
732 + mov r4, r4, push #\push
733 + orr r4, r4, r3, pull #\pull
734 + stmdb dst!, {r4 - r7}
735 +32: adds r2, r2, #28
736 + ldmfd sp!, {r5 - r9}
738 +33: mov r4, r3, push #\push
739 + ldr r3, [src, #-4]!
741 + orr r4, r4, r3, pull #\pull
742 + str r4, [dst, #-4]!
748 + backward_copy_shift push=8 pull=24
752 +35: backward_copy_shift push=16 pull=16
756 +36: backward_copy_shift push=24 pull=8
760 + .size bcopy, . - bcopy