org.handhelds.familiar/packages/linux/linux-mtx-1-2.4.27/08-usb-nonpci-2.4.24.patch

   1 diff -Nurb linux-mips-2.4.27/drivers/usb/host/Config.in linux/drivers/usb/host/Config.in
   2 --- linux-mips-2.4.27/drivers/usb/host/Config.in        2003-11-17 02:07:42.000000000 +0100
   3 +++ linux/drivers/usb/host/Config.in    2004-11-23 11:24:10.599627448 +0100
   4 @@ -17,3 +17,4 @@
   5     dep_tristate '  SL811HS Alternate (x86, StrongARM, isosynchronous mode)' CONFIG_USB_SL811HS_ALT $CONFIG_USB $CONFIG_EXPERIMENTAL
   6     dep_tristate '  SL811HS (x86, StrongARM) support, old driver' CONFIG_USB_SL811HS $CONFIG_USB $CONFIG_EXPERIMENTAL
   7  fi
   8 +dep_tristate '    Non-PCI OHCI support' CONFIG_USB_NON_PCI_OHCI $CONFIG_USB_OHCI
   9 diff -Nurb linux-mips-2.4.27/drivers/usb/host/usb-ohci.c linux/drivers/usb/host/usb-ohci.c
  10 --- linux-mips-2.4.27/drivers/usb/host/usb-ohci.c       2004-04-16 05:14:18.000000000 +0200
  11 +++ linux/drivers/usb/host/usb-ohci.c   2004-11-23 11:24:10.602626992 +0100
  12 @@ -2564,6 +2564,7 @@
  13                 hc_release_ohci (ohci);
  14                 return ret;
  15         }
  16 +#ifndef CONFIG_USB_NON_PCI_OHCI
  17         ohci->flags = id->driver_data;
  18
  19         /* Check for NSC87560. We have to look at the bridge (fn1) to identify
  20 @@ -2582,6 +2583,7 @@
  21                 printk (KERN_INFO __FILE__ ": Using NSC SuperIO setup\n");
  22         if (ohci->flags & OHCI_QUIRK_AMD756)
  23                 printk (KERN_INFO __FILE__ ": AMD756 erratum 4 workaround\n");
  24 +#endif
  25
  26         if (hc_reset (ohci) < 0) {
  27                 hc_release_ohci (ohci);
  28 @@ -2627,8 +2629,10 @@
  29         int temp;
  30         int i;
  31
  32 +#ifndef CONFIG_USB_NON_PCI_OHCI
  33         if (ohci->pci_latency)
  34                 pci_write_config_byte (ohci->ohci_dev, PCI_LATENCY_TIMER, ohci->pci_latency);
  35 +#endif
  36
  37         ohci->disabled = 1;
  38         ohci->sleeping = 0;
  39 @@ -2658,6 +2662,7 @@
  40
  41  /*-------------------------------------------------------------------------*/
  42
  43 +#ifndef CONFIG_USB_NON_PCI_OHCI
  44  /* configured so that an OHCI device is always provided */
  45  /* always called with process context; sleeping is OK */
  46
  47 @@ -2705,6 +2710,88 @@
  48         }
  49         return status;
  50  }
  51 +#else  /* CONFIG_USB_NON_PCI_OHCI */
  52 +
  53 +// Boot options
  54 +static int ohci_base=0, ohci_len=0;
  55 +static int ohci_irq=-1;
  56 +
  57 +MODULE_PARM(ohci_base, "i");
  58 +MODULE_PARM(ohci_len, "i");
  59 +MODULE_PARM(ohci_irq, "i");
  60 +MODULE_PARM_DESC(ohci_base, "IO Base address of OHCI Oper. registers");
  61 +MODULE_PARM_DESC(ohci_len, "IO length of OHCI Oper. registers");
  62 +MODULE_PARM_DESC(ohci_irq, "IRQ for OHCI interrupts");
  63 +
  64 +// bogus pci_dev
  65 +static struct pci_dev bogus_pcidev;
  66 +
  67 +static struct pci_driver ohci_pci_driver = {
  68 +       name:           "usb-ohci",
  69 +};
  70 +
  71 +static int __devinit
  72 +ohci_non_pci_init (void)
  73 +{
  74 +       void *mem_base;
  75 +
  76 +       if (!ohci_base || !ohci_len || (ohci_irq < 0))
  77 +               return -ENODEV;
  78 +
  79 +       if (!request_mem_region (ohci_base, ohci_len, ohci_pci_driver.name)) {
  80 +               dbg ("controller already in use");
  81 +               return -EBUSY;
  82 +       }
  83 +
  84 +       mem_base = ioremap_nocache (ohci_base, ohci_len);
  85 +       if (!mem_base) {
  86 +               err("Error mapping OHCI memory");
  87 +               return -EFAULT;
  88 +       }
  89 +
  90 +       /*
  91 +       * Fill in the bogus pci_dev. Only those members actually
  92 +       * dereferenced in this driver are initialized.
  93 +       */
  94 +       memset(&bogus_pcidev, 0, sizeof(struct pci_dev));
  95 +       strcpy(bogus_pcidev.name, "non-PCI OHCI");
  96 +       strcpy(bogus_pcidev.slot_name, "builtin");
  97 +       bogus_pcidev.resource[0].name = "OHCI Operational Registers";
  98 +       bogus_pcidev.resource[0].start = ohci_base;
  99 +       bogus_pcidev.resource[0].end = ohci_base + ohci_len;
 100 +       bogus_pcidev.resource[0].flags = 0;
 101 +       bogus_pcidev.irq = ohci_irq;
 102 +
 103 +       return hc_found_ohci (&bogus_pcidev, bogus_pcidev.irq, mem_base, NULL);
 104 +}
 105 +
 106 +#ifndef MODULE
 107 +
 108 +static int __init
 109 +ohci_setup (char* options)
 110 +{
 111 +       char* this_opt;
 112 +
 113 +       if (!options || !*options)
 114 +               return 0;
 115 +
 116 +       for(this_opt=strtok(options,",");this_opt;this_opt=strtok(NULL,",")) {
 117 +               if (!strncmp(this_opt, "base:", 5)) {
 118 +                       ohci_base = simple_strtoul(this_opt+5, NULL, 0);
 119 +               } else if (!strncmp(this_opt, "len:", 4)) {
 120 +                       ohci_len = simple_strtoul(this_opt+4, NULL, 0);
 121 +               } else if (!strncmp(this_opt, "irq:", 4)) {
 122 +                       ohci_irq = simple_strtoul(this_opt+4, NULL, 0);
 123 +               }
 124 +       }
 125 +       return 0;
 126 +}
 127 +
 128 +__setup("usb_ohci=", ohci_setup);
 129 +
 130 +#endif  /* !MODULE */
 131 +
 132 +#endif  /* CONFIG_USB_NON_PCI_OHCI */
 133
 134  /*-------------------------------------------------------------------------*/
 135
 136 @@ -2745,6 +2832,7 @@
 137  }
 138
 139
 140 +#ifndef CONFIG_USB_NON_PCI_OHCI
 141  #ifdef CONFIG_PM
 142
 143  /*-------------------------------------------------------------------------*/
 144 @@ -2983,20 +3071,29 @@
 145         resume:         ohci_pci_resume,
 146  #endif /* PM */
 147  };
 148 +#endif /* CONFIG_USB_NON_PCI_OHCI */
 149
 150
 151  /*-------------------------------------------------------------------------*/
 152
 153  static int __init ohci_hcd_init (void)
 154  {
 155 +#ifndef CONFIG_USB_NON_PCI_OHCI
 156         return pci_module_init (&ohci_pci_driver);
 157 +#else
 158 +       return ohci_non_pci_init();
 159 +#endif
 160  }
 161
 162  /*-------------------------------------------------------------------------*/
 163
 164  static void __exit ohci_hcd_cleanup (void)
 165  {
 166 +#ifndef CONFIG_USB_NON_PCI_OHCI
 167         pci_unregister_driver (&ohci_pci_driver);
 168 +#else
 169 +       ohci_pci_remove(&bogus_pcidev);
 170 +#endif
 171  }
 172
 173  module_init (ohci_hcd_init);
 174 diff -Nurb linux-mips-2.4.27/drivers/usb/host/usb-ohci.c.orig linux/drivers/usb/host/usb-ohci.c.orig
 175 --- linux-mips-2.4.27/drivers/usb/host/usb-ohci.c.orig  1970-01-01 01:00:00.000000000 +0100
 176 +++ linux/drivers/usb/host/usb-ohci.c.orig      2004-11-23 11:21:54.984244120 +0100
 177 @@ -0,0 +1,3008 @@
 178 +/*
 179 + * URB OHCI HCD (Host Controller Driver) for USB.
 180 + *
 181 + * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
 182 + * (C) Copyright 2000-2001 David Brownell <dbrownell@users.sourceforge.net>
 183 + *
 184 + * [ Initialisation is based on Linus'  ]
 185 + * [ uhci code and gregs ohci fragments ]
 186 + * [ (C) Copyright 1999 Linus Torvalds  ]
 187 + * [ (C) Copyright 1999 Gregory P. Smith]
 188 + *
 189 + *
 190 + * History:
 191 + *
 192 + * 2002/10/22 OHCI_USB_OPER for ALi lockup in IBM i1200 (ALEX <thchou@ali>)
 193 + * 2002/03/08 interrupt unlink fix (Matt Hughes), better cleanup on
 194 + *     load failure (Matthew Frederickson)
 195 + * 2002/01/20 async unlink fixes:  return -EINPROGRESS (per spec) and
 196 + *     make interrupt unlink-in-completion work (db)
 197 + * 2001/09/19 USB_ZERO_PACKET support (Jean Tourrilhes)
 198 + * 2001/07/17 power management and pmac cleanup (Benjamin Herrenschmidt)
 199 + * 2001/03/24 td/ed hashing to remove bus_to_virt (Steve Longerbeam);
 200 +       pci_map_single (db)
 201 + * 2001/03/21 td and dev/ed allocation uses new pci_pool API (db)
 202 + * 2001/03/07 hcca allocation uses pci_alloc_consistent (Steve Longerbeam)
 203 + *
 204 + * 2000/09/26 fixed races in removing the private portion of the urb
 205 + * 2000/09/07 disable bulk and control lists when unlinking the last
 206 + *     endpoint descriptor in order to avoid unrecoverable errors on
 207 + *     the Lucent chips. (rwc@sgi)
 208 + * 2000/08/29 use bandwidth claiming hooks (thanks Randy!), fix some
 209 + *     urb unlink probs, indentation fixes
 210 + * 2000/08/11 various oops fixes mostly affecting iso and cleanup from
 211 + *     device unplugs.
 212 + * 2000/06/28 use PCI hotplug framework, for better power management
 213 + *     and for Cardbus support (David Brownell)
 214 + * 2000/earlier:  fixes for NEC/Lucent chips; suspend/resume handling
 215 + *     when the controller loses power; handle UE; cleanup; ...
 216 + *
 217 + * v5.2 1999/12/07 URB 3rd preview,
 218 + * v5.1 1999/11/30 URB 2nd preview, cpia, (usb-scsi)
 219 + * v5.0 1999/11/22 URB Technical preview, Paul Mackerras powerbook susp/resume
 220 + *     i386: HUB, Keyboard, Mouse, Printer
 221 + *
 222 + * v4.3 1999/10/27 multiple HCs, bulk_request
 223 + * v4.2 1999/09/05 ISO API alpha, new dev alloc, neg Error-codes
 224 + * v4.1 1999/08/27 Randy Dunlap's - ISO API first impl.
 225 + * v4.0 1999/08/18
 226 + * v3.0 1999/06/25
 227 + * v2.1 1999/05/09  code clean up
 228 + * v2.0 1999/05/04
 229 + * v1.0 1999/04/27 initial release
 230 + */
 231 +
 232 +#include <linux/config.h>
 233 +#include <linux/module.h>
 234 +#include <linux/pci.h>
 235 +#include <linux/kernel.h>
 236 +#include <linux/delay.h>
 237 +#include <linux/ioport.h>
 238 +#include <linux/sched.h>
 239 +#include <linux/slab.h>
 240 +#include <linux/smp_lock.h>
 241 +#include <linux/errno.h>
 242 +#include <linux/init.h>
 243 +#include <linux/timer.h>
 244 +#include <linux/list.h>
 245 +#include <linux/interrupt.h>  /* for in_interrupt() */
 246 +#undef DEBUG
 247 +#include <linux/usb.h>
 248 +
 249 +#include <asm/io.h>
 250 +#include <asm/irq.h>
 251 +#include <asm/system.h>
 252 +#include <asm/unaligned.h>
 253 +
 254 +#define OHCI_USE_NPS           // force NoPowerSwitching mode
 255 +// #define OHCI_VERBOSE_DEBUG  /* not always helpful */
 256 +
 257 +#include "usb-ohci.h"
 258 +
 259 +#include "../hcd.h"
 260 +
 261 +#ifdef CONFIG_PMAC_PBOOK
 262 +#include <asm/machdep.h>
 263 +#include <asm/pmac_feature.h>
 264 +#include <asm/pci-bridge.h>
 265 +#ifndef CONFIG_PM
 266 +#define CONFIG_PM
 267 +#endif
 268 +#endif
 269 +
 270 +
 271 +/*
 272 + * Version Information
 273 + */
 274 +#define DRIVER_VERSION "v5.3"
 275 +#define DRIVER_AUTHOR "Roman Weissgaerber <weissg@vienna.at>, David Brownell"
 276 +#define DRIVER_DESC "USB OHCI Host Controller Driver"
 277 +
 278 +/* For initializing controller (mask in an HCFS mode too) */
 279 +#define        OHCI_CONTROL_INIT \
 280 +       (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
 281 +
 282 +#define OHCI_UNLINK_TIMEOUT    (HZ / 10)
 283 +
 284 +/*-------------------------------------------------------------------------*/
 285 +
 286 +/* AMD-756 (D2 rev) reports corrupt register contents in some cases.
 287 + * The erratum (#4) description is incorrect.  AMD's workaround waits
 288 + * till some bits (mostly reserved) are clear; ok for all revs.
 289 + */
 290 +#define read_roothub(hc, register, mask) ({ \
 291 +       u32 temp = readl (&hc->regs->roothub.register); \
 292 +       if (hc->flags & OHCI_QUIRK_AMD756) \
 293 +               while (temp & mask) \
 294 +                       temp = readl (&hc->regs->roothub.register); \
 295 +       temp; })
 296 +
 297 +static u32 roothub_a (struct ohci *hc)
 298 +       { return read_roothub (hc, a, 0xfc0fe000); }
 299 +static inline u32 roothub_b (struct ohci *hc)
 300 +       { return readl (&hc->regs->roothub.b); }
 301 +static inline u32 roothub_status (struct ohci *hc)
 302 +       { return readl (&hc->regs->roothub.status); }
 303 +static u32 roothub_portstatus (struct ohci *hc, int i)
 304 +       { return read_roothub (hc, portstatus [i], 0xffe0fce0); }
 305 +
 306 +
 307 +/*-------------------------------------------------------------------------*
 308 + * URB support functions
 309 + *-------------------------------------------------------------------------*/
 310 +
 311 +static void ohci_complete_add(struct ohci *ohci, struct urb *urb)
 312 +{
 313 +
 314 +       if (urb->hcpriv != NULL) {
 315 +               printk("completing with non-null priv!\n");
 316 +               return;
 317 +       }
 318 +
 319 +       if (ohci->complete_tail == NULL) {
 320 +               ohci->complete_head = urb;
 321 +               ohci->complete_tail = urb;
 322 +       } else {
 323 +               ohci->complete_head->hcpriv = urb;
 324 +               ohci->complete_tail = urb;
 325 +       }
 326 +}
 327 +
 328 +static inline struct urb *ohci_complete_get(struct ohci *ohci)
 329 +{
 330 +       struct urb *urb;
 331 +
 332 +       if ((urb = ohci->complete_head) == NULL)
 333 +               return NULL;
 334 +       if (urb == ohci->complete_tail) {
 335 +               ohci->complete_tail = NULL;
 336 +               ohci->complete_head = NULL;
 337 +       } else {
 338 +               ohci->complete_head = urb->hcpriv;
 339 +       }
 340 +       urb->hcpriv = NULL;
 341 +       return urb;
 342 +}
 343 +
 344 +static inline void ohci_complete(struct ohci *ohci)
 345 +{
 346 +       struct urb *urb;
 347 +
 348 +       spin_lock(&ohci->ohci_lock);
 349 +       while ((urb = ohci_complete_get(ohci)) != NULL) {
 350 +               spin_unlock(&ohci->ohci_lock);
 351 +               if (urb->dev) {
 352 +                       usb_dec_dev_use (urb->dev);
 353 +                       urb->dev = NULL;
 354 +               }
 355 +               if (urb->complete)
 356 +                       (*urb->complete)(urb);
 357 +               spin_lock(&ohci->ohci_lock);
 358 +       }
 359 +       spin_unlock(&ohci->ohci_lock);
 360 +}
 361 +
 362 +/* free HCD-private data associated with this URB */
 363 +
 364 +static void urb_free_priv (struct ohci *hc, urb_priv_t * urb_priv)
 365 +{
 366 +       int             i;
 367 +       int             last = urb_priv->length - 1;
 368 +       int             len;
 369 +       int             dir;
 370 +       struct td       *td;
 371 +
 372 +       if (last >= 0) {
 373 +
 374 +               /* ISOC, BULK, INTR data buffer starts at td 0
 375 +                * CTRL setup starts at td 0 */
 376 +               td = urb_priv->td [0];
 377 +
 378 +               len = td->urb->transfer_buffer_length,
 379 +               dir = usb_pipeout (td->urb->pipe)
 380 +                                       ? PCI_DMA_TODEVICE
 381 +                                       : PCI_DMA_FROMDEVICE;
 382 +
 383 +               /* unmap CTRL URB setup */
 384 +               if (usb_pipecontrol (td->urb->pipe)) {
 385 +                       pci_unmap_single (hc->ohci_dev,
 386 +                                       td->data_dma, 8, PCI_DMA_TODEVICE);
 387 +
 388 +                       /* CTRL data buffer starts at td 1 if len > 0 */
 389 +                       if (len && last > 0)
 390 +                               td = urb_priv->td [1];
 391 +               }
 392 +
 393 +               /* unmap data buffer */
 394 +               if (len && td->data_dma)
 395 +                       pci_unmap_single (hc->ohci_dev, td->data_dma, len, dir);
 396 +
 397 +               for (i = 0; i <= last; i++) {
 398 +                       td = urb_priv->td [i];
 399 +                       if (td)
 400 +                               td_free (hc, td);
 401 +               }
 402 +       }
 403 +
 404 +       kfree (urb_priv);
 405 +}
 406 +
 407 +static void urb_rm_priv_locked (struct urb * urb)
 408 +{
 409 +       urb_priv_t * urb_priv = urb->hcpriv;
 410 +
 411 +       if (urb_priv) {
 412 +               urb->hcpriv = NULL;
 413 +
 414 +#ifdef DO_TIMEOUTS
 415 +               if (urb->timeout) {
 416 +                       list_del (&urb->urb_list);
 417 +                       urb->timeout -= jiffies;
 418 +               }
 419 +#endif
 420 +
 421 +               /* Release int/iso bandwidth */
 422 +               if (urb->bandwidth) {
 423 +                       switch (usb_pipetype(urb->pipe)) {
 424 +                       case PIPE_INTERRUPT:
 425 +                               usb_release_bandwidth (urb->dev, urb, 0);
 426 +                               break;
 427 +                       case PIPE_ISOCHRONOUS:
 428 +                               usb_release_bandwidth (urb->dev, urb, 1);
 429 +                               break;
 430 +                       default:
 431 +                               break;
 432 +                       }
 433 +               }
 434 +
 435 +               urb_free_priv ((struct ohci *)urb->dev->bus->hcpriv, urb_priv);
 436 +       } else {
 437 +               if (urb->dev != NULL) {
 438 +                       err ("Non-null dev at rm_priv time");
 439 +                       // urb->dev = NULL;
 440 +               }
 441 +       }
 442 +}
 443 +
 444 +/*-------------------------------------------------------------------------*/
 445 +
 446 +#ifdef DEBUG
 447 +static int sohci_get_current_frame_number (struct usb_device * dev);
 448 +
 449 +/* debug| print the main components of an URB
 450 + * small: 0) header + data packets 1) just header */
 451 +
 452 +static void urb_print (struct urb * urb, char * str, int small)
 453 +{
 454 +       unsigned int pipe= urb->pipe;
 455 +
 456 +       if (!urb->dev || !urb->dev->bus) {
 457 +               dbg("%s URB: no dev", str);
 458 +               return;
 459 +       }
 460 +
 461 +#ifndef        OHCI_VERBOSE_DEBUG
 462 +       if (urb->status != 0)
 463 +#endif
 464 +       dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,flags:%4x,len:%d/%d,stat:%d(%x)",
 465 +                       str,
 466 +                       sohci_get_current_frame_number (urb->dev),
 467 +                       usb_pipedevice (pipe),
 468 +                       usb_pipeendpoint (pipe),
 469 +                       usb_pipeout (pipe)? 'O': 'I',
 470 +                       usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
 471 +                               (usb_pipecontrol (pipe)? "CTRL": "BULK"),
 472 +                       urb->transfer_flags,
 473 +                       urb->actual_length,
 474 +                       urb->transfer_buffer_length,
 475 +                       urb->status, urb->status);
 476 +#ifdef OHCI_VERBOSE_DEBUG
 477 +       if (!small) {
 478 +               int i, len;
 479 +
 480 +               if (usb_pipecontrol (pipe)) {
 481 +                       printk (KERN_DEBUG __FILE__ ": cmd(8):");
 482 +                       for (i = 0; i < 8 ; i++)
 483 +                               printk (" %02x", ((__u8 *) urb->setup_packet) [i]);
 484 +                       printk ("\n");
 485 +               }
 486 +               if (urb->transfer_buffer_length > 0 && urb->transfer_buffer) {
 487 +                       printk (KERN_DEBUG __FILE__ ": data(%d/%d):",
 488 +                               urb->actual_length,
 489 +                               urb->transfer_buffer_length);
 490 +                       len = usb_pipeout (pipe)?
 491 +                                               urb->transfer_buffer_length: urb->actual_length;
 492 +                       for (i = 0; i < 16 && i < len; i++)
 493 +                               printk (" %02x", ((__u8 *) urb->transfer_buffer) [i]);
 494 +                       printk ("%s stat:%d\n", i < len? "...": "", urb->status);
 495 +               }
 496 +       }
 497 +#endif
 498 +}
 499 +
 500 +/* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
 501 +void ep_print_int_eds (ohci_t * ohci, char * str) {
 502 +       int i, j;
 503 +        __u32 * ed_p;
 504 +       for (i= 0; i < 32; i++) {
 505 +               j = 5;
 506 +               ed_p = &(ohci->hcca->int_table [i]);
 507 +               if (*ed_p == 0)
 508 +                   continue;
 509 +               printk (KERN_DEBUG __FILE__ ": %s branch int %2d(%2x):", str, i, i);
 510 +               while (*ed_p != 0 && j--) {
 511 +                       ed_t *ed = dma_to_ed (ohci, le32_to_cpup(ed_p));
 512 +                       printk (" ed: %4x;", ed->hwINFO);
 513 +                       ed_p = &ed->hwNextED;
 514 +               }
 515 +               printk ("\n");
 516 +       }
 517 +}
 518 +
 519 +
 520 +static void ohci_dump_intr_mask (char *label, __u32 mask)
 521 +{
 522 +       dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
 523 +               label,
 524 +               mask,
 525 +               (mask & OHCI_INTR_MIE) ? " MIE" : "",
 526 +               (mask & OHCI_INTR_OC) ? " OC" : "",
 527 +               (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
 528 +               (mask & OHCI_INTR_FNO) ? " FNO" : "",
 529 +               (mask & OHCI_INTR_UE) ? " UE" : "",
 530 +               (mask & OHCI_INTR_RD) ? " RD" : "",
 531 +               (mask & OHCI_INTR_SF) ? " SF" : "",
 532 +               (mask & OHCI_INTR_WDH) ? " WDH" : "",
 533 +               (mask & OHCI_INTR_SO) ? " SO" : ""
 534 +               );
 535 +}
 536 +
 537 +static void maybe_print_eds (char *label, __u32 value)
 538 +{
 539 +       if (value)
 540 +               dbg ("%s %08x", label, value);
 541 +}
 542 +
 543 +static char *hcfs2string (int state)
 544 +{
 545 +       switch (state) {
 546 +               case OHCI_USB_RESET:    return "reset";
 547 +               case OHCI_USB_RESUME:   return "resume";
 548 +               case OHCI_USB_OPER:     return "operational";
 549 +               case OHCI_USB_SUSPEND:  return "suspend";
 550 +       }
 551 +       return "?";
 552 +}
 553 +
 554 +// dump control and status registers
 555 +static void ohci_dump_status (ohci_t *controller)
 556 +{
 557 +       struct ohci_regs        *regs = controller->regs;
 558 +       __u32                   temp;
 559 +
 560 +       temp = readl (&regs->revision) & 0xff;
 561 +       if (temp != 0x10)
 562 +               dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
 563 +
 564 +       temp = readl (&regs->control);
 565 +       dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
 566 +               (temp & OHCI_CTRL_RWE) ? " RWE" : "",
 567 +               (temp & OHCI_CTRL_RWC) ? " RWC" : "",
 568 +               (temp & OHCI_CTRL_IR) ? " IR" : "",
 569 +               hcfs2string (temp & OHCI_CTRL_HCFS),
 570 +               (temp & OHCI_CTRL_BLE) ? " BLE" : "",
 571 +               (temp & OHCI_CTRL_CLE) ? " CLE" : "",
 572 +               (temp & OHCI_CTRL_IE) ? " IE" : "",
 573 +               (temp & OHCI_CTRL_PLE) ? " PLE" : "",
 574 +               temp & OHCI_CTRL_CBSR
 575 +               );
 576 +
 577 +       temp = readl (&regs->cmdstatus);
 578 +       dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
 579 +               (temp & OHCI_SOC) >> 16,
 580 +               (temp & OHCI_OCR) ? " OCR" : "",
 581 +               (temp & OHCI_BLF) ? " BLF" : "",
 582 +               (temp & OHCI_CLF) ? " CLF" : "",
 583 +               (temp & OHCI_HCR) ? " HCR" : ""
 584 +               );
 585 +
 586 +       ohci_dump_intr_mask ("intrstatus", readl (&regs->intrstatus));
 587 +       ohci_dump_intr_mask ("intrenable", readl (&regs->intrenable));
 588 +       // intrdisable always same as intrenable
 589 +       // ohci_dump_intr_mask ("intrdisable", readl (&regs->intrdisable));
 590 +
 591 +       maybe_print_eds ("ed_periodcurrent", readl (&regs->ed_periodcurrent));
 592 +
 593 +       maybe_print_eds ("ed_controlhead", readl (&regs->ed_controlhead));
 594 +       maybe_print_eds ("ed_controlcurrent", readl (&regs->ed_controlcurrent));
 595 +
 596 +       maybe_print_eds ("ed_bulkhead", readl (&regs->ed_bulkhead));
 597 +       maybe_print_eds ("ed_bulkcurrent", readl (&regs->ed_bulkcurrent));
 598 +
 599 +       maybe_print_eds ("donehead", readl (&regs->donehead));
 600 +}
 601 +
 602 +static void ohci_dump_roothub (ohci_t *controller, int verbose)
 603 +{
 604 +       __u32                   temp, ndp, i;
 605 +
 606 +       temp = roothub_a (controller);
 607 +       if (temp == ~(u32)0)
 608 +               return;
 609 +       ndp = (temp & RH_A_NDP);
 610 +
 611 +       if (verbose) {
 612 +               dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
 613 +                       ((temp & RH_A_POTPGT) >> 24) & 0xff,
 614 +                       (temp & RH_A_NOCP) ? " NOCP" : "",
 615 +                       (temp & RH_A_OCPM) ? " OCPM" : "",
 616 +                       (temp & RH_A_DT) ? " DT" : "",
 617 +                       (temp & RH_A_NPS) ? " NPS" : "",
 618 +                       (temp & RH_A_PSM) ? " PSM" : "",
 619 +                       ndp
 620 +                       );
 621 +               temp = roothub_b (controller);
 622 +               dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
 623 +                       temp,
 624 +                       (temp & RH_B_PPCM) >> 16,
 625 +                       (temp & RH_B_DR)
 626 +                       );
 627 +               temp = roothub_status (controller);
 628 +               dbg ("roothub.status: %08x%s%s%s%s%s%s",
 629 +                       temp,
 630 +                       (temp & RH_HS_CRWE) ? " CRWE" : "",
 631 +                       (temp & RH_HS_OCIC) ? " OCIC" : "",
 632 +                       (temp & RH_HS_LPSC) ? " LPSC" : "",
 633 +                       (temp & RH_HS_DRWE) ? " DRWE" : "",
 634 +                       (temp & RH_HS_OCI) ? " OCI" : "",
 635 +                       (temp & RH_HS_LPS) ? " LPS" : ""
 636 +                       );
 637 +       }
 638 +
 639 +       for (i = 0; i < ndp; i++) {
 640 +               temp = roothub_portstatus (controller, i);
 641 +               dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
 642 +                       i,
 643 +                       temp,
 644 +                       (temp & RH_PS_PRSC) ? " PRSC" : "",
 645 +                       (temp & RH_PS_OCIC) ? " OCIC" : "",
 646 +                       (temp & RH_PS_PSSC) ? " PSSC" : "",
 647 +                       (temp & RH_PS_PESC) ? " PESC" : "",
 648 +                       (temp & RH_PS_CSC) ? " CSC" : "",
 649 +
 650 +                       (temp & RH_PS_LSDA) ? " LSDA" : "",
 651 +                       (temp & RH_PS_PPS) ? " PPS" : "",
 652 +                       (temp & RH_PS_PRS) ? " PRS" : "",
 653 +                       (temp & RH_PS_POCI) ? " POCI" : "",
 654 +                       (temp & RH_PS_PSS) ? " PSS" : "",
 655 +
 656 +                       (temp & RH_PS_PES) ? " PES" : "",
 657 +                       (temp & RH_PS_CCS) ? " CCS" : ""
 658 +                       );
 659 +       }
 660 +}
 661 +
 662 +static void ohci_dump (ohci_t *controller, int verbose)
 663 +{
 664 +       dbg ("OHCI controller usb-%s state", controller->ohci_dev->slot_name);
 665 +
 666 +       // dumps some of the state we know about
 667 +       ohci_dump_status (controller);
 668 +       if (verbose)
 669 +               ep_print_int_eds (controller, "hcca");
 670 +       dbg ("hcca frame #%04x", controller->hcca->frame_no);
 671 +       ohci_dump_roothub (controller, 1);
 672 +}
 673 +
 674 +
 675 +#endif
 676 +
 677 +/*-------------------------------------------------------------------------*
 678 + * Interface functions (URB)
 679 + *-------------------------------------------------------------------------*/
 680 +
 681 +/* return a request to the completion handler */
 682 +
 683 +static int sohci_return_urb (struct ohci *hc, struct urb * urb)
 684 +{
 685 +       urb_priv_t * urb_priv = urb->hcpriv;
 686 +       struct urb * urbt;
 687 +       int i;
 688 +
 689 +       if (!urb_priv)
 690 +               return -1; /* urb already unlinked */
 691 +
 692 +       /* just to be sure */
 693 +       if (!urb->complete) {
 694 +               urb_rm_priv_locked (urb);
 695 +               ohci_complete_add(hc, urb);     /* Just usb_dec_dev_use */
 696 +               return -1;
 697 +       }
 698 +
 699 +#ifdef DEBUG
 700 +       urb_print (urb, "RET", usb_pipeout (urb->pipe));
 701 +#endif
 702 +
 703 +       switch (usb_pipetype (urb->pipe)) {
 704 +               case PIPE_INTERRUPT:
 705 +                       pci_unmap_single (hc->ohci_dev,
 706 +                               urb_priv->td [0]->data_dma,
 707 +                               urb->transfer_buffer_length,
 708 +                               usb_pipeout (urb->pipe)
 709 +                                       ? PCI_DMA_TODEVICE
 710 +                                       : PCI_DMA_FROMDEVICE);
 711 +                       if (urb->interval) {
 712 +                               urb->complete (urb);
 713 +
 714 +                               /* implicitly requeued */
 715 +                               urb->actual_length = 0;
 716 +                               urb->status = -EINPROGRESS;
 717 +                               td_submit_urb (urb);
 718 +                       } else {
 719 +                               urb_rm_priv_locked (urb);
 720 +                               ohci_complete_add(hc, urb);
 721 +                       }
 722 +                       break;
 723 +
 724 +               case PIPE_ISOCHRONOUS:
 725 +                       for (urbt = urb->next; urbt && (urbt != urb); urbt = urbt->next);
 726 +                       if (urbt) { /* send the reply and requeue URB */
 727 +                               pci_unmap_single (hc->ohci_dev,
 728 +                                       urb_priv->td [0]->data_dma,
 729 +                                       urb->transfer_buffer_length,
 730 +                                       usb_pipeout (urb->pipe)
 731 +                                               ? PCI_DMA_TODEVICE
 732 +                                               : PCI_DMA_FROMDEVICE);
 733 +                               urb->complete (urb);
 734 +                               urb->actual_length = 0;
 735 +                               urb->status = USB_ST_URB_PENDING;
 736 +                               urb->start_frame = urb_priv->ed->last_iso + 1;
 737 +                               if (urb_priv->state != URB_DEL) {
 738 +                                       for (i = 0; i < urb->number_of_packets; i++) {
 739 +                                               urb->iso_frame_desc[i].actual_length = 0;
 740 +                                               urb->iso_frame_desc[i].status = -EXDEV;
 741 +                                       }
 742 +                                       td_submit_urb (urb);
 743 +                               }
 744 +
 745 +                       } else { /* unlink URB, call complete */
 746 +                               urb_rm_priv_locked (urb);
 747 +                               ohci_complete_add(hc, urb);
 748 +                       }
 749 +                       break;
 750 +
 751 +               case PIPE_BULK:
 752 +               case PIPE_CONTROL: /* unlink URB, call complete */
 753 +                       urb_rm_priv_locked (urb);
 754 +                       ohci_complete_add(hc, urb);
 755 +                       break;
 756 +       }
 757 +       return 0;
 758 +}
 759 +
 760 +/*-------------------------------------------------------------------------*/
 761 +
 762 +/* get a transfer request */
 763 +
 764 +static int sohci_submit_urb (struct urb * urb)
 765 +{
 766 +       ohci_t * ohci;
 767 +       ed_t * ed;
 768 +       urb_priv_t * urb_priv;
 769 +       unsigned int pipe = urb->pipe;
 770 +       int maxps = usb_maxpacket (urb->dev, pipe, usb_pipeout (pipe));
 771 +       int i, size = 0;
 772 +       unsigned long flags;
 773 +       int bustime = 0;
 774 +       int mem_flags = GFP_ATOMIC;
 775 +
 776 +       if (!urb->dev || !urb->dev->bus)
 777 +               return -ENODEV;
 778 +
 779 +       if (urb->hcpriv)                        /* urb already in use */
 780 +               return -EINVAL;
 781 +
 782 +//     if(usb_endpoint_halted (urb->dev, usb_pipeendpoint (pipe), usb_pipeout (pipe)))
 783 +//             return -EPIPE;
 784 +
 785 +       usb_inc_dev_use (urb->dev);
 786 +       ohci = (ohci_t *) urb->dev->bus->hcpriv;
 787 +
 788 +#ifdef DEBUG
 789 +       urb_print (urb, "SUB", usb_pipein (pipe));
 790 +#endif
 791 +
 792 +       /* handle a request to the virtual root hub */
 793 +       if (usb_pipedevice (pipe) == ohci->rh.devnum)
 794 +               return rh_submit_urb (urb);
 795 +
 796 +       spin_lock_irqsave(&ohci->ohci_lock, flags);
 797 +
 798 +       /* when controller's hung, permit only roothub cleanup attempts
 799 +        * such as powering down ports */
 800 +       if (ohci->disabled) {
 801 +               spin_unlock_irqrestore(&ohci->ohci_lock, flags);
 802 +               usb_dec_dev_use (urb->dev);
 803 +               return -ESHUTDOWN;
 804 +       }
 805 +
 806 +       /* every endpoint has a ed, locate and fill it */
 807 +       if (!(ed = ep_add_ed (urb->dev, pipe, urb->interval, 1, mem_flags))) {
 808 +               spin_unlock_irqrestore(&ohci->ohci_lock, flags);
 809 +               usb_dec_dev_use (urb->dev);
 810 +               return -ENOMEM;
 811 +       }
 812 +
 813 +       /* for the private part of the URB we need the number of TDs (size) */
 814 +       switch (usb_pipetype (pipe)) {
 815 +               case PIPE_BULK: /* one TD for every 4096 Byte */
 816 +                       size = (urb->transfer_buffer_length - 1) / 4096 + 1;
 817 +
 818 +                       /* If the transfer size is multiple of the pipe mtu,
 819 +                        * we may need an extra TD to create a empty frame
 820 +                        * Jean II */
 821 +                       if ((urb->transfer_flags & USB_ZERO_PACKET) &&
 822 +                           usb_pipeout (pipe) &&
 823 +                           (urb->transfer_buffer_length != 0) &&
 824 +                           ((urb->transfer_buffer_length % maxps) == 0))
 825 +                               size++;
 826 +                       break;
 827 +               case PIPE_ISOCHRONOUS: /* number of packets from URB */
 828 +                       size = urb->number_of_packets;
 829 +                       if (size <= 0) {
 830 +                               spin_unlock_irqrestore(&ohci->ohci_lock, flags);
 831 +                               usb_dec_dev_use (urb->dev);
 832 +                               return -EINVAL;
 833 +                       }
 834 +                       for (i = 0; i < urb->number_of_packets; i++) {
 835 +                               urb->iso_frame_desc[i].actual_length = 0;
 836 +                               urb->iso_frame_desc[i].status = -EXDEV;
 837 +                       }
 838 +                       break;
 839 +               case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
 840 +                       size = (urb->transfer_buffer_length == 0)? 2:
 841 +                                               (urb->transfer_buffer_length - 1) / 4096 + 3;
 842 +                       break;
 843 +               case PIPE_INTERRUPT: /* one TD */
 844 +                       size = 1;
 845 +                       break;
 846 +       }
 847 +
 848 +       /* allocate the private part of the URB */
 849 +       urb_priv = kmalloc (sizeof (urb_priv_t) + size * sizeof (td_t *),
 850 +                                                       GFP_ATOMIC);
 851 +       if (!urb_priv) {
 852 +               spin_unlock_irqrestore(&ohci->ohci_lock, flags);
 853 +               usb_dec_dev_use (urb->dev);
 854 +               return -ENOMEM;
 855 +       }
 856 +       memset (urb_priv, 0, sizeof (urb_priv_t) + size * sizeof (td_t *));
 857 +
 858 +       /* fill the private part of the URB */
 859 +       urb_priv->length = size;
 860 +       urb_priv->ed = ed;
 861 +
 862 +       /* allocate the TDs (updating hash chains) */
 863 +       for (i = 0; i < size; i++) {
 864 +               urb_priv->td[i] = td_alloc (ohci, SLAB_ATOMIC);
 865 +               if (!urb_priv->td[i]) {
 866 +                       urb_priv->length = i;
 867 +                       urb_free_priv (ohci, urb_priv);
 868 +                       spin_unlock_irqrestore(&ohci->ohci_lock, flags);
 869 +                       usb_dec_dev_use (urb->dev);
 870 +                       return -ENOMEM;
 871 +               }
 872 +       }
 873 +
 874 +       if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
 875 +               urb_free_priv (ohci, urb_priv);
 876 +               spin_unlock_irqrestore(&ohci->ohci_lock, flags);
 877 +               usb_dec_dev_use (urb->dev);
 878 +               return -EINVAL;
 879 +       }
 880 +
 881 +       /* allocate and claim bandwidth if needed; ISO
 882 +        * needs start frame index if it was't provided.
 883 +        */
 884 +       switch (usb_pipetype (pipe)) {
 885 +               case PIPE_ISOCHRONOUS:
 886 +                       if (urb->transfer_flags & USB_ISO_ASAP) {
 887 +                               urb->start_frame = ((ed->state == ED_OPER)
 888 +                                       ? (ed->last_iso + 1)
 889 +                                       : (le16_to_cpu (ohci->hcca->frame_no) + 10)) & 0xffff;
 890 +                       }
 891 +                       /* FALLTHROUGH */
 892 +               case PIPE_INTERRUPT:
 893 +                       if (urb->bandwidth == 0) {
 894 +                               bustime = usb_check_bandwidth (urb->dev, urb);
 895 +                       }
 896 +                       if (bustime < 0) {
 897 +                               urb_free_priv (ohci, urb_priv);
 898 +                               spin_unlock_irqrestore(&ohci->ohci_lock, flags);
 899 +                               usb_dec_dev_use (urb->dev);
 900 +                               return bustime;
 901 +                       }
 902 +                       usb_claim_bandwidth (urb->dev, urb, bustime, usb_pipeisoc (urb->pipe));
 903 +#ifdef DO_TIMEOUTS
 904 +                       urb->timeout = 0;
 905 +#endif
 906 +       }
 907 +
 908 +       urb->actual_length = 0;
 909 +       urb->hcpriv = urb_priv;
 910 +       urb->status = USB_ST_URB_PENDING;
 911 +
 912 +       /* link the ed into a chain if is not already */
 913 +       if (ed->state != ED_OPER)
 914 +               ep_link (ohci, ed);
 915 +
 916 +       /* fill the TDs and link it to the ed */
 917 +       td_submit_urb (urb);
 918 +
 919 +#ifdef DO_TIMEOUTS
 920 +       /* maybe add to ordered list of timeouts */
 921 +       if (urb->timeout) {
 922 +               struct list_head        *entry;
 923 +
 924 +               urb->timeout += jiffies;
 925 +
 926 +               list_for_each (entry, &ohci->timeout_list) {
 927 +                       struct urb      *next_urb;
 928 +
 929 +                       next_urb = list_entry (entry, struct urb, urb_list);
 930 +                       if (time_after_eq (urb->timeout, next_urb->timeout))
 931 +                               break;
 932 +               }
 933 +               list_add (&urb->urb_list, entry);
 934 +
 935 +               /* drive timeouts by SF (messy, but works) */
 936 +               writel (OHCI_INTR_SF, &ohci->regs->intrenable);
 937 +               (void)readl (&ohci->regs->intrdisable); /* PCI posting flush */
 938 +       }
 939 +#endif
 940 +
 941 +       spin_unlock_irqrestore(&ohci->ohci_lock, flags);
 942 +
 943 +       return 0;
 944 +}
 945 +
 946 +/*-------------------------------------------------------------------------*/
 947 +
 948 +/* deactivate all TDs and remove the private part of the URB */
 949 +/* interrupt callers must use async unlink mode */
 950 +
 951 +static int sohci_unlink_urb (struct urb * urb)
 952 +{
 953 +       unsigned long flags;
 954 +       ohci_t * ohci;
 955 +
 956 +       if (!urb) /* just to be sure */
 957 +               return -EINVAL;
 958 +
 959 +       if (!urb->dev || !urb->dev->bus)
 960 +               return -ENODEV;
 961 +
 962 +       ohci = (ohci_t *) urb->dev->bus->hcpriv;
 963 +
 964 +#ifdef DEBUG
 965 +       urb_print (urb, "UNLINK", 1);
 966 +#endif
 967 +
 968 +       /* handle a request to the virtual root hub */
 969 +       if (usb_pipedevice (urb->pipe) == ohci->rh.devnum)
 970 +               return rh_unlink_urb (urb);
 971 +
 972 +       spin_lock_irqsave(&ohci->ohci_lock, flags);
 973 +       if (urb->hcpriv && (urb->status == USB_ST_URB_PENDING)) {
 974 +               if (!ohci->disabled) {
 975 +                       urb_priv_t  * urb_priv;
 976 +
 977 +                       /* interrupt code may not sleep; it must use
 978 +                        * async status return to unlink pending urbs.
 979 +                        */
 980 +                       if (!(urb->transfer_flags & USB_ASYNC_UNLINK)
 981 +                                       && in_interrupt ()) {
 982 +                               spin_unlock_irqrestore(&ohci->ohci_lock, flags);
 983 +                               err ("bug in call from %p; use async!",
 984 +                                       __builtin_return_address(0));
 985 +                               return -EWOULDBLOCK;
 986 +                       }
 987 +
 988 +                       /* flag the urb and its TDs for deletion in some
 989 +                        * upcoming SF interrupt delete list processing
 990 +                        */
 991 +                       urb_priv = urb->hcpriv;
 992 +
 993 +                       if (!urb_priv || (urb_priv->state == URB_DEL)) {
 994 +                               spin_unlock_irqrestore(&ohci->ohci_lock, flags);
 995 +                               return 0;
 996 +                       }
 997 +
 998 +                       urb_priv->state = URB_DEL;
 999 +                       ep_rm_ed (urb->dev, urb_priv->ed);
1000 +                       urb_priv->ed->state |= ED_URB_DEL;
1001 +
1002 +                       if (!(urb->transfer_flags & USB_ASYNC_UNLINK)) {
1003 +                               DECLARE_WAIT_QUEUE_HEAD (unlink_wakeup);
1004 +                               DECLARE_WAITQUEUE (wait, current);
1005 +                               int timeout = OHCI_UNLINK_TIMEOUT;
1006 +
1007 +                               add_wait_queue (&unlink_wakeup, &wait);
1008 +                               urb_priv->wait = &unlink_wakeup;
1009 +                               spin_unlock_irqrestore(&ohci->ohci_lock, flags);
1010 +
1011 +                               /* wait until all TDs are deleted */
1012 +                               set_current_state(TASK_UNINTERRUPTIBLE);
1013 +                               while (timeout && (urb->status == USB_ST_URB_PENDING)) {
1014 +                                       timeout = schedule_timeout (timeout);
1015 +                                       set_current_state(TASK_UNINTERRUPTIBLE);
1016 +                               }
1017 +                               set_current_state(TASK_RUNNING);
1018 +                               remove_wait_queue (&unlink_wakeup, &wait);
1019 +                               if (urb->status == USB_ST_URB_PENDING) {
1020 +                                       err ("unlink URB timeout");
1021 +                                       return -ETIMEDOUT;
1022 +                               }
1023 +
1024 +                               usb_dec_dev_use (urb->dev);
1025 +                               urb->dev = NULL;
1026 +                               if (urb->complete)
1027 +                                       urb->complete (urb);
1028 +                       } else {
1029 +                               /* usb_dec_dev_use done in dl_del_list() */
1030 +                               urb->status = -EINPROGRESS;
1031 +                               spin_unlock_irqrestore(&ohci->ohci_lock, flags);
1032 +                               return -EINPROGRESS;
1033 +                       }
1034 +               } else {
1035 +                       urb_rm_priv_locked (urb);
1036 +                       spin_unlock_irqrestore(&ohci->ohci_lock, flags);
1037 +                       usb_dec_dev_use (urb->dev);
1038 +                       urb->dev = NULL;
1039 +                       if (urb->transfer_flags & USB_ASYNC_UNLINK) {
1040 +                               urb->status = -ECONNRESET;
1041 +                               if (urb->complete)
1042 +                                       urb->complete (urb);
1043 +                       } else
1044 +                               urb->status = -ENOENT;
1045 +               }
1046 +       } else {
1047 +               spin_unlock_irqrestore(&ohci->ohci_lock, flags);
1048 +       }
1049 +       return 0;
1050 +}
1051 +
1052 +/*-------------------------------------------------------------------------*/
1053 +
1054 +/* allocate private data space for a usb device */
1055 +
1056 +static int sohci_alloc_dev (struct usb_device *usb_dev)
1057 +{
1058 +       struct ohci_device * dev;
1059 +
1060 +       dev = dev_alloc ((struct ohci *) usb_dev->bus->hcpriv, ALLOC_FLAGS);
1061 +       if (!dev)
1062 +               return -ENOMEM;
1063 +
1064 +       usb_dev->hcpriv = dev;
1065 +       return 0;
1066 +}
1067 +
1068 +/*-------------------------------------------------------------------------*/
1069 +
1070 +/* may be called from interrupt context */
1071 +/* frees private data space of usb device */
1072 +
1073 +static int sohci_free_dev (struct usb_device * usb_dev)
1074 +{
1075 +       unsigned long flags;
1076 +       int i, cnt = 0;
1077 +       ed_t * ed;
1078 +       struct ohci_device * dev = usb_to_ohci (usb_dev);
1079 +       ohci_t * ohci = usb_dev->bus->hcpriv;
1080 +
1081 +       if (!dev)
1082 +               return 0;
1083 +
1084 +       if (usb_dev->devnum >= 0) {
1085 +
1086 +               /* driver disconnects should have unlinked all urbs
1087 +                * (freeing all the TDs, unlinking EDs) but we need
1088 +                * to defend against bugs that prevent that.
1089 +                */
1090 +               spin_lock_irqsave(&ohci->ohci_lock, flags);
1091 +               for(i = 0; i < NUM_EDS; i++) {
1092 +                       ed = &(dev->ed[i]);
1093 +                       if (ed->state != ED_NEW) {
1094 +                               if (ed->state == ED_OPER) {
1095 +                                       /* driver on that interface didn't unlink an urb */
1096 +                                       dbg ("driver usb-%s dev %d ed 0x%x unfreed URB",
1097 +                                               ohci->ohci_dev->slot_name, usb_dev->devnum, i);
1098 +                                       ep_unlink (ohci, ed);
1099 +                               }
1100 +                               ep_rm_ed (usb_dev, ed);
1101 +                               ed->state = ED_DEL;
1102 +                               cnt++;
1103 +                       }
1104 +               }
1105 +               spin_unlock_irqrestore(&ohci->ohci_lock, flags);
1106 +
1107 +               /* if the controller is running, tds for those unlinked
1108 +                * urbs get freed by dl_del_list at the next SF interrupt
1109 +                */
1110 +               if (cnt > 0) {
1111 +
1112 +                       if (ohci->disabled) {
1113 +                               /* FIXME: Something like this should kick in,
1114 +                                * though it's currently an exotic case ...
1115 +                                * the controller won't ever be touching
1116 +                                * these lists again!!
1117 +                               dl_del_list (ohci,
1118 +                                       le16_to_cpu (ohci->hcca->frame_no) & 1);
1119 +                                */
1120 +                               warn ("TD leak, %d", cnt);
1121 +
1122 +                       } else if (!in_interrupt ()) {
1123 +                               DECLARE_WAIT_QUEUE_HEAD (freedev_wakeup);
1124 +                               DECLARE_WAITQUEUE (wait, current);
1125 +                               int timeout = OHCI_UNLINK_TIMEOUT;
1126 +
1127 +                               /* SF interrupt handler calls dl_del_list */
1128 +                               add_wait_queue (&freedev_wakeup, &wait);
1129 +                               dev->wait = &freedev_wakeup;
1130 +                               set_current_state(TASK_UNINTERRUPTIBLE);
1131 +                               while (timeout && dev->ed_cnt)
1132 +                                       timeout = schedule_timeout (timeout);
1133 +                               set_current_state(TASK_RUNNING);
1134 +                               remove_wait_queue (&freedev_wakeup, &wait);
1135 +                               if (dev->ed_cnt) {
1136 +                                       err ("free device %d timeout", usb_dev->devnum);
1137 +                                       return -ETIMEDOUT;
1138 +                               }
1139 +                       } else {
1140 +                               /* likely some interface's driver has a refcount bug */
1141 +                               err ("bus %s devnum %d deletion in interrupt",
1142 +                                       ohci->ohci_dev->slot_name, usb_dev->devnum);
1143 +                               BUG ();
1144 +                       }
1145 +               }
1146 +       }
1147 +
1148 +       /* free device, and associated EDs */
1149 +       dev_free (ohci, dev);
1150 +
1151 +       return 0;
1152 +}
1153 +
1154 +/*-------------------------------------------------------------------------*/
1155 +
1156 +/* tell us the current USB frame number */
1157 +
1158 +static int sohci_get_current_frame_number (struct usb_device *usb_dev)
1159 +{
1160 +       ohci_t * ohci = usb_dev->bus->hcpriv;
1161 +
1162 +       return le16_to_cpu (ohci->hcca->frame_no);
1163 +}
1164 +
1165 +/*-------------------------------------------------------------------------*/
1166 +
1167 +struct usb_operations sohci_device_operations = {
1168 +       sohci_alloc_dev,
1169 +       sohci_free_dev,
1170 +       sohci_get_current_frame_number,
1171 +       sohci_submit_urb,
1172 +       sohci_unlink_urb
1173 +};
1174 +
1175 +/*-------------------------------------------------------------------------*
1176 + * ED handling functions
1177 + *-------------------------------------------------------------------------*/
1178 +
1179 +/* search for the right branch to insert an interrupt ed into the int tree
1180 + * do some load ballancing;
1181 + * returns the branch and
1182 + * sets the interval to interval = 2^integer (ld (interval)) */
1183 +
1184 +static int ep_int_ballance (ohci_t * ohci, int interval, int load)
1185 +{
1186 +       int i, branch = 0;
1187 +
1188 +       /* search for the least loaded interrupt endpoint branch of all 32 branches */
1189 +       for (i = 0; i < 32; i++)
1190 +               if (ohci->ohci_int_load [branch] > ohci->ohci_int_load [i]) branch = i;
1191 +
1192 +       branch = branch % interval;
1193 +       for (i = branch; i < 32; i += interval) ohci->ohci_int_load [i] += load;
1194 +
1195 +       return branch;
1196 +}
1197 +
1198 +/*-------------------------------------------------------------------------*/
1199 +
1200 +/*  2^int( ld (inter)) */
1201 +
1202 +static int ep_2_n_interval (int inter)
1203 +{
1204 +       int i;
1205 +       for (i = 0; ((inter >> i) > 1 ) && (i < 5); i++);
1206 +       return 1 << i;
1207 +}
1208 +
1209 +/*-------------------------------------------------------------------------*/
1210 +
1211 +/* the int tree is a binary tree
1212 + * in order to process it sequentially the indexes of the branches have to be mapped
1213 + * the mapping reverses the bits of a word of num_bits length */
1214 +
1215 +static int ep_rev (int num_bits, int word)
1216 +{
1217 +       int i, wout = 0;
1218 +
1219 +       for (i = 0; i < num_bits; i++) wout |= (((word >> i) & 1) << (num_bits - i - 1));
1220 +       return wout;
1221 +}
1222 +
1223 +/*-------------------------------------------------------------------------*/
1224 +
1225 +/* link an ed into one of the HC chains */
1226 +
1227 +static int ep_link (ohci_t * ohci, ed_t * edi)
1228 +{
1229 +       int int_branch;
1230 +       int i;
1231 +       int inter;
1232 +       int interval;
1233 +       int load;
1234 +       __u32 * ed_p;
1235 +       volatile ed_t * ed = edi;
1236 +
1237 +       ed->state = ED_OPER;
1238 +
1239 +       switch (ed->type) {
1240 +       case PIPE_CONTROL:
1241 +               ed->hwNextED = 0;
1242 +               if (ohci->ed_controltail == NULL) {
1243 +                       writel (ed->dma, &ohci->regs->ed_controlhead);
1244 +               } else {
1245 +                       ohci->ed_controltail->hwNextED = cpu_to_le32 (ed->dma);
1246 +               }
1247 +               ed->ed_prev = ohci->ed_controltail;
1248 +               if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
1249 +                       !ohci->ed_rm_list[1] && !ohci->sleeping) {
1250 +                       ohci->hc_control |= OHCI_CTRL_CLE;
1251 +                       writel (ohci->hc_control, &ohci->regs->control);
1252 +               }
1253 +               ohci->ed_controltail = edi;
1254 +               break;
1255 +
1256 +       case PIPE_BULK:
1257 +               ed->hwNextED = 0;
1258 +               if (ohci->ed_bulktail == NULL) {
1259 +                       writel (ed->dma, &ohci->regs->ed_bulkhead);
1260 +               } else {
1261 +                       ohci->ed_bulktail->hwNextED = cpu_to_le32 (ed->dma);
1262 +               }
1263 +               ed->ed_prev = ohci->ed_bulktail;
1264 +               if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
1265 +                       !ohci->ed_rm_list[1] && !ohci->sleeping) {
1266 +                       ohci->hc_control |= OHCI_CTRL_BLE;
1267 +                       writel (ohci->hc_control, &ohci->regs->control);
1268 +               }
1269 +               ohci->ed_bulktail = edi;
1270 +               break;
1271 +
1272 +       case PIPE_INTERRUPT:
1273 +               load = ed->int_load;
1274 +               interval = ep_2_n_interval (ed->int_period);
1275 +               ed->int_interval = interval;
1276 +               int_branch = ep_int_ballance (ohci, interval, load);
1277 +               ed->int_branch = int_branch;
1278 +
1279 +               for (i = 0; i < ep_rev (6, interval); i += inter) {
1280 +                       inter = 1;
1281 +                       for (ed_p = &(ohci->hcca->int_table[ep_rev (5, i) + int_branch]);
1282 +                               (*ed_p != 0) && ((dma_to_ed (ohci, le32_to_cpup (ed_p)))->int_interval >= interval);
1283 +                               ed_p = &((dma_to_ed (ohci, le32_to_cpup (ed_p)))->hwNextED))
1284 +                                       inter = ep_rev (6, (dma_to_ed (ohci, le32_to_cpup (ed_p)))->int_interval);
1285 +                       ed->hwNextED = *ed_p;
1286 +                       *ed_p = cpu_to_le32 (ed->dma);
1287 +               }
1288 +#ifdef DEBUG
1289 +               ep_print_int_eds (ohci, "LINK_INT");
1290 +#endif
1291 +               break;
1292 +
1293 +       case PIPE_ISOCHRONOUS:
1294 +               ed->hwNextED = 0;
1295 +               ed->int_interval = 1;
1296 +               if (ohci->ed_isotail != NULL) {
1297 +                       ohci->ed_isotail->hwNextED = cpu_to_le32 (ed->dma);
1298 +                       ed->ed_prev = ohci->ed_isotail;
1299 +               } else {
1300 +                       for ( i = 0; i < 32; i += inter) {
1301 +                               inter = 1;
1302 +                               for (ed_p = &(ohci->hcca->int_table[ep_rev (5, i)]);
1303 +                                       *ed_p != 0;
1304 +                                       ed_p = &((dma_to_ed (ohci, le32_to_cpup (ed_p)))->hwNextED))
1305 +                                               inter = ep_rev (6, (dma_to_ed (ohci, le32_to_cpup (ed_p)))->int_interval);
1306 +                               *ed_p = cpu_to_le32 (ed->dma);
1307 +                       }
1308 +                       ed->ed_prev = NULL;
1309 +               }
1310 +               ohci->ed_isotail = edi;
1311 +#ifdef DEBUG
1312 +               ep_print_int_eds (ohci, "LINK_ISO");
1313 +#endif
1314 +               break;
1315 +       }
1316 +       return 0;
1317 +}
1318 +
1319 +/*-------------------------------------------------------------------------*/
1320 +
1321 +/* scan the periodic table to find and unlink this ED */
1322 +static void periodic_unlink (
1323 +       struct ohci     *ohci,
1324 +       struct ed       *ed,
1325 +       unsigned        index,
1326 +       unsigned        period
1327 +) {
1328 +       for (; index < NUM_INTS; index += period) {
1329 +               __u32   *ed_p = &ohci->hcca->int_table [index];
1330 +
1331 +               /* ED might have been unlinked through another path */
1332 +               while (*ed_p != 0) {
1333 +                       if ((dma_to_ed (ohci, le32_to_cpup (ed_p))) == ed) {
1334 +                               *ed_p = ed->hwNextED;
1335 +                               break;
1336 +                       }
1337 +                       ed_p = & ((dma_to_ed (ohci,
1338 +                               le32_to_cpup (ed_p)))->hwNextED);
1339 +               }
1340 +       }
1341 +}
1342 +
1343 +/* unlink an ed from one of the HC chains.
1344 + * just the link to the ed is unlinked.
1345 + * the link from the ed still points to another operational ed or 0
1346 + * so the HC can eventually finish the processing of the unlinked ed */
1347 +
1348 +static int ep_unlink (ohci_t * ohci, ed_t * ed)
1349 +{
1350 +       int i;
1351 +
1352 +       ed->hwINFO |= cpu_to_le32 (OHCI_ED_SKIP);
1353 +
1354 +       switch (ed->type) {
1355 +       case PIPE_CONTROL:
1356 +               if (ed->ed_prev == NULL) {
1357 +                       if (!ed->hwNextED) {
1358 +                               ohci->hc_control &= ~OHCI_CTRL_CLE;
1359 +                               writel (ohci->hc_control, &ohci->regs->control);
1360 +                       }
1361 +                       writel (le32_to_cpup (&ed->hwNextED), &ohci->regs->ed_controlhead);
1362 +               } else {
1363 +                       ed->ed_prev->hwNextED = ed->hwNextED;
1364 +               }
1365 +               if (ohci->ed_controltail == ed) {
1366 +                       ohci->ed_controltail = ed->ed_prev;
1367 +               } else {
1368 +                       (dma_to_ed (ohci, le32_to_cpup (&ed->hwNextED)))->ed_prev = ed->ed_prev;
1369 +               }
1370 +               break;
1371 +
1372 +       case PIPE_BULK:
1373 +               if (ed->ed_prev == NULL) {
1374 +                       if (!ed->hwNextED) {
1375 +                               ohci->hc_control &= ~OHCI_CTRL_BLE;
1376 +                               writel (ohci->hc_control, &ohci->regs->control);
1377 +                       }
1378 +                       writel (le32_to_cpup (&ed->hwNextED), &ohci->regs->ed_bulkhead);
1379 +               } else {
1380 +                       ed->ed_prev->hwNextED = ed->hwNextED;
1381 +               }
1382 +               if (ohci->ed_bulktail == ed) {
1383 +                       ohci->ed_bulktail = ed->ed_prev;
1384 +               } else {
1385 +                       (dma_to_ed (ohci, le32_to_cpup (&ed->hwNextED)))->ed_prev = ed->ed_prev;
1386 +               }
1387 +               break;
1388 +
1389 +       case PIPE_INTERRUPT:
1390 +               periodic_unlink (ohci, ed, 0, 1);
1391 +               for (i = ed->int_branch; i < 32; i += ed->int_interval)
1392 +                   ohci->ohci_int_load[i] -= ed->int_load;
1393 +#ifdef DEBUG
1394 +               ep_print_int_eds (ohci, "UNLINK_INT");
1395 +#endif
1396 +               break;
1397 +
1398 +       case PIPE_ISOCHRONOUS:
1399 +               if (ohci->ed_isotail == ed)
1400 +                       ohci->ed_isotail = ed->ed_prev;
1401 +               if (ed->hwNextED != 0)
1402 +                   (dma_to_ed (ohci, le32_to_cpup (&ed->hwNextED)))
1403 +                       ->ed_prev = ed->ed_prev;
1404 +
1405 +               if (ed->ed_prev != NULL)
1406 +                       ed->ed_prev->hwNextED = ed->hwNextED;
1407 +               else
1408 +                       periodic_unlink (ohci, ed, 0, 1);
1409 +#ifdef DEBUG
1410 +               ep_print_int_eds (ohci, "UNLINK_ISO");
1411 +#endif
1412 +               break;
1413 +       }
1414 +       ed->state = ED_UNLINK;
1415 +       return 0;
1416 +}
1417 +
1418 +
1419 +/*-------------------------------------------------------------------------*/
1420 +
1421 +/* add/reinit an endpoint; this should be done once at the usb_set_configuration command,
1422 + * but the USB stack is a little bit stateless  so we do it at every transaction
1423 + * if the state of the ed is ED_NEW then a dummy td is added and the state is changed to ED_UNLINK
1424 + * in all other cases the state is left unchanged
1425 + * the ed info fields are setted anyway even though most of them should not change */
1426 +
1427 +static ed_t * ep_add_ed (
1428 +       struct usb_device * usb_dev,
1429 +       unsigned int pipe,
1430 +       int interval,
1431 +       int load,
1432 +       int mem_flags
1433 +)
1434 +{
1435 +       ohci_t * ohci = usb_dev->bus->hcpriv;
1436 +       td_t * td;
1437 +       ed_t * ed_ret;
1438 +       volatile ed_t * ed;
1439 +
1440 +       ed = ed_ret = &(usb_to_ohci (usb_dev)->ed[(usb_pipeendpoint (pipe) << 1) |
1441 +                       (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))]);
1442 +
1443 +       if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
1444 +               /* pending delete request */
1445 +               return NULL;
1446 +       }
1447 +
1448 +       if (ed->state == ED_NEW) {
1449 +               ed->hwINFO = cpu_to_le32 (OHCI_ED_SKIP); /* skip ed */
1450 +               /* dummy td; end of td list for ed */
1451 +               td = td_alloc (ohci, SLAB_ATOMIC);
1452 +               /* hash the ed for later reverse mapping */
1453 +               if (!td || !hash_add_ed (ohci, (ed_t *)ed)) {
1454 +                       /* out of memory */
1455 +                       if (td)
1456 +                           td_free(ohci, td);
1457 +                       return NULL;
1458 +               }
1459 +               ed->hwTailP = cpu_to_le32 (td->td_dma);
1460 +               ed->hwHeadP = ed->hwTailP;
1461 +               ed->state = ED_UNLINK;
1462 +               ed->type = usb_pipetype (pipe);
1463 +               usb_to_ohci (usb_dev)->ed_cnt++;
1464 +       }
1465 +
1466 +       ohci->dev[usb_pipedevice (pipe)] = usb_dev;
1467 +
1468 +       ed->hwINFO = cpu_to_le32 (usb_pipedevice (pipe)
1469 +                       | usb_pipeendpoint (pipe) << 7
1470 +                       | (usb_pipeisoc (pipe)? 0x8000: 0)
1471 +                       | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
1472 +                       | usb_pipeslow (pipe) << 13
1473 +                       | usb_maxpacket (usb_dev, pipe, usb_pipeout (pipe)) << 16);
1474 +
1475 +       if (ed->type == PIPE_INTERRUPT && ed->state == ED_UNLINK) {
1476 +               ed->int_period = interval;
1477 +               ed->int_load = load;
1478 +       }
1479 +
1480 +       return ed_ret;
1481 +}
1482 +
1483 +/*-------------------------------------------------------------------------*/
1484 +
1485 +/* request the removal of an endpoint
1486 + * put the ep on the rm_list and request a stop of the bulk or ctrl list
1487 + * real removal is done at the next start frame (SF) hardware interrupt */
1488 +
1489 +static void ep_rm_ed (struct usb_device * usb_dev, ed_t * ed)
1490 +{
1491 +       unsigned int frame;
1492 +       ohci_t * ohci = usb_dev->bus->hcpriv;
1493 +
1494 +       if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL))
1495 +               return;
1496 +
1497 +       ed->hwINFO |= cpu_to_le32 (OHCI_ED_SKIP);
1498 +
1499 +       if (!ohci->disabled) {
1500 +               switch (ed->type) {
1501 +                       case PIPE_CONTROL: /* stop control list */
1502 +                               ohci->hc_control &= ~OHCI_CTRL_CLE;
1503 +                               writel (ohci->hc_control, &ohci->regs->control);
1504 +                               break;
1505 +                       case PIPE_BULK: /* stop bulk list */
1506 +                               ohci->hc_control &= ~OHCI_CTRL_BLE;
1507 +                               writel (ohci->hc_control, &ohci->regs->control);
1508 +                               break;
1509 +               }
1510 +       }
1511 +
1512 +       frame = le16_to_cpu (ohci->hcca->frame_no) & 0x1;
1513 +       ed->ed_rm_list = ohci->ed_rm_list[frame];
1514 +       ohci->ed_rm_list[frame] = ed;
1515 +
1516 +       if (!ohci->disabled && !ohci->sleeping) {
1517 +               /* enable SOF interrupt */
1518 +               writel (OHCI_INTR_SF, &ohci->regs->intrstatus);
1519 +               writel (OHCI_INTR_SF, &ohci->regs->intrenable);
1520 +               (void)readl (&ohci->regs->intrdisable); /* PCI posting flush */
1521 +       }
1522 +}
1523 +
1524 +/*-------------------------------------------------------------------------*
1525 + * TD handling functions
1526 + *-------------------------------------------------------------------------*/
1527 +
1528 +/* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
1529 +
1530 +static void
1531 +td_fill (ohci_t * ohci, unsigned int info,
1532 +       dma_addr_t data, int len,
1533 +       struct urb * urb, int index)
1534 +{
1535 +       volatile td_t  * td, * td_pt;
1536 +       urb_priv_t * urb_priv = urb->hcpriv;
1537 +
1538 +       if (index >= urb_priv->length) {
1539 +               err("internal OHCI error: TD index > length");
1540 +               return;
1541 +       }
1542 +
1543 +       /* use this td as the next dummy */
1544 +       td_pt = urb_priv->td [index];
1545 +       td_pt->hwNextTD = 0;
1546 +
1547 +       /* fill the old dummy TD */
1548 +       td = urb_priv->td [index] = dma_to_td (ohci,
1549 +                       le32_to_cpup (&urb_priv->ed->hwTailP) & ~0xf);
1550 +
1551 +       td->ed = urb_priv->ed;
1552 +       td->next_dl_td = NULL;
1553 +       td->index = index;
1554 +       td->urb = urb;
1555 +       td->data_dma = data;
1556 +       if (!len)
1557 +               data = 0;
1558 +
1559 +       td->hwINFO = cpu_to_le32 (info);
1560 +       if ((td->ed->type) == PIPE_ISOCHRONOUS) {
1561 +               td->hwCBP = cpu_to_le32 (data & 0xFFFFF000);
1562 +               td->ed->last_iso = info & 0xffff;
1563 +       } else {
1564 +               td->hwCBP = cpu_to_le32 (data);
1565 +       }
1566 +       if (data)
1567 +               td->hwBE = cpu_to_le32 (data + len - 1);
1568 +       else
1569 +               td->hwBE = 0;
1570 +       td->hwNextTD = cpu_to_le32 (td_pt->td_dma);
1571 +       td->hwPSW [0] = cpu_to_le16 ((data & 0x0FFF) | 0xE000);
1572 +
1573 +       /* append to queue */
1574 +       wmb();
1575 +       td->ed->hwTailP = td->hwNextTD;
1576 +}
1577 +
1578 +/*-------------------------------------------------------------------------*/
1579 +
1580 +/* prepare all TDs of a transfer */
1581 +
1582 +static void td_submit_urb (struct urb * urb)
1583 +{
1584 +       urb_priv_t * urb_priv = urb->hcpriv;
1585 +       ohci_t * ohci = (ohci_t *) urb->dev->bus->hcpriv;
1586 +       dma_addr_t data;
1587 +       int data_len = urb->transfer_buffer_length;
1588 +       int maxps = usb_maxpacket (urb->dev, urb->pipe, usb_pipeout (urb->pipe));
1589 +       int cnt = 0;
1590 +       __u32 info = 0;
1591 +       unsigned int toggle = 0;
1592 +
1593 +       /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
1594 +       if(usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe), usb_pipeout(urb->pipe))) {
1595 +               toggle = TD_T_TOGGLE;
1596 +       } else {
1597 +               toggle = TD_T_DATA0;
1598 +               usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), usb_pipeout(urb->pipe), 1);
1599 +       }
1600 +
1601 +       urb_priv->td_cnt = 0;
1602 +
1603 +       if (data_len) {
1604 +               data = pci_map_single (ohci->ohci_dev,
1605 +                       urb->transfer_buffer, data_len,
1606 +                       usb_pipeout (urb->pipe)
1607 +                               ? PCI_DMA_TODEVICE
1608 +                               : PCI_DMA_FROMDEVICE
1609 +                       );
1610 +       } else
1611 +               data = 0;
1612 +
1613 +       switch (usb_pipetype (urb->pipe)) {
1614 +               case PIPE_BULK:
1615 +                       info = usb_pipeout (urb->pipe)?
1616 +                               TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
1617 +                       while(data_len > 4096) {
1618 +                               td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, urb, cnt);
1619 +                               data += 4096; data_len -= 4096; cnt++;
1620 +                       }
1621 +                       info = usb_pipeout (urb->pipe)?
1622 +                               TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
1623 +                       td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, urb, cnt);
1624 +                       cnt++;
1625 +
1626 +                       /* If the transfer size is multiple of the pipe mtu,
1627 +                        * we may need an extra TD to create a empty frame
1628 +                        * Note : another way to check this condition is
1629 +                        * to test if(urb_priv->length > cnt) - Jean II */
1630 +                       if ((urb->transfer_flags & USB_ZERO_PACKET) &&
1631 +                           usb_pipeout (urb->pipe) &&
1632 +                           (urb->transfer_buffer_length != 0) &&
1633 +                           ((urb->transfer_buffer_length % maxps) == 0)) {
1634 +                               td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), 0, 0, urb, cnt);
1635 +                               cnt++;
1636 +                       }
1637 +
1638 +                       if (!ohci->sleeping) {
1639 +                               wmb();
1640 +                               writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
1641 +                               (void)readl (&ohci->regs->intrdisable); /* PCI posting flush */
1642 +                       }
1643 +                       break;
1644 +
1645 +               case PIPE_INTERRUPT:
1646 +                       info = usb_pipeout (urb->pipe)?
1647 +                               TD_CC | TD_DP_OUT | toggle: TD_CC | TD_R | TD_DP_IN | toggle;
1648 +                       td_fill (ohci, info, data, data_len, urb, cnt++);
1649 +                       break;
1650 +
1651 +               case PIPE_CONTROL:
1652 +                       info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
1653 +                       td_fill (ohci, info,
1654 +                               pci_map_single (ohci->ohci_dev,
1655 +                                       urb->setup_packet, 8,
1656 +                                       PCI_DMA_TODEVICE),
1657 +                               8, urb, cnt++);
1658 +                       if (data_len > 0) {
1659 +                               info = usb_pipeout (urb->pipe)?
1660 +                                       TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
1661 +                               /* NOTE:  mishandles transfers >8K, some >4K */
1662 +                               td_fill (ohci, info, data, data_len, urb, cnt++);
1663 +                       }
1664 +                       info = usb_pipeout (urb->pipe)?
1665 +                               TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
1666 +                       td_fill (ohci, info, data, 0, urb, cnt++);
1667 +                       if (!ohci->sleeping) {
1668 +                               wmb();
1669 +                               writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
1670 +                               (void)readl (&ohci->regs->intrdisable); /* PCI posting flush */
1671 +                       }
1672 +                       break;
1673 +
1674 +               case PIPE_ISOCHRONOUS:
1675 +                       for (cnt = 0; cnt < urb->number_of_packets; cnt++) {
1676 +                               td_fill (ohci, TD_CC|TD_ISO | ((urb->start_frame + cnt) & 0xffff),
1677 +                                       data + urb->iso_frame_desc[cnt].offset,
1678 +                                       urb->iso_frame_desc[cnt].length, urb, cnt);
1679 +                       }
1680 +                       break;
1681 +       }
1682 +       if (urb_priv->length != cnt)
1683 +               dbg("TD LENGTH %d != CNT %d", urb_priv->length, cnt);
1684 +}
1685 +
1686 +/*-------------------------------------------------------------------------*
1687 + * Done List handling functions
1688 + *-------------------------------------------------------------------------*/
1689 +
1690 +
1691 +/* calculate the transfer length and update the urb */
1692 +
1693 +static void dl_transfer_length(td_t * td)
1694 +{
1695 +       __u32 tdINFO, tdBE, tdCBP;
1696 +       __u16 tdPSW;
1697 +       struct urb * urb = td->urb;
1698 +       urb_priv_t * urb_priv = urb->hcpriv;
1699 +       int dlen = 0;
1700 +       int cc = 0;
1701 +
1702 +       tdINFO = le32_to_cpup (&td->hwINFO);
1703 +       tdBE   = le32_to_cpup (&td->hwBE);
1704 +       tdCBP  = le32_to_cpup (&td->hwCBP);
1705 +
1706 +
1707 +       if (tdINFO & TD_ISO) {
1708 +               tdPSW = le16_to_cpu (td->hwPSW[0]);
1709 +               cc = (tdPSW >> 12) & 0xF;
1710 +               if (cc < 0xE)  {
1711 +                       if (usb_pipeout(urb->pipe)) {
1712 +                               dlen = urb->iso_frame_desc[td->index].length;
1713 +                       } else {
1714 +                               dlen = tdPSW & 0x3ff;
1715 +                       }
1716 +                       urb->actual_length += dlen;
1717 +                       urb->iso_frame_desc[td->index].actual_length = dlen;
1718 +                       if (!(urb->transfer_flags & USB_DISABLE_SPD) && (cc == TD_DATAUNDERRUN))
1719 +                               cc = TD_CC_NOERROR;
1720 +
1721 +                       urb->iso_frame_desc[td->index].status = cc_to_error[cc];
1722 +               }
1723 +       } else { /* BULK, INT, CONTROL DATA */
1724 +               if (!(usb_pipetype (urb->pipe) == PIPE_CONTROL &&
1725 +                               ((td->index == 0) || (td->index == urb_priv->length - 1)))) {
1726 +                       if (tdBE != 0) {
1727 +                               if (td->hwCBP == 0)
1728 +                                       urb->actual_length += tdBE - td->data_dma + 1;
1729 +                               else
1730 +                                       urb->actual_length += tdCBP - td->data_dma;
1731 +                       }
1732 +               }
1733 +       }
1734 +}
1735 +
1736 +/* handle an urb that is being unlinked */
1737 +
1738 +static void dl_del_urb (ohci_t *ohci, struct urb * urb)
1739 +{
1740 +       wait_queue_head_t * wait_head = ((urb_priv_t *)(urb->hcpriv))->wait;
1741 +
1742 +       urb_rm_priv_locked (urb);
1743 +
1744 +       if (urb->transfer_flags & USB_ASYNC_UNLINK) {
1745 +               urb->status = -ECONNRESET;
1746 +               ohci_complete_add(ohci, urb);
1747 +       } else {
1748 +               urb->status = -ENOENT;
1749 +
1750 +               /* unblock sohci_unlink_urb */
1751 +               if (wait_head)
1752 +                       wake_up (wait_head);
1753 +       }
1754 +}
1755 +
1756 +/*-------------------------------------------------------------------------*/
1757 +
1758 +/* replies to the request have to be on a FIFO basis so
1759 + * we reverse the reversed done-list */
1760 +
1761 +static td_t * dl_reverse_done_list (ohci_t * ohci)
1762 +{
1763 +       __u32 td_list_hc;
1764 +       td_t * td_rev = NULL;
1765 +       td_t * td_list = NULL;
1766 +       urb_priv_t * urb_priv = NULL;
1767 +
1768 +       td_list_hc = le32_to_cpup (&ohci->hcca->done_head) & 0xfffffff0;
1769 +       ohci->hcca->done_head = 0;
1770 +
1771 +       while (td_list_hc) {
1772 +               td_list = dma_to_td (ohci, td_list_hc);
1773 +
1774 +               if (TD_CC_GET (le32_to_cpup (&td_list->hwINFO))) {
1775 +                       urb_priv = (urb_priv_t *) td_list->urb->hcpriv;
1776 +                       dbg(" USB-error/status: %x : %p",
1777 +                                       TD_CC_GET (le32_to_cpup (&td_list->hwINFO)), td_list);
1778 +                       if (td_list->ed->hwHeadP & cpu_to_le32 (0x1)) {
1779 +                               if (urb_priv && ((td_list->index + 1) < urb_priv->length)) {
1780 +                                       td_list->ed->hwHeadP =
1781 +                                               (urb_priv->td[urb_priv->length - 1]->hwNextTD & cpu_to_le32 (0xfffffff0)) |
1782 +                                                                       (td_list->ed->hwHeadP & cpu_to_le32 (0x2));
1783 +                                       urb_priv->td_cnt += urb_priv->length - td_list->index - 1;
1784 +                               } else
1785 +                                       td_list->ed->hwHeadP &= cpu_to_le32 (0xfffffff2);
1786 +                       }
1787 +               }
1788 +
1789 +               td_list->next_dl_td = td_rev;
1790 +               td_rev = td_list;
1791 +               td_list_hc = le32_to_cpup (&td_list->hwNextTD) & 0xfffffff0;
1792 +       }
1793 +       return td_list;
1794 +}
1795 +
1796 +/*-------------------------------------------------------------------------*/
1797 +
1798 +/* there are some pending requests to remove
1799 + * - some of the eds (if ed->state & ED_DEL (set by sohci_free_dev)
1800 + * - some URBs/TDs if urb_priv->state == URB_DEL */
1801 +
1802 +static void dl_del_list (ohci_t  * ohci, unsigned int frame)
1803 +{
1804 +       ed_t * ed;
1805 +       __u32 edINFO;
1806 +       __u32 tdINFO;
1807 +       td_t * td = NULL, * td_next = NULL, * tdHeadP = NULL, * tdTailP;
1808 +       __u32 * td_p;
1809 +       int ctrl = 0, bulk = 0;
1810 +
1811 +       for (ed = ohci->ed_rm_list[frame]; ed != NULL; ed = ed->ed_rm_list) {
1812 +
1813 +               tdTailP = dma_to_td (ohci, le32_to_cpup (&ed->hwTailP) & 0xfffffff0);
1814 +               tdHeadP = dma_to_td (ohci, le32_to_cpup (&ed->hwHeadP) & 0xfffffff0);
1815 +               edINFO = le32_to_cpup (&ed->hwINFO);
1816 +               td_p = &ed->hwHeadP;
1817 +
1818 +               for (td = tdHeadP; td != tdTailP; td = td_next) {
1819 +                       struct urb * urb = td->urb;
1820 +                       urb_priv_t * urb_priv = td->urb->hcpriv;
1821 +
1822 +                       td_next = dma_to_td (ohci, le32_to_cpup (&td->hwNextTD) & 0xfffffff0);
1823 +                       if ((urb_priv->state == URB_DEL) || (ed->state & ED_DEL)) {
1824 +                               tdINFO = le32_to_cpup (&td->hwINFO);
1825 +                               if (TD_CC_GET (tdINFO) < 0xE)
1826 +                                       dl_transfer_length (td);
1827 +                               *td_p = td->hwNextTD | (*td_p & cpu_to_le32 (0x3));
1828 +
1829 +                               /* URB is done; clean up */
1830 +                               if (++(urb_priv->td_cnt) == urb_priv->length)
1831 +                                       dl_del_urb (ohci, urb);
1832 +                       } else {
1833 +                               td_p = &td->hwNextTD;
1834 +                       }
1835 +               }
1836 +
1837 +               if (ed->state & ED_DEL) { /* set by sohci_free_dev */
1838 +                       struct ohci_device * dev = usb_to_ohci (ohci->dev[edINFO & 0x7F]);
1839 +                       td_free (ohci, tdTailP); /* free dummy td */
1840 +                       ed->hwINFO = cpu_to_le32 (OHCI_ED_SKIP);
1841 +                       ed->state = ED_NEW;
1842 +                       hash_free_ed(ohci, ed);
1843 +                       /* if all eds are removed wake up sohci_free_dev */
1844 +                       if (!--dev->ed_cnt) {
1845 +                               wait_queue_head_t *wait_head = dev->wait;
1846 +
1847 +                               dev->wait = 0;
1848 +                               if (wait_head)
1849 +                                       wake_up (wait_head);
1850 +                       }
1851 +               } else {
1852 +                       ed->state &= ~ED_URB_DEL;
1853 +                       tdHeadP = dma_to_td (ohci, le32_to_cpup (&ed->hwHeadP) & 0xfffffff0);
1854 +
1855 +                       if (tdHeadP == tdTailP) {
1856 +                               if (ed->state == ED_OPER)
1857 +                                       ep_unlink(ohci, ed);
1858 +                       } else
1859 +                               ed->hwINFO &= ~cpu_to_le32 (OHCI_ED_SKIP);
1860 +               }
1861 +
1862 +               switch (ed->type) {
1863 +                       case PIPE_CONTROL:
1864 +                               ctrl = 1;
1865 +                               break;
1866 +                       case PIPE_BULK:
1867 +                               bulk = 1;
1868 +                               break;
1869 +               }
1870 +       }
1871 +
1872 +       /* maybe reenable control and bulk lists */
1873 +       if (!ohci->disabled) {
1874 +               if (ctrl)       /* reset control list */
1875 +                       writel (0, &ohci->regs->ed_controlcurrent);
1876 +               if (bulk)       /* reset bulk list */
1877 +                       writel (0, &ohci->regs->ed_bulkcurrent);
1878 +               if (!ohci->ed_rm_list[!frame] && !ohci->sleeping) {
1879 +                       if (ohci->ed_controltail)
1880 +                               ohci->hc_control |= OHCI_CTRL_CLE;
1881 +                       if (ohci->ed_bulktail)
1882 +                               ohci->hc_control |= OHCI_CTRL_BLE;
1883 +                       writel (ohci->hc_control, &ohci->regs->control);
1884 +               }
1885 +       }
1886 +
1887 +       ohci->ed_rm_list[frame] = NULL;
1888 +}
1889 +
1890 +
1891 +
1892 +/*-------------------------------------------------------------------------*/
1893 +
1894 +/* td done list */
1895 +
1896 +static void dl_done_list (ohci_t * ohci, td_t * td_list)
1897 +{
1898 +       td_t * td_list_next = NULL;
1899 +       ed_t * ed;
1900 +       int cc = 0;
1901 +       struct urb * urb;
1902 +       urb_priv_t * urb_priv;
1903 +       __u32 tdINFO, edHeadP, edTailP;
1904 +
1905 +       while (td_list) {
1906 +               td_list_next = td_list->next_dl_td;
1907 +
1908 +               urb = td_list->urb;
1909 +               urb_priv = urb->hcpriv;
1910 +               tdINFO = le32_to_cpup (&td_list->hwINFO);
1911 +
1912 +               ed = td_list->ed;
1913 +
1914 +               dl_transfer_length(td_list);
1915 +
1916 +               /* error code of transfer */
1917 +               cc = TD_CC_GET (tdINFO);
1918 +               if (cc == TD_CC_STALL)
1919 +                       usb_endpoint_halt(urb->dev,
1920 +                               usb_pipeendpoint(urb->pipe),
1921 +                               usb_pipeout(urb->pipe));
1922 +
1923 +               if (!(urb->transfer_flags & USB_DISABLE_SPD)
1924 +                               && (cc == TD_DATAUNDERRUN))
1925 +                       cc = TD_CC_NOERROR;
1926 +
1927 +               if (++(urb_priv->td_cnt) == urb_priv->length) {
1928 +                       if ((ed->state & (ED_OPER | ED_UNLINK))
1929 +                                       && (urb_priv->state != URB_DEL)) {
1930 +                               urb->status = cc_to_error[cc];
1931 +                               sohci_return_urb (ohci, urb);
1932 +                       } else {
1933 +                               dl_del_urb (ohci, urb);
1934 +                       }
1935 +               }
1936 +
1937 +               if (ed->state != ED_NEW) {
1938 +                       edHeadP = le32_to_cpup (&ed->hwHeadP) & 0xfffffff0;
1939 +                       edTailP = le32_to_cpup (&ed->hwTailP);
1940 +
1941 +                       /* unlink eds if they are not busy */
1942 +                       if ((edHeadP == edTailP) && (ed->state == ED_OPER))
1943 +                               ep_unlink (ohci, ed);
1944 +               }
1945 +
1946 +               td_list = td_list_next;
1947 +       }
1948 +}
1949 +
1950 +
1951 +
1952 +
1953 +/*-------------------------------------------------------------------------*
1954 + * Virtual Root Hub
1955 + *-------------------------------------------------------------------------*/
1956 +
1957 +/* Device descriptor */
1958 +static __u8 root_hub_dev_des[] =
1959 +{
1960 +       0x12,       /*  __u8  bLength; */
1961 +       0x01,       /*  __u8  bDescriptorType; Device */
1962 +       0x10,       /*  __u16 bcdUSB; v1.1 */
1963 +       0x01,
1964 +       0x09,       /*  __u8  bDeviceClass; HUB_CLASSCODE */
1965 +       0x00,       /*  __u8  bDeviceSubClass; */
1966 +       0x00,       /*  __u8  bDeviceProtocol; */
1967 +       0x08,       /*  __u8  bMaxPacketSize0; 8 Bytes */
1968 +       0x00,       /*  __u16 idVendor; */
1969 +       0x00,
1970 +       0x00,       /*  __u16 idProduct; */
1971 +       0x00,
1972 +       0x00,       /*  __u16 bcdDevice; */
1973 +       0x00,
1974 +       0x00,       /*  __u8  iManufacturer; */
1975 +       0x02,       /*  __u8  iProduct; */
1976 +       0x01,       /*  __u8  iSerialNumber; */
1977 +       0x01        /*  __u8  bNumConfigurations; */
1978 +};
1979 +
1980 +
1981 +/* Configuration descriptor */
1982 +static __u8 root_hub_config_des[] =
1983 +{
1984 +       0x09,       /*  __u8  bLength; */
1985 +       0x02,       /*  __u8  bDescriptorType; Configuration */
1986 +       0x19,       /*  __u16 wTotalLength; */
1987 +       0x00,
1988 +       0x01,       /*  __u8  bNumInterfaces; */
1989 +       0x01,       /*  __u8  bConfigurationValue; */
1990 +       0x00,       /*  __u8  iConfiguration; */
1991 +       0x40,       /*  __u8  bmAttributes;
1992 +                 Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
1993 +       0x00,       /*  __u8  MaxPower; */
1994 +
1995 +       /* interface */
1996 +       0x09,       /*  __u8  if_bLength; */
1997 +       0x04,       /*  __u8  if_bDescriptorType; Interface */
1998 +       0x00,       /*  __u8  if_bInterfaceNumber; */
1999 +       0x00,       /*  __u8  if_bAlternateSetting; */
2000 +       0x01,       /*  __u8  if_bNumEndpoints; */
2001 +       0x09,       /*  __u8  if_bInterfaceClass; HUB_CLASSCODE */
2002 +       0x00,       /*  __u8  if_bInterfaceSubClass; */
2003 +       0x00,       /*  __u8  if_bInterfaceProtocol; */
2004 +       0x00,       /*  __u8  if_iInterface; */
2005 +
2006 +       /* endpoint */
2007 +       0x07,       /*  __u8  ep_bLength; */
2008 +       0x05,       /*  __u8  ep_bDescriptorType; Endpoint */
2009 +       0x81,       /*  __u8  ep_bEndpointAddress; IN Endpoint 1 */
2010 +       0x03,       /*  __u8  ep_bmAttributes; Interrupt */
2011 +       0x02,       /*  __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
2012 +       0x00,
2013 +       0xff        /*  __u8  ep_bInterval; 255 ms */
2014 +};
2015 +
2016 +/* Hub class-specific descriptor is constructed dynamically */
2017 +
2018 +
2019 +/*-------------------------------------------------------------------------*/
2020 +
2021 +/* prepare Interrupt pipe data; HUB INTERRUPT ENDPOINT */
2022 +
2023 +static int rh_send_irq (ohci_t * ohci, void * rh_data, int rh_len)
2024 +{
2025 +       int num_ports;
2026 +       int i;
2027 +       int ret;
2028 +       int len;
2029 +
2030 +       __u8 data[8];
2031 +
2032 +       num_ports = roothub_a (ohci) & RH_A_NDP;
2033 +       if (num_ports > MAX_ROOT_PORTS) {
2034 +               err ("bogus NDP=%d for OHCI usb-%s", num_ports,
2035 +                       ohci->ohci_dev->slot_name);
2036 +               err ("rereads as NDP=%d",
2037 +                       readl (&ohci->regs->roothub.a) & RH_A_NDP);
2038 +               /* retry later; "should not happen" */
2039 +               return 0;
2040 +       }
2041 +       *(__u8 *) data = (roothub_status (ohci) & (RH_HS_LPSC | RH_HS_OCIC))
2042 +               ? 1: 0;
2043 +       ret = *(__u8 *) data;
2044 +
2045 +       for ( i = 0; i < num_ports; i++) {
2046 +               *(__u8 *) (data + (i + 1) / 8) |=
2047 +                       ((roothub_portstatus (ohci, i) &
2048 +                               (RH_PS_CSC | RH_PS_PESC | RH_PS_PSSC | RH_PS_OCIC | RH_PS_PRSC))
2049 +                           ? 1: 0) << ((i + 1) % 8);
2050 +               ret += *(__u8 *) (data + (i + 1) / 8);
2051 +       }
2052 +       len = i/8 + 1;
2053 +
2054 +       if (ret > 0) {
2055 +               memcpy(rh_data, data,
2056 +                      min_t(unsigned int, len,
2057 +                          min_t(unsigned int, rh_len, sizeof(data))));
2058 +               return len;
2059 +       }
2060 +       return 0;
2061 +}
2062 +
2063 +/*-------------------------------------------------------------------------*/
2064 +
2065 +/* Virtual Root Hub INTs are polled by this timer every "interval" ms */
2066 +
2067 +static void rh_int_timer_do (unsigned long ptr)
2068 +{
2069 +       int len;
2070 +
2071 +       struct urb * urb = (struct urb *) ptr;
2072 +       ohci_t * ohci = urb->dev->bus->hcpriv;
2073 +
2074 +       if (ohci->disabled)
2075 +               return;
2076 +
2077 +       /* ignore timers firing during PM suspend, etc */
2078 +       if ((ohci->hc_control & OHCI_CTRL_HCFS) != OHCI_USB_OPER)
2079 +               goto out;
2080 +
2081 +       if(ohci->rh.send) {
2082 +               len = rh_send_irq (ohci, urb->transfer_buffer, urb->transfer_buffer_length);
2083 +               if (len > 0) {
2084 +                       urb->actual_length = len;
2085 +#ifdef DEBUG
2086 +                       urb_print (urb, "RET-t(rh)", usb_pipeout (urb->pipe));
2087 +#endif
2088 +                       if (urb->complete)
2089 +                               urb->complete (urb);
2090 +               }
2091 +       }
2092 + out:
2093 +       rh_init_int_timer (urb);
2094 +}
2095 +
2096 +/*-------------------------------------------------------------------------*/
2097 +
2098 +/* Root Hub INTs are polled by this timer */
2099 +
2100 +static int rh_init_int_timer (struct urb * urb)
2101 +{
2102 +       ohci_t * ohci = urb->dev->bus->hcpriv;
2103 +
2104 +       ohci->rh.interval = urb->interval;
2105 +       init_timer (&ohci->rh.rh_int_timer);
2106 +       ohci->rh.rh_int_timer.function = rh_int_timer_do;
2107 +       ohci->rh.rh_int_timer.data = (unsigned long) urb;
2108 +       ohci->rh.rh_int_timer.expires =
2109 +                       jiffies + (HZ * (urb->interval < 30? 30: urb->interval)) / 1000;
2110 +       add_timer (&ohci->rh.rh_int_timer);
2111 +
2112 +       return 0;
2113 +}
2114 +
2115 +/*-------------------------------------------------------------------------*/
2116 +
2117 +#define OK(x)                  len = (x); break
2118 +#define WR_RH_STAT(x)          writel((x), &ohci->regs->roothub.status)
2119 +#define WR_RH_PORTSTAT(x)      writel((x), &ohci->regs->roothub.portstatus[wIndex-1])
2120 +#define RD_RH_STAT             roothub_status(ohci)
2121 +#define RD_RH_PORTSTAT         roothub_portstatus(ohci,wIndex-1)
2122 +
2123 +/* request to virtual root hub */
2124 +
2125 +static int rh_submit_urb (struct urb * urb)
2126 +{
2127 +       struct usb_device * usb_dev = urb->dev;
2128 +       ohci_t * ohci = usb_dev->bus->hcpriv;
2129 +       unsigned int pipe = urb->pipe;
2130 +       struct usb_ctrlrequest * cmd = (struct usb_ctrlrequest *) urb->setup_packet;
2131 +       void * data = urb->transfer_buffer;
2132 +       int leni = urb->transfer_buffer_length;
2133 +       int len = 0;
2134 +       int status = TD_CC_NOERROR;
2135 +       unsigned long flags;
2136 +
2137 +       __u32 datab[4];
2138 +       __u8  * data_buf = (__u8 *) datab;
2139 +
2140 +       __u16 bmRType_bReq;
2141 +       __u16 wValue;
2142 +       __u16 wIndex;
2143 +       __u16 wLength;
2144 +
2145 +       spin_lock_irqsave(&ohci->ohci_lock, flags);
2146 +
2147 +       if (usb_pipeint(pipe)) {
2148 +               ohci->rh.urb =  urb;
2149 +               ohci->rh.send = 1;
2150 +               ohci->rh.interval = urb->interval;
2151 +               rh_init_int_timer(urb);
2152 +               urb->status = cc_to_error [TD_CC_NOERROR];
2153 +
2154 +               spin_unlock_irqrestore(&ohci->ohci_lock, flags);
2155 +               return 0;
2156 +       }
2157 +
2158 +       bmRType_bReq  = cmd->bRequestType | (cmd->bRequest << 8);
2159 +       wValue        = le16_to_cpu (cmd->wValue);
2160 +       wIndex        = le16_to_cpu (cmd->wIndex);
2161 +       wLength       = le16_to_cpu (cmd->wLength);
2162 +
2163 +       switch (bmRType_bReq) {
2164 +       /* Request Destination:
2165 +          without flags: Device,
2166 +          RH_INTERFACE: interface,
2167 +          RH_ENDPOINT: endpoint,
2168 +          RH_CLASS means HUB here,
2169 +          RH_OTHER | RH_CLASS  almost ever means HUB_PORT here
2170 +       */
2171 +
2172 +               case RH_GET_STATUS:
2173 +                               *(__u16 *) data_buf = cpu_to_le16 (1); OK (2);
2174 +               case RH_GET_STATUS | RH_INTERFACE:
2175 +                               *(__u16 *) data_buf = cpu_to_le16 (0); OK (2);
2176 +               case RH_GET_STATUS | RH_ENDPOINT:
2177 +                               *(__u16 *) data_buf = cpu_to_le16 (0); OK (2);
2178 +               case RH_GET_STATUS | RH_CLASS:
2179 +                               *(__u32 *) data_buf = cpu_to_le32 (
2180 +                                       RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
2181 +                               OK (4);
2182 +               case RH_GET_STATUS | RH_OTHER | RH_CLASS:
2183 +                               *(__u32 *) data_buf = cpu_to_le32 (RD_RH_PORTSTAT); OK (4);
2184 +
2185 +               case RH_CLEAR_FEATURE | RH_ENDPOINT:
2186 +                       switch (wValue) {
2187 +                               case (RH_ENDPOINT_STALL): OK (0);
2188 +                       }
2189 +                       break;
2190 +
2191 +               case RH_CLEAR_FEATURE | RH_CLASS:
2192 +                       switch (wValue) {
2193 +                               case RH_C_HUB_LOCAL_POWER:
2194 +                                       OK(0);
2195 +                               case (RH_C_HUB_OVER_CURRENT):
2196 +                                               WR_RH_STAT(RH_HS_OCIC); OK (0);
2197 +                       }
2198 +                       break;
2199 +
2200 +               case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
2201 +                       switch (wValue) {
2202 +                               case (RH_PORT_ENABLE):
2203 +                                               WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
2204 +                               case (RH_PORT_SUSPEND):
2205 +                                               WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
2206 +                               case (RH_PORT_POWER):
2207 +                                               WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
2208 +                               case (RH_C_PORT_CONNECTION):
2209 +                                               WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
2210 +                               case (RH_C_PORT_ENABLE):
2211 +                                               WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
2212 +                               case (RH_C_PORT_SUSPEND):
2213 +                                               WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
2214 +                               case (RH_C_PORT_OVER_CURRENT):
2215 +                                               WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
2216 +                               case (RH_C_PORT_RESET):
2217 +                                               WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
2218 +                       }
2219 +                       break;
2220 +
2221 +               case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
2222 +                       switch (wValue) {
2223 +                               case (RH_PORT_SUSPEND):
2224 +                                               WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
2225 +                               case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
2226 +                                               if (RD_RH_PORTSTAT & RH_PS_CCS)
2227 +                                                   WR_RH_PORTSTAT (RH_PS_PRS);
2228 +                                               OK (0);
2229 +                               case (RH_PORT_POWER):
2230 +                                               WR_RH_PORTSTAT (RH_PS_PPS ); OK (0);
2231 +                               case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
2232 +                                               if (RD_RH_PORTSTAT & RH_PS_CCS)
2233 +                                                   WR_RH_PORTSTAT (RH_PS_PES );
2234 +                                               OK (0);
2235 +                       }
2236 +                       break;
2237 +
2238 +               case RH_SET_ADDRESS: ohci->rh.devnum = wValue; OK(0);
2239 +
2240 +               case RH_GET_DESCRIPTOR:
2241 +                       switch ((wValue & 0xff00) >> 8) {
2242 +                               case (0x01): /* device descriptor */
2243 +                                       len = min_t(unsigned int,
2244 +                                                 leni,
2245 +                                                 min_t(unsigned int,
2246 +                                                     sizeof (root_hub_dev_des),
2247 +                                                     wLength));
2248 +                                       data_buf = root_hub_dev_des; OK(len);
2249 +                               case (0x02): /* configuration descriptor */
2250 +                                       len = min_t(unsigned int,
2251 +                                                 leni,
2252 +                                                 min_t(unsigned int,
2253 +                                                     sizeof (root_hub_config_des),
2254 +                                                     wLength));
2255 +                                       data_buf = root_hub_config_des; OK(len);
2256 +                               case (0x03): /* string descriptors */
2257 +                                       len = usb_root_hub_string (wValue & 0xff,
2258 +                                               (int)(long) ohci->regs, "OHCI",
2259 +                                               data, wLength);
2260 +                                       if (len > 0) {
2261 +                                               data_buf = data;
2262 +                                               OK(min_t(int, leni, len));
2263 +                                       }
2264 +                                       // else fallthrough
2265 +                               default:
2266 +                                       status = TD_CC_STALL;
2267 +                       }
2268 +                       break;
2269 +
2270 +               case RH_GET_DESCRIPTOR | RH_CLASS:
2271 +                   {
2272 +                           __u32 temp = roothub_a (ohci);
2273 +
2274 +                           data_buf [0] = 9;           // min length;
2275 +                           data_buf [1] = 0x29;
2276 +                           data_buf [2] = temp & RH_A_NDP;
2277 +                           data_buf [3] = 0;
2278 +                           if (temp & RH_A_PSM)        /* per-port power switching? */
2279 +                               data_buf [3] |= 0x1;
2280 +                           if (temp & RH_A_NOCP)       /* no overcurrent reporting? */
2281 +                               data_buf [3] |= 0x10;
2282 +                           else if (temp & RH_A_OCPM)  /* per-port overcurrent reporting? */
2283 +                               data_buf [3] |= 0x8;
2284 +
2285 +                           datab [1] = 0;
2286 +                           data_buf [5] = (temp & RH_A_POTPGT) >> 24;
2287 +                           temp = roothub_b (ohci);
2288 +                           data_buf [7] = temp & RH_B_DR;
2289 +                           if (data_buf [2] < 7) {
2290 +                               data_buf [8] = 0xff;
2291 +                           } else {
2292 +                               data_buf [0] += 2;
2293 +                               data_buf [8] = (temp & RH_B_DR) >> 8;
2294 +                               data_buf [10] = data_buf [9] = 0xff;
2295 +                           }
2296 +
2297 +                           len = min_t(unsigned int, leni,
2298 +                                     min_t(unsigned int, data_buf [0], wLength));
2299 +                           OK (len);
2300 +                       }
2301 +
2302 +               case RH_GET_CONFIGURATION:      *(__u8 *) data_buf = 0x01; OK (1);
2303 +
2304 +               case RH_SET_CONFIGURATION:      WR_RH_STAT (0x10000); OK (0);
2305 +
2306 +               default:
2307 +                       dbg ("unsupported root hub command");
2308 +                       status = TD_CC_STALL;
2309 +       }
2310 +
2311 +#ifdef DEBUG
2312 +       // ohci_dump_roothub (ohci, 0);
2313 +#endif
2314 +
2315 +       len = min_t(int, len, leni);
2316 +       if (data != data_buf)
2317 +           memcpy (data, data_buf, len);
2318 +       urb->actual_length = len;
2319 +       urb->status = cc_to_error [status];
2320 +
2321 +#ifdef DEBUG
2322 +       urb_print (urb, "RET(rh)", usb_pipeout (urb->pipe));
2323 +#endif
2324 +
2325 +       urb->hcpriv = NULL;
2326 +       spin_unlock_irqrestore(&ohci->ohci_lock, flags);
2327 +       usb_dec_dev_use (usb_dev);
2328 +       urb->dev = NULL;
2329 +       if (urb->complete)
2330 +               urb->complete (urb);
2331 +       return 0;
2332 +}
2333 +
2334 +/*-------------------------------------------------------------------------*/
2335 +
2336 +static int rh_unlink_urb (struct urb * urb)
2337 +{
2338 +       ohci_t * ohci = urb->dev->bus->hcpriv;
2339 +       unsigned int flags;
2340 +
2341 +       spin_lock_irqsave(&ohci->ohci_lock, flags);
2342 +       if (ohci->rh.urb == urb) {
2343 +               ohci->rh.send = 0;
2344 +               del_timer (&ohci->rh.rh_int_timer);
2345 +               ohci->rh.urb = NULL;
2346 +
2347 +               urb->hcpriv = NULL;
2348 +               spin_unlock_irqrestore(&ohci->ohci_lock, flags);
2349 +               usb_dec_dev_use(urb->dev);
2350 +               urb->dev = NULL;
2351 +               if (urb->transfer_flags & USB_ASYNC_UNLINK) {
2352 +                       urb->status = -ECONNRESET;
2353 +                       if (urb->complete)
2354 +                               urb->complete (urb);
2355 +               } else
2356 +                       urb->status = -ENOENT;
2357 +       } else {
2358 +               spin_unlock_irqrestore(&ohci->ohci_lock, flags);
2359 +       }
2360 +       return 0;
2361 +}
2362 +
2363 +/*-------------------------------------------------------------------------*
2364 + * HC functions
2365 + *-------------------------------------------------------------------------*/
2366 +
2367 +/* reset the HC and BUS */
2368 +
2369 +static int hc_reset (ohci_t * ohci)
2370 +{
2371 +       int timeout = 30;
2372 +       int smm_timeout = 50; /* 0,5 sec */
2373 +
2374 +#ifndef __hppa__
2375 +       /* PA-RISC doesn't have SMM, but PDC might leave IR set */
2376 +       if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
2377 +               writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
2378 +               dbg("USB HC TakeOver from SMM");
2379 +               while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
2380 +                       wait_ms (10);
2381 +                       if (--smm_timeout == 0) {
2382 +                               err("USB HC TakeOver failed!");
2383 +                               return -1;
2384 +                       }
2385 +               }
2386 +       }
2387 +#endif
2388 +
2389 +       /* Disable HC interrupts */
2390 +       writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
2391 +
2392 +       dbg("USB HC reset_hc usb-%s: ctrl = 0x%x ;",
2393 +               ohci->ohci_dev->slot_name,
2394 +               readl (&ohci->regs->control));
2395 +
2396 +       /* Reset USB (needed by some controllers) */
2397 +       writel (0, &ohci->regs->control);
2398 +
2399 +       /* Force a state change from USBRESET to USBOPERATIONAL for ALi */
2400 +       (void) readl (&ohci->regs->control);    /* PCI posting */
2401 +       writel (ohci->hc_control = OHCI_USB_OPER, &ohci->regs->control);
2402 +
2403 +       /* HC Reset requires max 10 ms delay */
2404 +       writel (OHCI_HCR,  &ohci->regs->cmdstatus);
2405 +       while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
2406 +               if (--timeout == 0) {
2407 +                       err("USB HC reset timed out!");
2408 +                       return -1;
2409 +               }
2410 +               udelay (1);
2411 +       }
2412 +       return 0;
2413 +}
2414 +
2415 +/*-------------------------------------------------------------------------*/
2416 +
2417 +/* Start an OHCI controller, set the BUS operational
2418 + * enable interrupts
2419 + * connect the virtual root hub */
2420 +
2421 +static int hc_start (ohci_t * ohci)
2422 +{
2423 +       __u32 mask;
2424 +       unsigned int fminterval;
2425 +       struct usb_device  * usb_dev;
2426 +       struct ohci_device * dev;
2427 +
2428 +       ohci->disabled = 1;
2429 +
2430 +       /* Tell the controller where the control and bulk lists are
2431 +        * The lists are empty now. */
2432 +
2433 +       writel (0, &ohci->regs->ed_controlhead);
2434 +       writel (0, &ohci->regs->ed_bulkhead);
2435 +
2436 +       writel (ohci->hcca_dma, &ohci->regs->hcca); /* a reset clears this */
2437 +
2438 +       fminterval = 0x2edf;
2439 +       writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
2440 +       fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
2441 +       writel (fminterval, &ohci->regs->fminterval);
2442 +       writel (0x628, &ohci->regs->lsthresh);
2443 +
2444 +       /* start controller operations */
2445 +       ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
2446 +       ohci->disabled = 0;
2447 +       writel (ohci->hc_control, &ohci->regs->control);
2448 +
2449 +       /* Choose the interrupts we care about now, others later on demand */
2450 +       mask = OHCI_INTR_MIE | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
2451 +       writel (mask, &ohci->regs->intrenable);
2452 +       writel (mask, &ohci->regs->intrstatus);
2453 +
2454 +#ifdef OHCI_USE_NPS
2455 +       if(ohci->flags & OHCI_QUIRK_SUCKYIO)
2456 +       {
2457 +               /* NSC 87560 at least requires different setup .. */
2458 +               writel ((roothub_a (ohci) | RH_A_NOCP) &
2459 +                       ~(RH_A_OCPM | RH_A_POTPGT | RH_A_PSM | RH_A_NPS),
2460 +                       &ohci->regs->roothub.a);
2461 +       }
2462 +       else
2463 +       {
2464 +               /* required for AMD-756 and some Mac platforms */
2465 +               writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
2466 +                       &ohci->regs->roothub.a);
2467 +       }
2468 +       writel (RH_HS_LPSC, &ohci->regs->roothub.status);
2469 +#endif /* OHCI_USE_NPS */
2470 +
2471 +       (void)readl (&ohci->regs->intrdisable); /* PCI posting flush */
2472 +
2473 +       // POTPGT delay is bits 24-31, in 2 ms units.
2474 +       mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
2475 +
2476 +       /* connect the virtual root hub */
2477 +       ohci->rh.devnum = 0;
2478 +       usb_dev = usb_alloc_dev (NULL, ohci->bus);
2479 +       if (!usb_dev) {
2480 +           ohci->disabled = 1;
2481 +           return -ENOMEM;
2482 +       }
2483 +
2484 +       dev = usb_to_ohci (usb_dev);
2485 +       ohci->bus->root_hub = usb_dev;
2486 +       usb_connect (usb_dev);
2487 +       if (usb_new_device (usb_dev) != 0) {
2488 +               usb_free_dev (usb_dev);
2489 +               ohci->disabled = 1;
2490 +               return -ENODEV;
2491 +       }
2492 +
2493 +       return 0;
2494 +}
2495 +
2496 +/*-------------------------------------------------------------------------*/
2497 +
2498 +/* called only from interrupt handler */
2499 +
2500 +static void check_timeouts (struct ohci *ohci)
2501 +{
2502 +       spin_lock (&ohci->ohci_lock);
2503 +       while (!list_empty (&ohci->timeout_list)) {
2504 +               struct urb      *urb;
2505 +
2506 +               urb = list_entry (ohci->timeout_list.next, struct urb, urb_list);
2507 +               if (time_after (jiffies, urb->timeout))
2508 +                       break;
2509 +
2510 +               list_del_init (&urb->urb_list);
2511 +               if (urb->status != -EINPROGRESS)
2512 +                       continue;
2513 +
2514 +               urb->transfer_flags |= USB_TIMEOUT_KILLED | USB_ASYNC_UNLINK;
2515 +               spin_unlock (&ohci->ohci_lock);
2516 +
2517 +               // outside the interrupt handler (in a timer...)
2518 +               // this reference would race interrupts
2519 +               sohci_unlink_urb (urb);
2520 +
2521 +               spin_lock (&ohci->ohci_lock);
2522 +       }
2523 +       spin_unlock (&ohci->ohci_lock);
2524 +}
2525 +
2526 +
2527 +/*-------------------------------------------------------------------------*/
2528 +
2529 +/* an interrupt happens */
2530 +
2531 +static void hc_interrupt (int irq, void * __ohci, struct pt_regs * r)
2532 +{
2533 +       ohci_t * ohci = __ohci;
2534 +       struct ohci_regs * regs = ohci->regs;
2535 +       int ints;
2536 +
2537 +       spin_lock (&ohci->ohci_lock);
2538 +
2539 +       /* avoid (slow) readl if only WDH happened */
2540 +       if ((ohci->hcca->done_head != 0)
2541 +                       && !(le32_to_cpup (&ohci->hcca->done_head) & 0x01)) {
2542 +               ints =  OHCI_INTR_WDH;
2543 +
2544 +       /* cardbus/... hardware gone before remove() */
2545 +       } else if ((ints = readl (&regs->intrstatus)) == ~(u32)0) {
2546 +               ohci->disabled++;
2547 +               spin_unlock (&ohci->ohci_lock);
2548 +               err ("%s device removed!", ohci->ohci_dev->slot_name);
2549 +               return;
2550 +
2551 +       /* interrupt for some other device? */
2552 +       } else if ((ints &= readl (&regs->intrenable)) == 0) {
2553 +               spin_unlock (&ohci->ohci_lock);
2554 +               return;
2555 +       }
2556 +
2557 +       // dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no));
2558 +
2559 +       if (ints & OHCI_INTR_UE) {
2560 +               ohci->disabled++;
2561 +               err ("OHCI Unrecoverable Error, controller usb-%s disabled",
2562 +                       ohci->ohci_dev->slot_name);
2563 +               // e.g. due to PCI Master/Target Abort
2564 +
2565 +#ifdef DEBUG
2566 +               ohci_dump (ohci, 1);
2567 +#else
2568 +               // FIXME: be optimistic, hope that bug won't repeat often.
2569 +               // Make some non-interrupt context restart the controller.
2570 +               // Count and limit the retries though; either hardware or
2571 +               // software errors can go forever...
2572 +#endif
2573 +               hc_reset (ohci);
2574 +       }
2575 +
2576 +       if (ints & OHCI_INTR_WDH) {
2577 +               writel (OHCI_INTR_WDH, &regs->intrdisable);
2578 +               (void)readl (&regs->intrdisable); /* PCI posting flush */
2579 +               dl_done_list (ohci, dl_reverse_done_list (ohci));
2580 +               writel (OHCI_INTR_WDH, &regs->intrenable);
2581 +               (void)readl (&regs->intrdisable); /* PCI posting flush */
2582 +       }
2583 +
2584 +       if (ints & OHCI_INTR_SO) {
2585 +               dbg("USB Schedule overrun");
2586 +               writel (OHCI_INTR_SO, &regs->intrenable);
2587 +               (void)readl (&regs->intrdisable); /* PCI posting flush */
2588 +       }
2589 +
2590 +       // FIXME:  this assumes SOF (1/ms) interrupts don't get lost...
2591 +       if (ints & OHCI_INTR_SF) {
2592 +               unsigned int frame = le16_to_cpu (ohci->hcca->frame_no) & 1;
2593 +               writel (OHCI_INTR_SF, &regs->intrdisable);
2594 +               (void)readl (&regs->intrdisable); /* PCI posting flush */
2595 +               if (ohci->ed_rm_list[!frame] != NULL) {
2596 +                       dl_del_list (ohci, !frame);
2597 +               }
2598 +               if (ohci->ed_rm_list[frame] != NULL) {
2599 +                       writel (OHCI_INTR_SF, &regs->intrenable);
2600 +                       (void)readl (&regs->intrdisable); /* PCI posting flush */
2601 +               }
2602 +       }
2603 +
2604 +       /*
2605 +        * Finally, we are done with trashing about our hardware lists
2606 +        * and other CPUs are allowed in. The festive flipping of the lock
2607 +        * ensues as we struggle with the check_timeouts disaster.
2608 +        */
2609 +       spin_unlock (&ohci->ohci_lock);
2610 +
2611 +       if (!list_empty (&ohci->timeout_list)) {
2612 +               check_timeouts (ohci);
2613 +// FIXME:  enable SF as needed in a timer;
2614 +// don't make lots of 1ms interrupts
2615 +// On unloaded USB, think 4k ~= 4-5msec
2616 +               if (!list_empty (&ohci->timeout_list))
2617 +                       writel (OHCI_INTR_SF, &regs->intrenable);
2618 +       }
2619 +
2620 +       writel (ints, &regs->intrstatus);
2621 +       writel (OHCI_INTR_MIE, &regs->intrenable);
2622 +       (void)readl (&regs->intrdisable); /* PCI posting flush */
2623 +
2624 +       ohci_complete(ohci);
2625 +}
2626 +
2627 +/*-------------------------------------------------------------------------*/
2628 +
2629 +/* allocate OHCI */
2630 +
2631 +static ohci_t * __devinit hc_alloc_ohci (struct pci_dev *dev, void * mem_base)
2632 +{
2633 +       ohci_t * ohci;
2634 +
2635 +       ohci = (ohci_t *) kmalloc (sizeof *ohci, GFP_KERNEL);
2636 +       if (!ohci)
2637 +               return NULL;
2638 +
2639 +       memset (ohci, 0, sizeof (ohci_t));
2640 +
2641 +       ohci->hcca = pci_alloc_consistent (dev, sizeof *ohci->hcca,
2642 +                       &ohci->hcca_dma);
2643 +        if (!ohci->hcca) {
2644 +                kfree (ohci);
2645 +                return NULL;
2646 +        }
2647 +        memset (ohci->hcca, 0, sizeof (struct ohci_hcca));
2648 +
2649 +       ohci->disabled = 1;
2650 +       ohci->sleeping = 0;
2651 +       ohci->irq = -1;
2652 +       ohci->regs = mem_base;
2653 +
2654 +       ohci->ohci_dev = dev;
2655 +       pci_set_drvdata(dev, ohci);
2656 +
2657 +       INIT_LIST_HEAD (&ohci->timeout_list);
2658 +       spin_lock_init(&ohci->ohci_lock);
2659 +
2660 +       ohci->bus = usb_alloc_bus (&sohci_device_operations);
2661 +       if (!ohci->bus) {
2662 +               pci_set_drvdata (dev, NULL);
2663 +               pci_free_consistent (ohci->ohci_dev, sizeof *ohci->hcca,
2664 +                               ohci->hcca, ohci->hcca_dma);
2665 +               kfree (ohci);
2666 +               return NULL;
2667 +       }
2668 +       ohci->bus->bus_name = dev->slot_name;
2669 +       ohci->bus->hcpriv = (void *) ohci;
2670 +
2671 +       return ohci;
2672 +}
2673 +
2674 +
2675 +/*-------------------------------------------------------------------------*/
2676 +
2677 +/* De-allocate all resources.. */
2678 +
2679 +static void hc_release_ohci (ohci_t * ohci)
2680 +{
2681 +       dbg ("USB HC release ohci usb-%s", ohci->ohci_dev->slot_name);
2682 +
2683 +       /* disconnect all devices */
2684 +       if (ohci->bus->root_hub)
2685 +               usb_disconnect (&ohci->bus->root_hub);
2686 +
2687 +       if (!ohci->disabled)
2688 +               hc_reset (ohci);
2689 +
2690 +       if (ohci->irq >= 0) {
2691 +               free_irq (ohci->irq, ohci);
2692 +               ohci->irq = -1;
2693 +       }
2694 +       pci_set_drvdata(ohci->ohci_dev, NULL);
2695 +       if (ohci->bus) {
2696 +               if (ohci->bus->busnum != -1)
2697 +                       usb_deregister_bus (ohci->bus);
2698 +
2699 +               usb_free_bus (ohci->bus);
2700 +       }
2701 +
2702 +       ohci_mem_cleanup (ohci);
2703 +
2704 +       /* unmap the IO address space */
2705 +       iounmap (ohci->regs);
2706 +
2707 +       pci_free_consistent (ohci->ohci_dev, sizeof *ohci->hcca,
2708 +               ohci->hcca, ohci->hcca_dma);
2709 +       kfree (ohci);
2710 +}
2711 +
2712 +/*-------------------------------------------------------------------------*/
2713 +
2714 +/* Increment the module usage count, start the control thread and
2715 + * return success. */
2716 +
2717 +static struct pci_driver ohci_pci_driver;
2718 +
2719 +static int __devinit
2720 +hc_found_ohci (struct pci_dev *dev, int irq,
2721 +       void *mem_base, const struct pci_device_id *id)
2722 +{
2723 +       ohci_t * ohci;
2724 +       char buf[8], *bufp = buf;
2725 +       int ret;
2726 +
2727 +#ifndef __sparc__
2728 +       sprintf(buf, "%d", irq);
2729 +#else
2730 +       bufp = __irq_itoa(irq);
2731 +#endif
2732 +       printk(KERN_INFO __FILE__ ": USB OHCI at membase 0x%lx, IRQ %s\n",
2733 +               (unsigned long) mem_base, bufp);
2734 +       printk(KERN_INFO __FILE__ ": usb-%s, %s\n", dev->slot_name, dev->name);
2735 +
2736 +       ohci = hc_alloc_ohci (dev, mem_base);
2737 +       if (!ohci) {
2738 +               return -ENOMEM;
2739 +       }
2740 +       if ((ret = ohci_mem_init (ohci)) < 0) {
2741 +               hc_release_ohci (ohci);
2742 +               return ret;
2743 +       }
2744 +       ohci->flags = id->driver_data;
2745 +
2746 +       /* Check for NSC87560. We have to look at the bridge (fn1) to identify
2747 +          the USB (fn2). This quirk might apply to more or even all NSC stuff
2748 +          I don't know.. */
2749 +
2750 +       if(dev->vendor == PCI_VENDOR_ID_NS)
2751 +       {
2752 +               struct pci_dev *fn1  = pci_find_slot(dev->bus->number, PCI_DEVFN(PCI_SLOT(dev->devfn), 1));
2753 +               if(fn1 && fn1->vendor == PCI_VENDOR_ID_NS && fn1->device == PCI_DEVICE_ID_NS_87560_LIO)
2754 +                       ohci->flags |= OHCI_QUIRK_SUCKYIO;
2755 +
2756 +       }
2757 +
2758 +       if (ohci->flags & OHCI_QUIRK_SUCKYIO)
2759 +               printk (KERN_INFO __FILE__ ": Using NSC SuperIO setup\n");
2760 +       if (ohci->flags & OHCI_QUIRK_AMD756)
2761 +               printk (KERN_INFO __FILE__ ": AMD756 erratum 4 workaround\n");
2762 +
2763 +       if (hc_reset (ohci) < 0) {
2764 +               hc_release_ohci (ohci);
2765 +               return -ENODEV;
2766 +       }
2767 +
2768 +       /* FIXME this is a second HC reset; why?? */
2769 +       writel (ohci->hc_control = OHCI_USB_RESET, &ohci->regs->control);
2770 +       (void)readl (&ohci->regs->intrdisable); /* PCI posting flush */
2771 +       wait_ms (10);
2772 +
2773 +       usb_register_bus (ohci->bus);
2774 +
2775 +       if (request_irq (irq, hc_interrupt, SA_SHIRQ,
2776 +                       ohci_pci_driver.name, ohci) != 0) {
2777 +               err ("request interrupt %s failed", bufp);
2778 +               hc_release_ohci (ohci);
2779 +               return -EBUSY;
2780 +       }
2781 +       ohci->irq = irq;
2782 +
2783 +       if (hc_start (ohci) < 0) {
2784 +               err ("can't start usb-%s", dev->slot_name);
2785 +               hc_release_ohci (ohci);
2786 +               return -EBUSY;
2787 +       }
2788 +
2789 +#ifdef DEBUG
2790 +       ohci_dump (ohci, 1);
2791 +#endif
2792 +       return 0;
2793 +}
2794 +
2795 +/*-------------------------------------------------------------------------*/
2796 +
2797 +#ifdef CONFIG_PM
2798 +
2799 +/* controller died; cleanup debris, then restart */
2800 +/* must not be called from interrupt context */
2801 +
2802 +static void hc_restart (ohci_t *ohci)
2803 +{
2804 +       int temp;
2805 +       int i;
2806 +
2807 +       if (ohci->pci_latency)
2808 +               pci_write_config_byte (ohci->ohci_dev, PCI_LATENCY_TIMER, ohci->pci_latency);
2809 +
2810 +       ohci->disabled = 1;
2811 +       ohci->sleeping = 0;
2812 +       if (ohci->bus->root_hub)
2813 +               usb_disconnect (&ohci->bus->root_hub);
2814 +
2815 +       /* empty the interrupt branches */
2816 +       for (i = 0; i < NUM_INTS; i++) ohci->ohci_int_load[i] = 0;
2817 +       for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table[i] = 0;
2818 +
2819 +       /* no EDs to remove */
2820 +       ohci->ed_rm_list [0] = NULL;
2821 +       ohci->ed_rm_list [1] = NULL;
2822 +
2823 +       /* empty control and bulk lists */
2824 +       ohci->ed_isotail     = NULL;
2825 +       ohci->ed_controltail = NULL;
2826 +       ohci->ed_bulktail    = NULL;
2827 +
2828 +       if ((temp = hc_reset (ohci)) < 0 || (temp = hc_start (ohci)) < 0) {
2829 +               err ("can't restart usb-%s, %d", ohci->ohci_dev->slot_name, temp);
2830 +       } else
2831 +               dbg ("restart usb-%s completed", ohci->ohci_dev->slot_name);
2832 +}
2833 +
2834 +#endif /* CONFIG_PM */
2835 +
2836 +/*-------------------------------------------------------------------------*/
2837 +
2838 +/* configured so that an OHCI device is always provided */
2839 +/* always called with process context; sleeping is OK */
2840 +
2841 +static int __devinit
2842 +ohci_pci_probe (struct pci_dev *dev, const struct pci_device_id *id)
2843 +{
2844 +       unsigned long mem_resource, mem_len;
2845 +       void *mem_base;
2846 +       int status;
2847 +
2848 +       if (pci_enable_device(dev) < 0)
2849 +               return -ENODEV;
2850 +
2851 +        if (!dev->irq) {
2852 +               err("found OHCI device with no IRQ assigned. check BIOS settings!");
2853 +               pci_disable_device (dev);
2854 +               return -ENODEV;
2855 +        }
2856 +
2857 +       /* we read its hardware registers as memory */
2858 +       mem_resource = pci_resource_start(dev, 0);
2859 +       mem_len = pci_resource_len(dev, 0);
2860 +       if (!request_mem_region (mem_resource, mem_len, ohci_pci_driver.name)) {
2861 +               dbg ("controller already in use");
2862 +               pci_disable_device (dev);
2863 +               return -EBUSY;
2864 +       }
2865 +
2866 +       mem_base = ioremap_nocache (mem_resource, mem_len);
2867 +       if (!mem_base) {
2868 +               err("Error mapping OHCI memory");
2869 +               release_mem_region (mem_resource, mem_len);
2870 +               pci_disable_device (dev);
2871 +               return -EFAULT;
2872 +       }
2873 +
2874 +       /* controller writes into our memory */
2875 +       pci_set_master (dev);
2876 +
2877 +       status = hc_found_ohci (dev, dev->irq, mem_base, id);
2878 +       if (status < 0) {
2879 +               iounmap (mem_base);
2880 +               release_mem_region (mem_resource, mem_len);
2881 +               pci_disable_device (dev);
2882 +       }
2883 +       return status;
2884 +}
2885 +
2886 +/*-------------------------------------------------------------------------*/
2887 +
2888 +/* may be called from interrupt context [interface spec] */
2889 +/* may be called without controller present */
2890 +/* may be called with controller, bus, and devices active */
2891 +
2892 +static void __devexit
2893 +ohci_pci_remove (struct pci_dev *dev)
2894 +{
2895 +       ohci_t          *ohci = pci_get_drvdata(dev);
2896 +
2897 +       dbg ("remove %s controller usb-%s%s%s",
2898 +               hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS),
2899 +               dev->slot_name,
2900 +               ohci->disabled ? " (disabled)" : "",
2901 +               in_interrupt () ? " in interrupt" : ""
2902 +               );
2903 +#ifdef DEBUG
2904 +       ohci_dump (ohci, 1);
2905 +#endif
2906 +
2907 +       /* don't wake up sleeping controllers, or block in interrupt context */
2908 +       if ((ohci->hc_control & OHCI_CTRL_HCFS) != OHCI_USB_OPER || in_interrupt ()) {
2909 +               dbg ("controller being disabled");
2910 +               ohci->disabled = 1;
2911 +       }
2912 +
2913 +       /* on return, USB will always be reset (if present) */
2914 +       if (ohci->disabled)
2915 +               writel (ohci->hc_control = OHCI_USB_RESET,
2916 +                       &ohci->regs->control);
2917 +
2918 +       hc_release_ohci (ohci);
2919 +
2920 +       release_mem_region (pci_resource_start (dev, 0), pci_resource_len (dev, 0));
2921 +       pci_disable_device (dev);
2922 +}
2923 +
2924 +
2925 +#ifdef CONFIG_PM
2926 +
2927 +/*-------------------------------------------------------------------------*/
2928 +
2929 +static int
2930 +ohci_pci_suspend (struct pci_dev *dev, u32 state)
2931 +{
2932 +       ohci_t                  *ohci = pci_get_drvdata(dev);
2933 +       unsigned long           flags;
2934 +       u16 cmd;
2935 +
2936 +       if ((ohci->hc_control & OHCI_CTRL_HCFS) != OHCI_USB_OPER) {
2937 +               dbg ("can't suspend usb-%s (state is %s)", dev->slot_name,
2938 +                       hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS));
2939 +               return -EIO;
2940 +       }
2941 +
2942 +       /* act as if usb suspend can always be used */
2943 +       info ("USB suspend: usb-%s", dev->slot_name);
2944 +       ohci->sleeping = 1;
2945 +
2946 +       /* First stop processing */
2947 +       spin_lock_irqsave (&ohci->ohci_lock, flags);
2948 +       ohci->hc_control &= ~(OHCI_CTRL_PLE|OHCI_CTRL_CLE|OHCI_CTRL_BLE|OHCI_CTRL_IE);
2949 +       writel (ohci->hc_control, &ohci->regs->control);
2950 +       writel (OHCI_INTR_SF, &ohci->regs->intrstatus);
2951 +       (void) readl (&ohci->regs->intrstatus);
2952 +       spin_unlock_irqrestore (&ohci->ohci_lock, flags);
2953 +
2954 +       /* Wait a frame or two */
2955 +       mdelay(1);
2956 +       if (!readl (&ohci->regs->intrstatus) & OHCI_INTR_SF)
2957 +               mdelay (1);
2958 +
2959 +#ifdef CONFIG_PMAC_PBOOK
2960 +       if (_machine == _MACH_Pmac)
2961 +               disable_irq (ohci->irq);
2962 +       /* else, 2.4 assumes shared irqs -- don't disable */
2963 +#endif
2964 +       /* Enable remote wakeup */
2965 +       writel (readl(&ohci->regs->intrenable) | OHCI_INTR_RD, &ohci->regs->intrenable);
2966 +
2967 +       /* Suspend chip and let things settle down a bit */
2968 +       ohci->hc_control = OHCI_USB_SUSPEND;
2969 +       writel (ohci->hc_control, &ohci->regs->control);
2970 +       (void) readl (&ohci->regs->control);
2971 +       mdelay (500); /* No schedule here ! */
2972 +       switch (readl (&ohci->regs->control) & OHCI_CTRL_HCFS) {
2973 +               case OHCI_USB_RESET:
2974 +                       dbg("Bus in reset phase ???");
2975 +                       break;
2976 +               case OHCI_USB_RESUME:
2977 +                       dbg("Bus in resume phase ???");
2978 +                       break;
2979 +               case OHCI_USB_OPER:
2980 +                       dbg("Bus in operational phase ???");
2981 +                       break;
2982 +               case OHCI_USB_SUSPEND:
2983 +                       dbg("Bus suspended");
2984 +                       break;
2985 +       }
2986 +       /* In some rare situations, Apple's OHCI have happily trashed
2987 +        * memory during sleep. We disable it's bus master bit during
2988 +        * suspend
2989 +        */
2990 +       pci_read_config_word (dev, PCI_COMMAND, &cmd);
2991 +       cmd &= ~PCI_COMMAND_MASTER;
2992 +       pci_write_config_word (dev, PCI_COMMAND, cmd);
2993 +#ifdef CONFIG_PMAC_PBOOK
2994 +       {
2995 +               struct device_node      *of_node;
2996 +
2997 +               /* Disable USB PAD & cell clock */
2998 +               of_node = pci_device_to_OF_node (ohci->ohci_dev);
2999 +               if (of_node)
3000 +                       pmac_call_feature(PMAC_FTR_USB_ENABLE, of_node, 0, 0);
3001 +       }
3002 +#endif
3003 +       return 0;
3004 +}
3005 +
3006 +/*-------------------------------------------------------------------------*/
3007 +
3008 +static int
3009 +ohci_pci_resume (struct pci_dev *dev)
3010 +{
3011 +       ohci_t          *ohci = pci_get_drvdata(dev);
3012 +       int             temp;
3013 +       unsigned long   flags;
3014 +
3015 +       /* guard against multiple resumes */
3016 +       atomic_inc (&ohci->resume_count);
3017 +       if (atomic_read (&ohci->resume_count) != 1) {
3018 +               err ("concurrent PCI resumes for usb-%s", dev->slot_name);
3019 +               atomic_dec (&ohci->resume_count);
3020 +               return 0;
3021 +       }
3022 +
3023 +#ifdef CONFIG_PMAC_PBOOK
3024 +       {
3025 +               struct device_node *of_node;
3026 +
3027 +               /* Re-enable USB PAD & cell clock */
3028 +               of_node = pci_device_to_OF_node (ohci->ohci_dev);
3029 +               if (of_node)
3030 +                       pmac_call_feature(PMAC_FTR_USB_ENABLE, of_node, 0, 1);
3031 +       }
3032 +#endif
3033 +
3034 +       /* did we suspend, or were we powered off? */
3035 +       ohci->hc_control = readl (&ohci->regs->control);
3036 +       temp = ohci->hc_control & OHCI_CTRL_HCFS;
3037 +
3038 +#ifdef DEBUG
3039 +       /* the registers may look crazy here */
3040 +       ohci_dump_status (ohci);
3041 +#endif
3042 +
3043 +       /* Re-enable bus mastering */
3044 +       pci_set_master(ohci->ohci_dev);
3045 +
3046 +       switch (temp) {
3047 +
3048 +       case OHCI_USB_RESET:    // lost power
3049 +               info ("USB restart: usb-%s", dev->slot_name);
3050 +               hc_restart (ohci);
3051 +               break;
3052 +
3053 +       case OHCI_USB_SUSPEND:  // host wakeup
3054 +       case OHCI_USB_RESUME:   // remote wakeup
3055 +               info ("USB continue: usb-%s from %s wakeup", dev->slot_name,
3056 +                       (temp == OHCI_USB_SUSPEND)
3057 +                               ? "host" : "remote");
3058 +               ohci->hc_control = OHCI_USB_RESUME;
3059 +               writel (ohci->hc_control, &ohci->regs->control);
3060 +               (void) readl (&ohci->regs->control);
3061 +               mdelay (20); /* no schedule here ! */
3062 +               /* Some controllers (lucent) need a longer delay here */
3063 +               mdelay (15);
3064 +               temp = readl (&ohci->regs->control);
3065 +               temp = ohci->hc_control & OHCI_CTRL_HCFS;
3066 +               if (temp != OHCI_USB_RESUME) {
3067 +                       err ("controller usb-%s won't resume", dev->slot_name);
3068 +                       ohci->disabled = 1;
3069 +                       return -EIO;
3070 +               }
3071 +
3072 +               /* Some chips likes being resumed first */
3073 +               writel (OHCI_USB_OPER, &ohci->regs->control);
3074 +               (void) readl (&ohci->regs->control);
3075 +               mdelay (3);
3076 +
3077 +               /* Then re-enable operations */
3078 +               spin_lock_irqsave (&ohci->ohci_lock, flags);
3079 +               ohci->disabled = 0;
3080 +               ohci->sleeping = 0;
3081 +               ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
3082 +               if (!ohci->ed_rm_list[0] && !ohci->ed_rm_list[1]) {
3083 +                       if (ohci->ed_controltail)
3084 +                               ohci->hc_control |= OHCI_CTRL_CLE;
3085 +                       if (ohci->ed_bulktail)
3086 +                               ohci->hc_control |= OHCI_CTRL_BLE;
3087 +               }
3088 +               writel (ohci->hc_control, &ohci->regs->control);
3089 +               writel (OHCI_INTR_SF, &ohci->regs->intrstatus);
3090 +               writel (OHCI_INTR_SF, &ohci->regs->intrenable);
3091 +               /* Check for a pending done list */
3092 +               writel (OHCI_INTR_WDH, &ohci->regs->intrdisable);
3093 +               (void) readl (&ohci->regs->intrdisable);
3094 +#ifdef CONFIG_PMAC_PBOOK
3095 +               if (_machine == _MACH_Pmac)
3096 +                       enable_irq (ohci->irq);
3097 +#endif
3098 +               if (ohci->hcca->done_head)
3099 +                       dl_done_list (ohci, dl_reverse_done_list (ohci));
3100 +               writel (OHCI_INTR_WDH, &ohci->regs->intrenable);
3101 +               writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
3102 +               writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
3103 +               spin_unlock_irqrestore (&ohci->ohci_lock, flags);
3104 +               break;
3105 +
3106 +       default:
3107 +               warn ("odd PCI resume for usb-%s", dev->slot_name);
3108 +       }
3109 +
3110 +       /* controller is operational, extra resumes are harmless */
3111 +       atomic_dec (&ohci->resume_count);
3112 +
3113 +       return 0;
3114 +}
3115 +
3116 +#endif /* CONFIG_PM */
3117 +
3118 +
3119 +/*-------------------------------------------------------------------------*/
3120 +
3121 +static const struct pci_device_id __devinitdata ohci_pci_ids [] = { {
3122 +
3123 +       /*
3124 +        * AMD-756 [Viper] USB has a serious erratum when used with
3125 +        * lowspeed devices like mice.
3126 +        */
3127 +       vendor:         0x1022,
3128 +       device:         0x740c,
3129 +       subvendor:      PCI_ANY_ID,
3130 +       subdevice:      PCI_ANY_ID,
3131 +
3132 +       driver_data:    OHCI_QUIRK_AMD756,
3133 +
3134 +} , {
3135 +
3136 +       /* handle any USB OHCI controller */
3137 +       class:          ((PCI_CLASS_SERIAL_USB << 8) | 0x10),
3138 +       class_mask:     ~0,
3139 +
3140 +       /* no matter who makes it */
3141 +       vendor:         PCI_ANY_ID,
3142 +       device:         PCI_ANY_ID,
3143 +       subvendor:      PCI_ANY_ID,
3144 +       subdevice:      PCI_ANY_ID,
3145 +
3146 +       }, { /* end: all zeroes */ }
3147 +};
3148 +
3149 +MODULE_DEVICE_TABLE (pci, ohci_pci_ids);
3150 +
3151 +static struct pci_driver ohci_pci_driver = {
3152 +       name:           "usb-ohci",
3153 +       id_table:       &ohci_pci_ids [0],
3154 +
3155 +       probe:          ohci_pci_probe,
3156 +       remove:         __devexit_p(ohci_pci_remove),
3157 +
3158 +#ifdef CONFIG_PM
3159 +       suspend:        ohci_pci_suspend,
3160 +       resume:         ohci_pci_resume,
3161 +#endif /* PM */
3162 +};
3163 +
3164 +
3165 +/*-------------------------------------------------------------------------*/
3166 +
3167 +static int __init ohci_hcd_init (void)
3168 +{
3169 +       return pci_module_init (&ohci_pci_driver);
3170 +}
3171 +
3172 +/*-------------------------------------------------------------------------*/
3173 +
3174 +static void __exit ohci_hcd_cleanup (void)
3175 +{
3176 +       pci_unregister_driver (&ohci_pci_driver);
3177 +}
3178 +
3179 +module_init (ohci_hcd_init);
3180 +module_exit (ohci_hcd_cleanup);
3181 +
3182 +
3183 +MODULE_AUTHOR( DRIVER_AUTHOR );
3184 +MODULE_DESCRIPTION( DRIVER_DESC );
3185 +MODULE_LICENSE("GPL");