org.handhelds.familiar/packages/linux/openzaurus-pxa27x-2.4.20-rmk2-embedix20050602/P01-C3000-clockup_050221.patch

   1 diff -Nur c3000_org/linux/arch/arm/config.in c3000_work/linux/arch/arm/config.in
   2 --- c3000_org/linux/arch/arm/config.in  2004-08-21 09:48:07.000000000 +0900
   3 +++ c3000_work/linux/arch/arm/config.in 2005-02-21 21:41:40.000000000 +0900
   4 @@ -195,7 +195,7 @@
   5  dep_bool '      SHARP Spitz'  CONFIG_ARCH_PXA_SPITZ $CONFIG_ARCH_PXA_BOXER
   6  dep_bool '        Using Trial 0'  CONFIG_SPITZ_TR0 $CONFIG_ARCH_PXA_SPITZ
   7  dep_bool '        Using Trial 0.5'  CONFIG_SPITZ_TR0_5 $CONFIG_ARCH_PXA_SPITZ
   8 -dep_bool '  SHARP Tosa'  CONFIG_ARCH_PXA_TOSA
   9 +dep_bool '  SHARP Tosa'  CONFIG_ARCH_PXA_TOSA $CONFIG_ARCH_PXA
  10  dep_bool '    SHARP Tosa skipping' CONFIG_ARCH_PXA_TOSA_SKIP $CONFIG_ARCH_PXA_TOSA
  11
  12  if [ "$CONFIG_SABINAL_DISCOVERY" = "y" -o "$CONFIG_ARCH_PXA_POODLE" = "y" -o \
  13 @@ -475,6 +475,9 @@
  14     if [ "$CONFIG_ARCH_PXA_SPITZ" = "y" ]; then
  15        define_bool CONFIG_CPU_PXA27X y
  16     fi
  17 +   if [ "$CONFIG_ARCH_PXA_SPITZ" = "y" ]; then
  18 +      bool 'Use clock change(cccr_change) enable (EXPERIMENTAL)' CONFIG_SL_CCCR_CHANGE
  19 +   fi
  20     if [ "$CONFIG_ARCH_SHARP_SL" = "y" ]; then
  21        define_bool CONFIG_BATT y
  22     fi
  23 @@ -557,7 +560,7 @@
  24  #   bool '  Real-Time Scheduling support' CONFIG_RTSCHED
  25     define_bool CONFIG_RTSCHED y
  26     if [ "$CONFIG_RTSCHED" = "y" ]; then
  27 -      int  '  MAX PTHREAD (int)' CONFIG_RTH_PTHREAD_MAX   128
  28 +      int  '  MAX PTHREAD (int)' CONFIG_RTH_PTHREAD_MAX 128
  29        hex  '  RT MEMORY SIZE (hex)' CONFIG_RT_MEM_SIZE 80000
  30        bool '      Real-Time Calibrate support' CONFIG_RTHAL_CALIBRATION
  31        if [ "$CONFIG_RTHAL_CALIBRATION" != "y" ]; then
  32 @@ -615,7 +618,7 @@
  33     hex 'Compressed ROM boot loader BSS address' CONFIG_ZBOOT_ROM_BSS 0
  34  else
  35     define_hex CONFIG_ZBOOT_ROM_TEXT 0
  36 -   define_hex CONFIG_ZBOOT_ROM_BSS  0
  37 +   define_hex CONFIG_ZBOOT_ROM_BSS 0
  38  fi
  39
  40  if [ "$CONFIG_ARCH_SA1100" = "y" -o \
  41 diff -Nur c3000_org/linux/arch/arm/mach-pxa/sharpsl_apm.c c3000_work/linux/arch/arm/mach-pxa/sharpsl_apm.c
  42 --- c3000_org/linux/arch/arm/mach-pxa/sharpsl_apm.c     2004-11-16 15:31:06.000000000 +0900
  43 +++ c3000_work/linux/arch/arm/mach-pxa/sharpsl_apm.c    2005-02-21 21:44:13.000000000 +0900
  44 @@ -130,6 +130,11 @@
  45  extern int             HWR_flag;
  46  #endif
  47
  48 +#if defined(CONFIG_SL_CCCR_CHANGE)
  49 +extern unsigned int CCCR_ValAdr_high;
  50 +struct proc_dir_entry *proc_zaurus;
  51 +#endif
  52 +
  53  #if defined(CONFIG_SABINAL_DISCOVERY)
  54  #define SHARPSL_AC_LINE_STATUS (( ASIC3_GPIO_PSTS_D & AC_IN )? APM_AC_OFFLINE : APM_AC_ONLINE)
  55  #define BACKPACK_IN_DETECT()   ( ASIC3_GPIO_PSTS_D & BACKPACK_DETECT ) /* 0: exist , 1: not in */
  56 @@ -974,6 +979,63 @@
  57
  58  EXPORT_SYMBOL(lock_FCS);
  59
  60 +#if defined(CONFIG_SL_CCCR_CHANGE)
  61 +
  62 +void write_cccr(int cccr)
  63 +{
  64 +    printk("Change CCCR = %x.\n",cccr);
  65 +    CCCR_ValAdr_high = cccr;
  66 +    sharpsl_chg_freq = cccr;
  67 +    cpu_xscale_sl_change_speed_high();
  68 +    cccr_reg = CCCR;
  69 +    printk("Changed CCCR = %x.\n",cccr_reg);
  70 +    return;
  71 +}
  72 +
  73 +int read_cccr(void)
  74 +{
  75 +    return CCCR_ValAdr_high;
  76 +}
  77 +
  78 +static ssize_t cccr_change_read_params(struct file *file, char *buf,
  79 +                                      size_t nbytes, loff_t *ppos)
  80 +{
  81 +        char outputbuf[32];
  82 +       int count;
  83 +
  84 +       if (*ppos>0) /* Assume reading completed in previous read*/
  85 +               return 0;
  86 +       count = sprintf(outputbuf, "0x%08X\n", read_cccr());
  87 +       count++;
  88 +       *ppos += count;
  89 +       if (count>nbytes)/* Assume output can be read at one time */
  90 +               return -EINVAL;
  91 +       if (copy_to_user(buf, outputbuf, count+1))
  92 +               return -EFAULT;
  93 +       return count;
  94 +}
  95 +
  96 +static ssize_t cccr_change_write_params(struct file *file, const char *buf,
  97 +                                       size_t nbytes, loff_t *ppos)
  98 +{
  99 +        unsigned int param=0;
 100 +
 101 +       sscanf(buf,"%x",&param);
 102 +       if (param) {
 103 +           write_cccr(param);
 104 +       }
 105 +       return nbytes;
 106 +}
 107 +
 108 +static struct file_operations proc_cccr_change_params_operations = {
 109 +        read:cccr_change_read_params,
 110 +        write:cccr_change_write_params,
 111 +};
 112 +
 113 +EXPORT_SYMBOL(read_cccr);
 114 +EXPORT_SYMBOL(write_cccr);
 115 +#endif
 116 +
 117  #ifdef CONFIG_APM_CPU_IDLE
 118  #ifdef SHARPSL_NEW_IDLE
 119  static int save_icmr;
 120 @@ -2786,6 +2848,7 @@
 121         struct proc_dir_entry *apm_proc;
 122         struct proc_dir_entry *lock_fcs_proc;
 123         struct proc_dir_entry *power_mode_proc;
 124 +       struct proc_dir_entry *cccr_change_proc;
 125
 126         apm_info.bios = apm_bios_info;
 127         if (apm_info.bios.version == 0) {
 128 @@ -2822,6 +2885,9 @@
 129         printk("FCS : CCCR = %x\n",cccr_reg);
 130  #if defined(CONFIG_CPU_PXA27X)
 131         sharpsl_chg_freq = cccr_reg;
 132 +#if defined(CONFIG_SL_CCCR_CHANGE)
 133 +       CCCR_ValAdr_high = sharpsl_chg_freq;
 134 +#endif
 135  #endif
 136  #endif
 137
 138 @@ -2902,6 +2968,19 @@
 139                 power_mode_proc->proc_fops = &proc_power_mode_params_operations;
 140         }
 141
 142 +#if defined(CONFIG_SL_CCCR_CHANGE)
 143 +       proc_zaurus = proc_mkdir("zaurus", NULL);
 144 +       if (proc_zaurus == NULL) {
 145 +               unregister_chrdev(228, "zaurus");
 146 +               printk(KERN_ERR "proc: can't create /proc/zaurus\n");
 147 +               return -ENOMEM;
 148 +       }
 149 +
 150 +       cccr_change_proc = create_proc_entry("zaurus/CCCR", 0, NULL);
 151 +       if (cccr_change_proc) {
 152 +               cccr_change_proc->proc_fops = &proc_cccr_change_params_operations;
 153 +       }
 154 +#endif
 155         kernel_thread(apm_thread, NULL, CLONE_FS | CLONE_FILES | CLONE_SIGHAND | SIGCHLD);
 156
 157  #if defined(CONFIG_SABINAL_DISCOVERY) || defined(CONFIG_ARCH_PXA_TOSA)
 158 diff -Nur c3000_org/linux/arch/arm/mach-pxa/sharpsl_suspend.S c3000_work/linux/arch/arm/mach-pxa/sharpsl_suspend.S
 159 --- c3000_org/linux/arch/arm/mach-pxa/sharpsl_suspend.S 2004-11-09 14:30:36.000000000 +0900
 160 +++ c3000_work/linux/arch/arm/mach-pxa/sharpsl_suspend.S        2005-02-21 21:41:40.000000000 +0900
 161 @@ -64,7 +64,7 @@
 162
 163  sleep_param:   .word   0               @ virtual address of parameter array
 164  sleep_param_p: .word   0               @ physical address of parameter array
 165 -
 166 +
 167  IC_BASE:        .word   io_p2v(0x40D00000)
 168
 169
 170 @@ -1109,6 +1109,9 @@
 171
 172  #else  /* CONFIG_CPU_PXA27X */
 173
 174 +#if defined(CONFIG_SL_CCCR_CHANGE)
 175 +       .global         CCCR_ValAdr_high
 176 +#endif
 177  CCCR_ValAdr_high:      .word   0x02000210
 178  MSC0_ValAdr_high:      .word   0x7ff02DD8
 179  MSC1_ValAdr_high:      .word   0x7ff434D4
 180 @@ -1305,8 +1308,12 @@
 181         stmfd   sp!, {r0, r1, r2, r3, r4, lr}
 182
 183         ldr             r0, CMR_BASE
 184 +#if defined(CONFIG_SL_CCCR_CHANGE)
 185 +       ldr             r1, CCCR_ValAdr_high
 186 +#else
 187         ldr             r1, CCCR_ValAdr_208
 188 -       str             r1, [r0, #CMR_CCCR]
 189 +#endif
 190 +       str             r1, [r0, #CMR_CCCR]
 191
 192         ldr             r0, MD_BASE
 193         ldr             r4, MDREFR_ValAdr_208
 194 @@ -1333,7 +1340,7 @@
 195
 196         .align 5
 197         .text
 198 -
 199 +
 200  ENTRY(pxa27x_get_ccnt)
 201         mrc             p14, 0, r0, c1, c1, 0
 202         mov             pc, lr                          @ return