2 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
4 * Routines for control of EMU10K1 chips
6 * Copyright (c) by James Courtier-Dutton <James@superbug.co.uk>
7 * Added support for Audigy 2 Value.
8 * Added EMU 1010 support.
9 * General bug fixes and enhancements.
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
34 #include <linux/sched.h>
35 #include <linux/kthread.h>
36 #include <linux/delay.h>
37 #include <linux/init.h>
38 #include <linux/interrupt.h>
39 #include <linux/pci.h>
40 #include <linux/slab.h>
41 #include <linux/vmalloc.h>
42 #include <linux/mutex.h>
45 #include <sound/core.h>
46 #include <sound/emu10k1.h>
47 #include <linux/firmware.h>
53 #define HANA_FILENAME "emu/hana.fw"
54 #define DOCK_FILENAME "emu/audio_dock.fw"
55 #define EMU1010B_FILENAME "emu/emu1010b.fw"
56 #define MICRO_DOCK_FILENAME "emu/micro_dock.fw"
57 #define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw"
59 MODULE_FIRMWARE(HANA_FILENAME);
60 MODULE_FIRMWARE(DOCK_FILENAME);
61 MODULE_FIRMWARE(EMU1010B_FILENAME);
62 MODULE_FIRMWARE(MICRO_DOCK_FILENAME);
63 MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME);
66 /*************************************************************************
68 *************************************************************************/
70 void snd_emu10k1_voice_init(struct snd_emu10k1 * emu, int ch)
72 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
73 snd_emu10k1_ptr_write(emu, IP, ch, 0);
74 snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff);
75 snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff);
76 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
77 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
78 snd_emu10k1_ptr_write(emu, CCR, ch, 0);
80 snd_emu10k1_ptr_write(emu, PSST, ch, 0);
81 snd_emu10k1_ptr_write(emu, DSL, ch, 0x10);
82 snd_emu10k1_ptr_write(emu, CCCA, ch, 0);
83 snd_emu10k1_ptr_write(emu, Z1, ch, 0);
84 snd_emu10k1_ptr_write(emu, Z2, ch, 0);
85 snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000);
87 snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0);
88 snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0);
89 snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff);
90 snd_emu10k1_ptr_write(emu, PEFE, ch, 0);
91 snd_emu10k1_ptr_write(emu, FMMOD, ch, 0);
92 snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24); /* 1 Hz */
93 snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24); /* 1 Hz */
94 snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0);
96 /*** these are last so OFF prevents writing ***/
97 snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0);
98 snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0);
99 snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0);
100 snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0);
101 snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0);
103 /* Audigy extra stuffs */
105 snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */
106 snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */
107 snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */
108 snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */
109 snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100);
110 snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f);
111 snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0);
115 static unsigned int spi_dac_init[] = {
139 static unsigned int i2c_adc_init[][2] = {
140 { 0x17, 0x00 }, /* Reset */
141 { 0x07, 0x00 }, /* Timeout */
142 { 0x0b, 0x22 }, /* Interface control */
143 { 0x0c, 0x22 }, /* Master mode control */
144 { 0x0d, 0x08 }, /* Powerdown control */
145 { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */
146 { 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */
147 { 0x10, 0x7b }, /* ALC Control 1 */
148 { 0x11, 0x00 }, /* ALC Control 2 */
149 { 0x12, 0x32 }, /* ALC Control 3 */
150 { 0x13, 0x00 }, /* Noise gate control */
151 { 0x14, 0xa6 }, /* Limiter control */
152 { 0x15, ADC_MUX_2 }, /* ADC Mixer control. Mic for Audigy 2 ZS Notebook */
155 static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir, int resume)
157 unsigned int silent_page;
161 /* disable audio and lock cache */
162 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE,
165 /* reset recording buffers */
166 snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE);
167 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
168 snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE);
169 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
170 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
171 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
173 /* disable channel interrupt */
174 outl(0, emu->port + INTE);
175 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
176 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
177 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
178 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
181 /* set SPDIF bypass mode */
182 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
183 /* enable rear left + rear right AC97 slots */
184 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT |
188 /* init envelope engine */
189 for (ch = 0; ch < NUM_G; ch++)
190 snd_emu10k1_voice_init(emu, ch);
192 snd_emu10k1_ptr_write(emu, SPCS0, 0, emu->spdif_bits[0]);
193 snd_emu10k1_ptr_write(emu, SPCS1, 0, emu->spdif_bits[1]);
194 snd_emu10k1_ptr_write(emu, SPCS2, 0, emu->spdif_bits[2]);
196 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
197 /* Hacks for Alice3 to work independent of haP16V driver */
198 //Setup SRCMulti_I2S SamplingRate
199 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
202 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
204 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
205 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
206 /* Setup SRCMulti Input Audio Enable */
207 /* Use 0xFFFFFFFF to enable P16V sounds. */
208 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
210 /* Enabled Phased (8-channel) P16V playback */
211 outl(0x0201, emu->port + HCFG2);
212 /* Set playback routing. */
213 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
215 if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */
216 /* Hacks for Alice3 to work independent of haP16V driver */
217 snd_printk(KERN_INFO "Audigy2 value: Special config.\n");
218 //Setup SRCMulti_I2S SamplingRate
219 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
222 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
224 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
225 outl(0x600000, emu->port + 0x20);
226 outl(0x14, emu->port + 0x24);
228 /* Setup SRCMulti Input Audio Enable */
229 outl(0x7b0000, emu->port + 0x20);
230 outl(0xFF000000, emu->port + 0x24);
232 /* Setup SPDIF Out Audio Enable */
233 /* The Audigy 2 Value has a separate SPDIF out,
234 * so no need for a mixer switch
236 outl(0x7a0000, emu->port + 0x20);
237 outl(0xFF000000, emu->port + 0x24);
238 tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
239 outl(tmp, emu->port + A_IOCFG);
241 if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
244 size = ARRAY_SIZE(spi_dac_init);
245 for (n = 0; n < size; n++)
246 snd_emu10k1_spi_write(emu, spi_dac_init[n]);
248 snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10);
251 * GPIO1: Speakers-enabled.
254 * GPIO4: IEC958 Output on.
259 outl(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */
262 if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */
265 snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f);
266 tmp = inl(emu->port + A_IOCFG);
267 outl(tmp | 0x4, emu->port + A_IOCFG); /* Set bit 2 for mic input */
268 tmp = inl(emu->port + A_IOCFG);
269 size = ARRAY_SIZE(i2c_adc_init);
270 for (n = 0; n < size; n++)
271 snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]);
272 for (n=0; n < 4; n++) {
273 emu->i2c_capture_volume[n][0]= 0xcf;
274 emu->i2c_capture_volume[n][1]= 0xcf;
280 snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
281 snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */
282 snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */
284 silent_page = (emu->silent_page.addr << 1) | MAP_PTI_MASK;
285 for (ch = 0; ch < NUM_G; ch++) {
286 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
287 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
290 if (emu->card_capabilities->emu1010) {
291 outl(HCFG_AUTOMUTE_ASYNC |
293 HCFG_AUDIOENABLE, emu->port + HCFG);
296 * Mute Disable Audio = 0
297 * Lock Tank Memory = 1
298 * Lock Sound Memory = 0
301 } else if (emu->audigy) {
302 if (emu->revision == 4) /* audigy2 */
303 outl(HCFG_AUDIOENABLE |
304 HCFG_AC3ENABLE_CDSPDIF |
305 HCFG_AC3ENABLE_GPSPDIF |
306 HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
308 outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
309 /* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
310 * e.g. card_capabilities->joystick */
311 } else if (emu->model == 0x20 ||
312 emu->model == 0xc400 ||
313 (emu->model == 0x21 && emu->revision < 6))
314 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
316 // With on-chip joystick
317 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
319 if (enable_ir) { /* enable IR for SB Live */
320 if (emu->card_capabilities->emu1010) {
321 ; /* Disable all access to A_IOCFG for the emu1010 */
322 } else if (emu->card_capabilities->i2c_adc) {
323 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
324 } else if (emu->audigy) {
325 unsigned int reg = inl(emu->port + A_IOCFG);
326 outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
328 outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
330 outl(reg, emu->port + A_IOCFG);
332 unsigned int reg = inl(emu->port + HCFG);
333 outl(reg | HCFG_GPOUT2, emu->port + HCFG);
335 outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
337 outl(reg, emu->port + HCFG);
341 if (emu->card_capabilities->emu1010) {
342 ; /* Disable all access to A_IOCFG for the emu1010 */
343 } else if (emu->card_capabilities->i2c_adc) {
344 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
345 } else if (emu->audigy) { /* enable analog output */
346 unsigned int reg = inl(emu->port + A_IOCFG);
347 outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
353 static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu)
356 * Enable the audio bit
358 outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
360 /* Enable analog/digital outs on audigy */
361 if (emu->card_capabilities->emu1010) {
362 ; /* Disable all access to A_IOCFG for the emu1010 */
363 } else if (emu->card_capabilities->i2c_adc) {
364 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
365 } else if (emu->audigy) {
366 outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
368 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
369 /* Unmute Analog now. Set GPO6 to 1 for Apollo.
370 * This has to be done after init ALice3 I2SOut beyond 48KHz.
371 * So, sequence is important. */
372 outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
373 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */
374 /* Unmute Analog now. */
375 outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
377 /* Disable routing from AC97 line out to Front speakers */
378 outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
385 /* FIXME: the following routine disables LiveDrive-II !! */
388 tmp = inl(emu->port + HCFG);
389 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
390 outl(tmp|0x800, emu->port + HCFG);
392 if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
394 outl(tmp, emu->port + HCFG);
400 snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
403 int snd_emu10k1_done(struct snd_emu10k1 * emu)
407 outl(0, emu->port + INTE);
412 for (ch = 0; ch < NUM_G; ch++)
413 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
414 for (ch = 0; ch < NUM_G; ch++) {
415 snd_emu10k1_ptr_write(emu, VTFT, ch, 0);
416 snd_emu10k1_ptr_write(emu, CVCF, ch, 0);
417 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
418 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
421 /* reset recording buffers */
422 snd_emu10k1_ptr_write(emu, MICBS, 0, 0);
423 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
424 snd_emu10k1_ptr_write(emu, FXBS, 0, 0);
425 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
426 snd_emu10k1_ptr_write(emu, FXWC, 0, 0);
427 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
428 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
429 snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K);
430 snd_emu10k1_ptr_write(emu, TCB, 0, 0);
432 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
434 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
436 /* disable channel interrupt */
437 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
438 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
439 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
440 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
442 /* disable audio and lock cache */
443 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
444 snd_emu10k1_ptr_write(emu, PTB, 0, 0);
449 /*************************************************************************
450 * ECARD functional implementation
451 *************************************************************************/
453 /* In A1 Silicon, these bits are in the HC register */
454 #define HOOKN_BIT (1L << 12)
455 #define HANDN_BIT (1L << 11)
456 #define PULSEN_BIT (1L << 10)
458 #define EC_GDI1 (1 << 13)
459 #define EC_GDI0 (1 << 14)
461 #define EC_NUM_CONTROL_BITS 20
463 #define EC_AC3_DATA_SELN 0x0001L
464 #define EC_EE_DATA_SEL 0x0002L
465 #define EC_EE_CNTRL_SELN 0x0004L
466 #define EC_EECLK 0x0008L
467 #define EC_EECS 0x0010L
468 #define EC_EESDO 0x0020L
469 #define EC_TRIM_CSN 0x0040L
470 #define EC_TRIM_SCLK 0x0080L
471 #define EC_TRIM_SDATA 0x0100L
472 #define EC_TRIM_MUTEN 0x0200L
473 #define EC_ADCCAL 0x0400L
474 #define EC_ADCRSTN 0x0800L
475 #define EC_DACCAL 0x1000L
476 #define EC_DACMUTEN 0x2000L
477 #define EC_LEDN 0x4000L
479 #define EC_SPDIF0_SEL_SHIFT 15
480 #define EC_SPDIF1_SEL_SHIFT 17
481 #define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT)
482 #define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT)
483 #define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
484 #define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
485 #define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should
486 * be incremented any time the EEPROM's
487 * format is changed. */
489 #define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */
491 /* Addresses for special values stored in to EEPROM */
492 #define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */
493 #define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */
494 #define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */
496 #define EC_LAST_PROMFILE_ADDR 0x2f
498 #define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The
499 * can be up to 30 characters in length
500 * and is stored as a NULL-terminated
501 * ASCII string. Any unused bytes must be
502 * filled with zeros */
503 #define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */
506 /* Most of this stuff is pretty self-evident. According to the hardware
507 * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
508 * offset problem. Weird.
510 #define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
514 #define EC_DEFAULT_ADC_GAIN 0xC4C4
515 #define EC_DEFAULT_SPDIF0_SEL 0x0
516 #define EC_DEFAULT_SPDIF1_SEL 0x4
518 /**************************************************************************
519 * @func Clock bits into the Ecard's control latch. The Ecard uses a
520 * control latch will is loaded bit-serially by toggling the Modem control
521 * lines from function 2 on the E8010. This function hides these details
522 * and presents the illusion that we are actually writing to a distinct
526 static void snd_emu10k1_ecard_write(struct snd_emu10k1 * emu, unsigned int value)
528 unsigned short count;
530 unsigned long hc_port;
531 unsigned int hc_value;
533 hc_port = emu->port + HCFG;
534 hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
535 outl(hc_value, hc_port);
537 for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
539 /* Set up the value */
540 data = ((value & 0x1) ? PULSEN_BIT : 0);
543 outl(hc_value | data, hc_port);
545 /* Clock the shift register */
546 outl(hc_value | data | HANDN_BIT, hc_port);
547 outl(hc_value | data, hc_port);
551 outl(hc_value | HOOKN_BIT, hc_port);
552 outl(hc_value, hc_port);
555 /**************************************************************************
556 * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The
557 * trim value consists of a 16bit value which is composed of two
558 * 8 bit gain/trim values, one for the left channel and one for the
559 * right channel. The following table maps from the Gain/Attenuation
560 * value in decibels into the corresponding bit pattern for a single
564 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 * emu,
569 /* Enable writing to the TRIM registers */
570 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
572 /* Do it again to insure that we meet hold time requirements */
573 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
575 for (bit = (1 << 15); bit; bit >>= 1) {
578 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
581 value |= EC_TRIM_SDATA;
584 snd_emu10k1_ecard_write(emu, value);
585 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
586 snd_emu10k1_ecard_write(emu, value);
589 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
592 static int snd_emu10k1_ecard_init(struct snd_emu10k1 * emu)
594 unsigned int hc_value;
596 /* Set up the initial settings */
597 emu->ecard_ctrl = EC_RAW_RUN_MODE |
598 EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
599 EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
601 /* Step 0: Set the codec type in the hardware control register
602 * and enable audio output */
603 hc_value = inl(emu->port + HCFG);
604 outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
605 inl(emu->port + HCFG);
607 /* Step 1: Turn off the led and deassert TRIM_CS */
608 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
610 /* Step 2: Calibrate the ADC and DAC */
611 snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
613 /* Step 3: Wait for awhile; XXX We can't get away with this
614 * under a real operating system; we'll need to block and wait that
616 snd_emu10k1_wait(emu, 48000);
618 /* Step 4: Switch off the DAC and ADC calibration. Note
619 * That ADC_CAL is actually an inverted signal, so we assert
620 * it here to stop calibration. */
621 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
623 /* Step 4: Switch into run mode */
624 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
626 /* Step 5: Set the analog input gain */
627 snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
632 static int snd_emu10k1_cardbus_init(struct snd_emu10k1 * emu)
634 unsigned long special_port;
637 /* Special initialisation routine
638 * before the rest of the IO-Ports become active.
640 special_port = emu->port + 0x38;
641 value = inl(special_port);
642 outl(0x00d00000, special_port);
643 value = inl(special_port);
644 outl(0x00d00001, special_port);
645 value = inl(special_port);
646 outl(0x00d0005f, special_port);
647 value = inl(special_port);
648 outl(0x00d0007f, special_port);
649 value = inl(special_port);
650 outl(0x0090007f, special_port);
651 value = inl(special_port);
653 snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */
657 static int snd_emu1010_load_firmware(struct snd_emu10k1 * emu, const char * filename)
663 const struct firmware *fw_entry;
665 if ((err = request_firmware(&fw_entry, filename, &emu->pci->dev)) != 0) {
666 snd_printk(KERN_ERR "firmware: %s not found. Err=%d\n",filename, err);
669 snd_printk(KERN_INFO "firmware size=0x%zx\n", fw_entry->size);
671 if (fw_entry->size != 0x133a4) {
672 snd_printk(KERN_ERR "firmware: %s wrong size.\n",filename);
677 /* The FPGA is a Xilinx Spartan IIE XC2S50E */
678 /* GPIO7 -> FPGA PGMN
681 * FPGA CONFIG OFF -> FPGA PGMN
683 outl(0x00, emu->port + A_IOCFG); /* Set PGMN low for 1uS. */
685 outl(0x80, emu->port + A_IOCFG); /* Leave bit 7 set during netlist setup. */
686 udelay(100); /* Allow FPGA memory to clean */
687 for(n = 0; n < fw_entry->size; n++) {
688 value=fw_entry->data[n];
689 for(i = 0; i < 8; i++) {
694 outl(reg, emu->port + A_IOCFG);
695 outl(reg | 0x40, emu->port + A_IOCFG);
698 /* After programming, set GPIO bit 4 high again. */
699 outl(0x10, emu->port + A_IOCFG);
702 release_firmware(fw_entry);
706 int emu1010_firmware_thread(void *data) {
707 struct snd_emu10k1 * emu = data;
713 /* Delay to allow Audio Dock to settle */
715 if (kthread_should_stop())
717 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp ); /* IRQ Status */
718 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ® ); /* OPTIONS: Which cards are attached to the EMU */
719 if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) {
720 /* Audio Dock attached */
721 /* Return to Audio Dock programming mode */
722 snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware\n");
723 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_AUDIODOCK );
724 if (emu->card_capabilities->emu1010 == 1) {
725 if ((err = snd_emu1010_load_firmware(emu, DOCK_FILENAME)) != 0) {
728 } else if (emu->card_capabilities->emu1010 == 2) {
729 if ((err = snd_emu1010_load_firmware(emu, MICRO_DOCK_FILENAME)) != 0) {
732 } else if (emu->card_capabilities->emu1010 == 3) {
733 if ((err = snd_emu1010_load_firmware(emu, MICRO_DOCK_FILENAME)) != 0) {
738 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0 );
739 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, ® );
740 snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_IRQ_STATUS=0x%x\n",reg);
741 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
742 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ® );
743 snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_ID=0x%x\n",reg);
744 if ((reg & 0x1f) != 0x15) {
745 /* FPGA failed to be programmed */
746 snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware file failed, reg=0x%x\n", reg);
750 snd_printk(KERN_INFO "emu1010: Audio Dock Firmware loaded\n");
751 snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp );
752 snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2 );
753 snd_printk("Audio Dock ver:%d.%d\n",tmp ,tmp2);
754 /* Sync clocking between 1010 and Dock */
755 /* Allow DLL to settle */
757 /* Unmute all. Default is muted after a firmware load */
758 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE );
766 * EMU-1010 - details found out from this driver, official MS Win drivers,
769 * Audigy2 (aka Alice2):
770 * ---------------------
771 * * communication over PCI
772 * * conversion of 32-bit data coming over EMU32 links from HANA FPGA
773 * to 2 x 16-bit, using internal DSP instructions
774 * * slave mode, clock supplied by HANA
775 * * linked to HANA using:
776 * 32 x 32-bit serial EMU32 output channels
777 * 16 x EMU32 input channels
778 * (?) x I2S I/O channels (?)
782 * * provides all (?) physical inputs and outputs of the card
783 * (ADC, DAC, SPDIF I/O, ADAT I/O, etc.)
784 * * provides clock signal for the card and Alice2
785 * * two crystals - for 44.1kHz and 48kHz multiples
786 * * provides internal routing of signal sources to signal destinations
787 * * inputs/outputs to Alice2 - see above
789 * Current status of the driver:
790 * ----------------------------
791 * * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
792 * * PCM device nb. 2:
793 * 16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops
794 * 16 x 32-bit capture - snd_emu10k1_capture_efx_ops
796 static int snd_emu10k1_emu1010_init(struct snd_emu10k1 * emu)
803 snd_printk(KERN_INFO "emu1010: Special config.\n");
804 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
805 * Lock Sound Memory Cache, Lock Tank Memory Cache,
808 outl(0x0005a00c, emu->port + HCFG);
809 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
810 * Lock Tank Memory Cache,
813 outl(0x0005a004, emu->port + HCFG);
814 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
817 outl(0x0005a000, emu->port + HCFG);
818 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
821 outl(0x0005a000, emu->port + HCFG);
823 /* Disable 48Volt power to Audio Dock */
824 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0 );
826 /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */
827 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ® );
828 snd_printdd("reg1=0x%x\n",reg);
829 if ((reg & 0x3f) == 0x15) {
830 /* FPGA netlist already present so clear it */
831 /* Return to programming mode */
833 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0x02 );
835 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ® );
836 snd_printdd("reg2=0x%x\n",reg);
837 if ((reg & 0x3f) == 0x15) {
838 /* FPGA failed to return to programming mode */
839 snd_printk(KERN_INFO "emu1010: FPGA failed to return to programming mode\n");
842 snd_printk(KERN_INFO "emu1010: EMU_HANA_ID=0x%x\n",reg);
843 if (emu->card_capabilities->emu1010 == 1) {
844 if ((err = snd_emu1010_load_firmware(emu, HANA_FILENAME)) != 0) {
845 snd_printk(KERN_INFO "emu1010: Loading Hana Firmware file %s failed\n", HANA_FILENAME);
848 } else if (emu->card_capabilities->emu1010 == 2) {
849 if ((err = snd_emu1010_load_firmware(emu, EMU1010B_FILENAME)) != 0) {
850 snd_printk(KERN_INFO "emu1010: Loading Firmware file %s failed\n", EMU1010B_FILENAME);
853 } else if (emu->card_capabilities->emu1010 == 3) {
854 if ((err = snd_emu1010_load_firmware(emu, EMU1010_NOTEBOOK_FILENAME)) != 0) {
855 snd_printk(KERN_INFO "emu1010: Loading Firmware file %s failed\n", EMU1010_NOTEBOOK_FILENAME);
860 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
861 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ® );
862 if ((reg & 0x3f) != 0x15) {
863 /* FPGA failed to be programmed */
864 snd_printk(KERN_INFO "emu1010: Loading Hana Firmware file failed, reg=0x%x\n", reg);
868 snd_printk(KERN_INFO "emu1010: Hana Firmware loaded\n");
869 snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp );
870 snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2 );
871 snd_printk("Hana ver:%d.%d\n",tmp ,tmp2);
872 /* Enable 48Volt power to Audio Dock */
873 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON );
875 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ® );
876 snd_printk(KERN_INFO "emu1010: Card options=0x%x\n",reg);
877 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ® );
878 snd_printk(KERN_INFO "emu1010: Card options=0x%x\n",reg);
879 snd_emu1010_fpga_read(emu, EMU_HANA_OPTICAL_TYPE, &tmp );
880 /* Optical -> ADAT I/O */
884 emu->emu1010.optical_in = 1; /* IN_ADAT */
885 emu->emu1010.optical_out = 1; /* IN_ADAT */
887 tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : 0) |
888 (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : 0);
889 snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp );
890 snd_emu1010_fpga_read(emu, EMU_HANA_ADC_PADS, &tmp );
891 /* Set no attenuation on Audio Dock pads. */
892 snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, 0x00 );
893 emu->emu1010.adc_pads = 0x00;
894 snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp );
895 /* Unmute Audio dock DACs, Headphone source DAC-4. */
896 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30 );
897 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12 );
898 snd_emu1010_fpga_read(emu, EMU_HANA_DAC_PADS, &tmp );
900 snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, 0x0f );
901 emu->emu1010.dac_pads = 0x0f;
902 snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp );
903 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30 );
904 snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp );
905 /* SPDIF Format. Set Consumer mode, 24bit, copy enable */
906 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10 );
908 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19 );
910 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c );
911 /* snd_emu1010_fpga_write(emu, 0x09, 0x0f ); // IRQ Enable: All on */
912 /* IRQ Enable: All off */
913 snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00 );
915 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ® );
916 snd_printk(KERN_INFO "emu1010: Card options3=0x%x\n",reg);
917 /* Default WCLK set to 48kHz. */
918 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x00 );
919 /* Word Clock source, Internal 48kHz x1 */
920 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K );
921 //snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X );
922 /* Audio Dock LEDs. */
923 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12 );
927 snd_emu1010_fpga_link_dst_src_write(emu,
928 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
929 snd_emu1010_fpga_link_dst_src_write(emu,
930 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
931 snd_emu1010_fpga_link_dst_src_write(emu,
932 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT2);
933 snd_emu1010_fpga_link_dst_src_write(emu,
934 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT2);
938 snd_emu1010_fpga_link_dst_src_write(emu,
939 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
940 snd_emu1010_fpga_link_dst_src_write(emu,
941 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
942 snd_emu1010_fpga_link_dst_src_write(emu,
943 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
944 snd_emu1010_fpga_link_dst_src_write(emu,
945 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_RIGHT2);
946 snd_emu1010_fpga_link_dst_src_write(emu,
947 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT3);
948 snd_emu1010_fpga_link_dst_src_write(emu,
949 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT3);
950 snd_emu1010_fpga_link_dst_src_write(emu,
951 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HAMOA_ADC_LEFT4);
952 snd_emu1010_fpga_link_dst_src_write(emu,
953 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HAMOA_ADC_RIGHT4);
957 snd_emu1010_fpga_link_dst_src_write(emu,
958 EMU_DST_ALICE2_EMU32_0, EMU_SRC_DOCK_MIC_A1);
959 snd_emu1010_fpga_link_dst_src_write(emu,
960 EMU_DST_ALICE2_EMU32_1, EMU_SRC_DOCK_MIC_B1);
961 snd_emu1010_fpga_link_dst_src_write(emu,
962 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
963 snd_emu1010_fpga_link_dst_src_write(emu,
964 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_LEFT2);
965 snd_emu1010_fpga_link_dst_src_write(emu,
966 EMU_DST_ALICE2_EMU32_4, EMU_SRC_DOCK_ADC1_LEFT1);
967 snd_emu1010_fpga_link_dst_src_write(emu,
968 EMU_DST_ALICE2_EMU32_5, EMU_SRC_DOCK_ADC1_RIGHT1);
969 snd_emu1010_fpga_link_dst_src_write(emu,
970 EMU_DST_ALICE2_EMU32_6, EMU_SRC_DOCK_ADC2_LEFT1);
971 snd_emu1010_fpga_link_dst_src_write(emu,
972 EMU_DST_ALICE2_EMU32_7, EMU_SRC_DOCK_ADC2_RIGHT1);
973 /* Pavel Hofman - setting defaults for 8 more capture channels
974 * Defaults only, users will set their own values anyways, let's
978 snd_emu1010_fpga_link_dst_src_write(emu,
979 EMU_DST_ALICE2_EMU32_8, EMU_SRC_DOCK_MIC_A1);
980 snd_emu1010_fpga_link_dst_src_write(emu,
981 EMU_DST_ALICE2_EMU32_9, EMU_SRC_DOCK_MIC_B1);
982 snd_emu1010_fpga_link_dst_src_write(emu,
983 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HAMOA_ADC_LEFT2);
984 snd_emu1010_fpga_link_dst_src_write(emu,
985 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HAMOA_ADC_LEFT2);
986 snd_emu1010_fpga_link_dst_src_write(emu,
987 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_ADC1_LEFT1);
988 snd_emu1010_fpga_link_dst_src_write(emu,
989 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_ADC1_RIGHT1);
990 snd_emu1010_fpga_link_dst_src_write(emu,
991 EMU_DST_ALICE2_EMU32_E, EMU_SRC_DOCK_ADC2_LEFT1);
992 snd_emu1010_fpga_link_dst_src_write(emu,
993 EMU_DST_ALICE2_EMU32_F, EMU_SRC_DOCK_ADC2_RIGHT1);
997 snd_emu1010_fpga_link_dst_src_write(emu,
998 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HANA_ADAT);
999 snd_emu1010_fpga_link_dst_src_write(emu,
1000 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HANA_ADAT + 1);
1001 snd_emu1010_fpga_link_dst_src_write(emu,
1002 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HANA_ADAT + 2);
1003 snd_emu1010_fpga_link_dst_src_write(emu,
1004 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HANA_ADAT + 3);
1005 snd_emu1010_fpga_link_dst_src_write(emu,
1006 EMU_DST_ALICE2_EMU32_8, EMU_SRC_HANA_ADAT + 4);
1007 snd_emu1010_fpga_link_dst_src_write(emu,
1008 EMU_DST_ALICE2_EMU32_9, EMU_SRC_HANA_ADAT + 5);
1009 snd_emu1010_fpga_link_dst_src_write(emu,
1010 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HANA_ADAT + 6);
1011 snd_emu1010_fpga_link_dst_src_write(emu,
1012 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HANA_ADAT + 7);
1013 snd_emu1010_fpga_link_dst_src_write(emu,
1014 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_MIC_A1);
1015 snd_emu1010_fpga_link_dst_src_write(emu,
1016 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_MIC_B1);
1017 snd_emu1010_fpga_link_dst_src_write(emu,
1018 EMU_DST_ALICE2_EMU32_E, EMU_SRC_HAMOA_ADC_LEFT2);
1019 snd_emu1010_fpga_link_dst_src_write(emu,
1020 EMU_DST_ALICE2_EMU32_F, EMU_SRC_HAMOA_ADC_LEFT2);
1022 for (i = 0;i < 0x20; i++ ) {
1023 /* AudioDock Elink <- Silence */
1024 snd_emu1010_fpga_link_dst_src_write(emu, 0x0100+i, EMU_SRC_SILENCE);
1026 for (i = 0;i < 4; i++) {
1027 /* Hana SPDIF Out <- Silence */
1028 snd_emu1010_fpga_link_dst_src_write(emu, 0x0200+i, EMU_SRC_SILENCE);
1030 for (i = 0;i < 7; i++) {
1031 /* Hamoa DAC <- Silence */
1032 snd_emu1010_fpga_link_dst_src_write(emu, 0x0300+i, EMU_SRC_SILENCE);
1034 for (i = 0;i < 7; i++) {
1035 /* Hana ADAT Out <- Silence */
1036 snd_emu1010_fpga_link_dst_src_write(emu, EMU_DST_HANA_ADAT + i, EMU_SRC_SILENCE);
1038 snd_emu1010_fpga_link_dst_src_write(emu,
1039 EMU_DST_ALICE_I2S0_LEFT, EMU_SRC_DOCK_ADC1_LEFT1);
1040 snd_emu1010_fpga_link_dst_src_write(emu,
1041 EMU_DST_ALICE_I2S0_RIGHT, EMU_SRC_DOCK_ADC1_RIGHT1);
1042 snd_emu1010_fpga_link_dst_src_write(emu,
1043 EMU_DST_ALICE_I2S1_LEFT, EMU_SRC_DOCK_ADC2_LEFT1);
1044 snd_emu1010_fpga_link_dst_src_write(emu,
1045 EMU_DST_ALICE_I2S1_RIGHT, EMU_SRC_DOCK_ADC2_RIGHT1);
1046 snd_emu1010_fpga_link_dst_src_write(emu,
1047 EMU_DST_ALICE_I2S2_LEFT, EMU_SRC_DOCK_ADC3_LEFT1);
1048 snd_emu1010_fpga_link_dst_src_write(emu,
1049 EMU_DST_ALICE_I2S2_RIGHT, EMU_SRC_DOCK_ADC3_RIGHT1);
1050 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x01 ); // Unmute all
1052 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp );
1054 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1055 * Lock Sound Memory Cache, Lock Tank Memory Cache,
1058 outl(0x0000a000, emu->port + HCFG);
1059 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1060 * Lock Sound Memory Cache, Lock Tank Memory Cache,
1061 * Un-Mute all codecs.
1063 outl(0x0000a001, emu->port + HCFG);
1065 /* Initial boot complete. Now patches */
1067 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp );
1068 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19 ); /* MIDI Route */
1069 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c ); /* Unknown */
1070 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19 ); /* MIDI Route */
1071 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c ); /* Unknown */
1072 snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp );
1073 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10 ); /* SPDIF Format spdif (or 0x11 for aes/ebu) */
1075 /* Start Micro/Audio Dock firmware loader thread */
1076 emu->emu1010.firmware_thread = kthread_create(&emu1010_firmware_thread,
1078 "emu1010_firmware");
1079 wake_up_process(emu->emu1010.firmware_thread);
1082 snd_emu1010_fpga_link_dst_src_write(emu,
1083 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32B + 2); /* ALICE2 bus 0xa2 */
1084 snd_emu1010_fpga_link_dst_src_write(emu,
1085 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32B + 3); /* ALICE2 bus 0xa3 */
1086 snd_emu1010_fpga_link_dst_src_write(emu,
1087 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 2); /* ALICE2 bus 0xb2 */
1088 snd_emu1010_fpga_link_dst_src_write(emu,
1089 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); /* ALICE2 bus 0xb3 */
1091 /* Default outputs */
1092 snd_emu1010_fpga_link_dst_src_write(emu,
1093 EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */
1094 emu->emu1010.output_source[0] = 21;
1095 snd_emu1010_fpga_link_dst_src_write(emu,
1096 EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1097 emu->emu1010.output_source[1] = 22;
1098 snd_emu1010_fpga_link_dst_src_write(emu,
1099 EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1100 emu->emu1010.output_source[2] = 23;
1101 snd_emu1010_fpga_link_dst_src_write(emu,
1102 EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1103 emu->emu1010.output_source[3] = 24;
1104 snd_emu1010_fpga_link_dst_src_write(emu,
1105 EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1106 emu->emu1010.output_source[4] = 25;
1107 snd_emu1010_fpga_link_dst_src_write(emu,
1108 EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1109 emu->emu1010.output_source[5] = 26;
1110 snd_emu1010_fpga_link_dst_src_write(emu,
1111 EMU_DST_DOCK_DAC4_LEFT1, EMU_SRC_ALICE_EMU32A + 6);
1112 emu->emu1010.output_source[6] = 27;
1113 snd_emu1010_fpga_link_dst_src_write(emu,
1114 EMU_DST_DOCK_DAC4_RIGHT1, EMU_SRC_ALICE_EMU32A + 7);
1115 emu->emu1010.output_source[7] = 28;
1116 snd_emu1010_fpga_link_dst_src_write(emu,
1117 EMU_DST_DOCK_PHONES_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */
1118 emu->emu1010.output_source[8] = 21;
1119 snd_emu1010_fpga_link_dst_src_write(emu,
1120 EMU_DST_DOCK_PHONES_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1121 emu->emu1010.output_source[9] = 22;
1122 snd_emu1010_fpga_link_dst_src_write(emu,
1123 EMU_DST_DOCK_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */
1124 emu->emu1010.output_source[10] = 21;
1125 snd_emu1010_fpga_link_dst_src_write(emu,
1126 EMU_DST_DOCK_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1127 emu->emu1010.output_source[11] = 22;
1128 snd_emu1010_fpga_link_dst_src_write(emu,
1129 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */
1130 emu->emu1010.output_source[12] = 21;
1131 snd_emu1010_fpga_link_dst_src_write(emu,
1132 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1133 emu->emu1010.output_source[13] = 22;
1134 snd_emu1010_fpga_link_dst_src_write(emu,
1135 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */
1136 emu->emu1010.output_source[14] = 21;
1137 snd_emu1010_fpga_link_dst_src_write(emu,
1138 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1139 emu->emu1010.output_source[15] = 22;
1140 snd_emu1010_fpga_link_dst_src_write(emu,
1141 EMU_DST_HANA_ADAT, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */
1142 emu->emu1010.output_source[16] = 21;
1143 snd_emu1010_fpga_link_dst_src_write(emu,
1144 EMU_DST_HANA_ADAT + 1, EMU_SRC_ALICE_EMU32A + 1);
1145 emu->emu1010.output_source[17] = 22;
1146 snd_emu1010_fpga_link_dst_src_write(emu,
1147 EMU_DST_HANA_ADAT + 2, EMU_SRC_ALICE_EMU32A + 2);
1148 emu->emu1010.output_source[18] = 23;
1149 snd_emu1010_fpga_link_dst_src_write(emu,
1150 EMU_DST_HANA_ADAT + 3, EMU_SRC_ALICE_EMU32A + 3);
1151 emu->emu1010.output_source[19] = 24;
1152 snd_emu1010_fpga_link_dst_src_write(emu,
1153 EMU_DST_HANA_ADAT + 4, EMU_SRC_ALICE_EMU32A + 4);
1154 emu->emu1010.output_source[20] = 25;
1155 snd_emu1010_fpga_link_dst_src_write(emu,
1156 EMU_DST_HANA_ADAT + 5, EMU_SRC_ALICE_EMU32A + 5);
1157 emu->emu1010.output_source[21] = 26;
1158 snd_emu1010_fpga_link_dst_src_write(emu,
1159 EMU_DST_HANA_ADAT + 6, EMU_SRC_ALICE_EMU32A + 6);
1160 emu->emu1010.output_source[22] = 27;
1161 snd_emu1010_fpga_link_dst_src_write(emu,
1162 EMU_DST_HANA_ADAT + 7, EMU_SRC_ALICE_EMU32A + 7);
1163 emu->emu1010.output_source[23] = 28;
1165 /* TEMP: Select SPDIF in/out */
1166 //snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x0); /* Output spdif */
1168 /* TEMP: Select 48kHz SPDIF out */
1169 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x0); /* Mute all */
1170 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x0); /* Default fallback clock 48kHz */
1171 /* Word Clock source, Internal 48kHz x1 */
1172 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K );
1173 //snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X );
1174 emu->emu1010.internal_clock = 1; /* 48000 */
1175 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);/* Set LEDs on Audio Dock */
1176 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x1); /* Unmute all */
1177 //snd_emu1010_fpga_write(emu, 0x7, 0x0); /* Mute all */
1178 //snd_emu1010_fpga_write(emu, 0x7, 0x1); /* Unmute all */
1179 //snd_emu1010_fpga_write(emu, 0xe, 0x12); /* Set LEDs on Audio Dock */
1184 * Create the EMU10K1 instance
1188 static int alloc_pm_buffer(struct snd_emu10k1 *emu);
1189 static void free_pm_buffer(struct snd_emu10k1 *emu);
1192 static int snd_emu10k1_free(struct snd_emu10k1 *emu)
1194 if (emu->port) { /* avoid access to already used hardware */
1195 snd_emu10k1_fx8010_tram_setup(emu, 0);
1196 snd_emu10k1_done(emu);
1197 /* remove reserved page */
1198 if (emu->reserved_page) {
1199 snd_emu10k1_synth_free(emu, (struct snd_util_memblk *)emu->reserved_page);
1200 emu->reserved_page = NULL;
1202 snd_emu10k1_free_efx(emu);
1204 if (emu->card_capabilities->emu1010) {
1205 /* Disable 48Volt power to Audio Dock */
1206 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0 );
1207 kthread_stop(emu->emu1010.firmware_thread);
1210 snd_util_memhdr_free(emu->memhdr);
1211 if (emu->silent_page.area)
1212 snd_dma_free_pages(&emu->silent_page);
1213 if (emu->ptb_pages.area)
1214 snd_dma_free_pages(&emu->ptb_pages);
1215 vfree(emu->page_ptr_table);
1216 vfree(emu->page_addr_table);
1218 free_pm_buffer(emu);
1221 free_irq(emu->irq, emu);
1223 pci_release_regions(emu->pci);
1224 if (emu->card_capabilities->ca0151_chip) /* P16V */
1226 pci_disable_device(emu->pci);
1231 static int snd_emu10k1_dev_free(struct snd_device *device)
1233 struct snd_emu10k1 *emu = device->device_data;
1234 return snd_emu10k1_free(emu);
1237 static struct snd_emu_chip_details emu_chip_details[] = {
1238 /* Audigy 2 Value AC3 out does not work yet. Need to find out how to turn off interpolators.*/
1239 /* Tested by James@superbug.co.uk 3rd July 2005 */
1242 * ADC: Philips 1361T
1246 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
1247 .driver = "Audigy2", .name = "Audigy 2 Value [SB0400]",
1253 /* Audigy4 (Not PRO) SB0610 */
1254 /* Tested by James@superbug.co.uk 4th April 2006 */
1260 * 3: 0 - Digital Out, 1 - Line in
1268 * A: Green jack sense (Front)
1270 * C: Black jack sense (Rear/Side Right)
1271 * D: Yellow jack sense (Center/LFE/Side Left)
1275 * Digital Out/Line in switch using A_IOCFG bit 3 (0x08)
1279 /* Mic input not tested.
1280 * Analog CD input not tested
1281 * Digital Out not tested.
1283 * Audio output 5.1 working. Side outputs not working.
1285 /* DSP: CA10300-IAT LF
1286 * DAC: Cirrus Logic CS4382-KQZ
1287 * ADC: Philips 1361T
1288 * AC97: Sigmatel STAC9750
1291 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102,
1292 .driver = "Audigy2", .name = "Audigy 4 [SB0610]",
1297 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
1299 /* Audigy 2 ZS Notebook Cardbus card.*/
1300 /* Tested by James@superbug.co.uk 6th November 2006 */
1301 /* Audio output 7.1/Headphones working.
1302 * Digital output working. (AC3 not checked, only PCM)
1303 * Audio Mic/Line inputs working.
1304 * Digital input not tested.
1307 * DAC: Wolfson WM8768/WM8568
1308 * ADC: Wolfson WM8775
1312 /* Tested by James@superbug.co.uk 4th April 2006 */
1316 * 1: 0 = Mute all the 7.1 channel out. 1 = unmute.
1317 * 2: Analog input 0 = line in, 1 = mic in
1319 * 4: Digital output 0 = off, 1 = on.
1324 * All bits 1 (0x3fxx) means nothing plugged in.
1325 * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing.
1326 * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing.
1327 * C-D: 2 = Front/Rear/etc, 3 = nothing.
1331 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102,
1332 .driver = "Audigy2", .name = "Audigy 2 ZS Notebook [SB0530]",
1336 .ca_cardbus_chip = 1,
1340 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102,
1341 .driver = "Audigy2", .name = "E-mu 1010 Notebook [MAEM8950]",
1345 .ca_cardbus_chip = 1,
1348 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102,
1349 .driver = "Audigy2", .name = "E-mu 1010b PCI [MAEM????]",
1355 {.vendor = 0x1102, .device = 0x0008,
1356 .driver = "Audigy2", .name = "Audigy 2 Value [Unknown]",
1361 /* Tested by James@superbug.co.uk 8th July 2005. No sound available yet. */
1362 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
1363 .driver = "Audigy2", .name = "E-mu 1010 [4001]",
1369 /* Tested by James@superbug.co.uk 3rd July 2005 */
1370 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
1371 .driver = "Audigy2", .name = "Audigy 4 PRO [SB0380]",
1379 /* Tested by shane-alsa@cm.nu 5th Nov 2005 */
1380 /* The 0x20061102 does have SB0350 written on it
1381 * Just like 0x20021102
1383 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102,
1384 .driver = "Audigy2", .name = "Audigy 2 [SB0350b]",
1392 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
1393 .driver = "Audigy2", .name = "Audigy 2 ZS [SB0350]",
1401 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
1402 .driver = "Audigy2", .name = "Audigy 2 ZS [2001]",
1411 /* Tested by James@superbug.co.uk 3rd July 2005 */
1414 * ADC: Philips 1361T
1418 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
1419 .driver = "Audigy2", .name = "Audigy 2 [SB0240]",
1426 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
1428 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
1429 .driver = "Audigy2", .name = "Audigy 2 EX [1005]",
1436 /* Dell OEM/Creative Labs Audigy 2 ZS */
1437 /* See ALSA bug#1365 */
1438 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102,
1439 .driver = "Audigy2", .name = "Audigy 2 ZS [SB0353]",
1447 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
1448 .driver = "Audigy2", .name = "Audigy 2 Platinum [SB0240P]",
1455 .adc_1361t = 1, /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */
1457 {.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
1458 .driver = "Audigy2", .name = "Audigy 2 [Unknown]",
1465 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
1466 .driver = "Audigy", .name = "Audigy 1 [SB0090]",
1471 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
1472 .driver = "Audigy", .name = "Audigy 1 ES [SB0160]",
1478 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
1479 .driver = "Audigy", .name = "Audigy 1 [SB0090]",
1484 {.vendor = 0x1102, .device = 0x0004,
1485 .driver = "Audigy", .name = "Audigy 1 [Unknown]",
1490 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806B1102,
1491 .driver = "EMU10K1", .name = "SBLive! [SB0105]",
1496 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806A1102,
1497 .driver = "EMU10K1", .name = "SBLive! Value [SB0103]",
1502 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
1503 .driver = "EMU10K1", .name = "SBLive! Value [SB0101]",
1508 /* Tested by ALSA bug#1680 26th December 2005 */
1509 /* note: It really has SB0220 written on the card. */
1510 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102,
1511 .driver = "EMU10K1", .name = "SB Live 5.1 Dell OEM [SB0220]",
1516 /* Tested by Thomas Zehetbauer 27th Aug 2005 */
1517 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102,
1518 .driver = "EMU10K1", .name = "SB Live 5.1 [SB0220]",
1523 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102,
1524 .driver = "EMU10K1", .name = "SB Live 5.1 [SB0220]",
1529 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
1530 .driver = "EMU10K1", .name = "SB Live 5.1",
1535 /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
1536 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
1537 .driver = "EMU10K1", .name = "SBLive 5.1 [SB0060]",
1540 .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum
1541 * share the same IDs!
1544 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
1545 .driver = "EMU10K1", .name = "SBLive! Value [CT4850]",
1550 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
1551 .driver = "EMU10K1", .name = "SBLive! Platinum [CT4760P]",
1555 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
1556 .driver = "EMU10K1", .name = "SBLive! Value [CT4871]",
1561 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
1562 .driver = "EMU10K1", .name = "SBLive! Value [CT4831]",
1567 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
1568 .driver = "EMU10K1", .name = "SBLive! Value [CT4870]",
1573 /* Tested by James@superbug.co.uk 3rd July 2005 */
1574 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
1575 .driver = "EMU10K1", .name = "SBLive! Value [CT4832]",
1580 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
1581 .driver = "EMU10K1", .name = "SBLive! Value [CT4830]",
1586 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
1587 .driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
1592 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
1593 .driver = "EMU10K1", .name = "SBLive! Value [CT4780]",
1598 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
1599 .driver = "EMU10K1", .name = "E-mu APS [4001]",
1603 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
1604 .driver = "EMU10K1", .name = "SBLive! [CT4620]",
1609 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
1610 .driver = "EMU10K1", .name = "SBLive! Value [CT4670]",
1615 {.vendor = 0x1102, .device = 0x0002,
1616 .driver = "EMU10K1", .name = "SB Live [Unknown]",
1621 { } /* terminator */
1624 int __devinit snd_emu10k1_create(struct snd_card *card,
1625 struct pci_dev * pci,
1626 unsigned short extin_mask,
1627 unsigned short extout_mask,
1628 long max_cache_bytes,
1631 struct snd_emu10k1 ** remu)
1633 struct snd_emu10k1 *emu;
1636 unsigned int silent_page;
1637 const struct snd_emu_chip_details *c;
1638 static struct snd_device_ops ops = {
1639 .dev_free = snd_emu10k1_dev_free,
1644 /* enable PCI device */
1645 if ((err = pci_enable_device(pci)) < 0)
1648 emu = kzalloc(sizeof(*emu), GFP_KERNEL);
1650 pci_disable_device(pci);
1654 spin_lock_init(&emu->reg_lock);
1655 spin_lock_init(&emu->emu_lock);
1656 spin_lock_init(&emu->voice_lock);
1657 spin_lock_init(&emu->synth_lock);
1658 spin_lock_init(&emu->memblk_lock);
1659 mutex_init(&emu->fx8010.lock);
1660 INIT_LIST_HEAD(&emu->mapped_link_head);
1661 INIT_LIST_HEAD(&emu->mapped_order_link_head);
1665 emu->get_synth_voice = NULL;
1666 /* read revision & serial */
1667 emu->revision = pci->revision;
1668 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
1669 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
1670 snd_printdd("vendor=0x%x, device=0x%x, subsystem_vendor_id=0x%x, subsystem_id=0x%x\n",pci->vendor, pci->device, emu->serial, emu->model);
1672 for (c = emu_chip_details; c->vendor; c++) {
1673 if (c->vendor == pci->vendor && c->device == pci->device) {
1675 if (c->subsystem && (c->subsystem == subsystem) ) {
1679 if (c->subsystem && (c->subsystem != emu->serial) )
1681 if (c->revision && c->revision != emu->revision)
1687 if (c->vendor == 0) {
1688 snd_printk(KERN_ERR "emu10k1: Card not recognised\n");
1690 pci_disable_device(pci);
1693 emu->card_capabilities = c;
1694 if (c->subsystem && !subsystem)
1695 snd_printdd("Sound card name=%s\n", c->name);
1697 snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x. Forced to subsytem=0x%x\n",
1698 c->name, pci->vendor, pci->device, emu->serial, c->subsystem);
1700 snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x.\n",
1701 c->name, pci->vendor, pci->device, emu->serial);
1703 if (!*card->id && c->id) {
1705 strlcpy(card->id, c->id, sizeof(card->id));
1707 for (i = 0; i < snd_ecards_limit; i++) {
1708 if (snd_cards[i] && !strcmp(snd_cards[i]->id, card->id))
1711 if (i >= snd_ecards_limit)
1714 if (n >= SNDRV_CARDS)
1716 snprintf(card->id, sizeof(card->id), "%s_%d", c->id, n);
1720 is_audigy = emu->audigy = c->emu10k2_chip;
1722 /* set the DMA transfer mask */
1723 emu->dma_mask = is_audigy ? AUDIGY_DMA_MASK : EMU10K1_DMA_MASK;
1724 if (pci_set_dma_mask(pci, emu->dma_mask) < 0 ||
1725 pci_set_consistent_dma_mask(pci, emu->dma_mask) < 0) {
1726 snd_printk(KERN_ERR "architecture does not support PCI busmaster DMA with mask 0x%lx\n", emu->dma_mask);
1728 pci_disable_device(pci);
1732 emu->gpr_base = A_FXGPREGBASE;
1734 emu->gpr_base = FXGPREGBASE;
1736 if ((err = pci_request_regions(pci, "EMU10K1")) < 0) {
1738 pci_disable_device(pci);
1741 emu->port = pci_resource_start(pci, 0);
1743 if (request_irq(pci->irq, snd_emu10k1_interrupt, IRQF_SHARED,
1748 emu->irq = pci->irq;
1750 emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
1751 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1752 32 * 1024, &emu->ptb_pages) < 0) {
1757 emu->page_ptr_table = vmalloc(emu->max_cache_pages * sizeof(void *));
1758 emu->page_addr_table = vmalloc(emu->max_cache_pages *
1759 sizeof(unsigned long));
1760 if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) {
1765 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1766 EMUPAGESIZE, &emu->silent_page) < 0) {
1770 emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
1771 if (emu->memhdr == NULL) {
1775 emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) -
1776 sizeof(struct snd_util_memblk);
1778 pci_set_master(pci);
1780 emu->fx8010.fxbus_mask = 0x303f;
1781 if (extin_mask == 0)
1782 extin_mask = 0x3fcf;
1783 if (extout_mask == 0)
1784 extout_mask = 0x7fff;
1785 emu->fx8010.extin_mask = extin_mask;
1786 emu->fx8010.extout_mask = extout_mask;
1787 emu->enable_ir = enable_ir;
1789 if (emu->card_capabilities->ca_cardbus_chip) {
1790 if ((err = snd_emu10k1_cardbus_init(emu)) < 0)
1793 if (emu->card_capabilities->ecard) {
1794 if ((err = snd_emu10k1_ecard_init(emu)) < 0)
1796 } else if (emu->card_capabilities->emu1010) {
1797 if ((err = snd_emu10k1_emu1010_init(emu)) < 0) {
1798 snd_emu10k1_free(emu);
1802 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1803 does not support this, it shouldn't do any harm */
1804 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
1807 /* initialize TRAM setup */
1808 emu->fx8010.itram_size = (16 * 1024)/2;
1809 emu->fx8010.etram_pages.area = NULL;
1810 emu->fx8010.etram_pages.bytes = 0;
1813 * Init to 0x02109204 :
1814 * Clock accuracy = 0 (1000ppm)
1815 * Sample Rate = 2 (48kHz)
1816 * Audio Channel = 1 (Left of 2)
1817 * Source Number = 0 (Unspecified)
1818 * Generation Status = 1 (Original for Cat Code 12)
1819 * Cat Code = 12 (Digital Signal Mixer)
1821 * Emphasis = 0 (None)
1822 * CP = 1 (Copyright unasserted)
1823 * AN = 0 (Audio data)
1826 emu->spdif_bits[0] = emu->spdif_bits[1] =
1827 emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
1828 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
1829 SPCS_GENERATIONSTATUS | 0x00001200 |
1830 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
1832 emu->reserved_page = (struct snd_emu10k1_memblk *)
1833 snd_emu10k1_synth_alloc(emu, 4096);
1834 if (emu->reserved_page)
1835 emu->reserved_page->map_locked = 1;
1837 /* Clear silent pages and set up pointers */
1838 memset(emu->silent_page.area, 0, PAGE_SIZE);
1839 silent_page = emu->silent_page.addr << 1;
1840 for (idx = 0; idx < MAXPAGES; idx++)
1841 ((u32 *)emu->ptb_pages.area)[idx] = cpu_to_le32(silent_page | idx);
1843 /* set up voice indices */
1844 for (idx = 0; idx < NUM_G; idx++) {
1845 emu->voices[idx].emu = emu;
1846 emu->voices[idx].number = idx;
1849 if ((err = snd_emu10k1_init(emu, enable_ir, 0)) < 0)
1852 if ((err = alloc_pm_buffer(emu)) < 0)
1856 /* Initialize the effect engine */
1857 if ((err = snd_emu10k1_init_efx(emu)) < 0)
1859 snd_emu10k1_audio_enable(emu);
1861 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops)) < 0)
1864 #ifdef CONFIG_PROC_FS
1865 snd_emu10k1_proc_init(emu);
1868 snd_card_set_dev(card, &pci->dev);
1873 snd_emu10k1_free(emu);
1878 static unsigned char saved_regs[] = {
1879 CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP,
1880 FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL,
1881 ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2,
1882 TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA,
1883 MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2,
1884 SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX,
1887 static unsigned char saved_regs_audigy[] = {
1888 A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_SAMPLE_RATE,
1889 A_FXRT2, A_SENDAMOUNTS, A_FXRT1,
1893 static int __devinit alloc_pm_buffer(struct snd_emu10k1 *emu)
1897 size = ARRAY_SIZE(saved_regs);
1899 size += ARRAY_SIZE(saved_regs_audigy);
1900 emu->saved_ptr = vmalloc(4 * NUM_G * size);
1901 if (! emu->saved_ptr)
1903 if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0)
1905 if (emu->card_capabilities->ca0151_chip &&
1906 snd_p16v_alloc_pm_buffer(emu) < 0)
1911 static void free_pm_buffer(struct snd_emu10k1 *emu)
1913 vfree(emu->saved_ptr);
1914 snd_emu10k1_efx_free_pm_buffer(emu);
1915 if (emu->card_capabilities->ca0151_chip)
1916 snd_p16v_free_pm_buffer(emu);
1919 void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu)
1925 val = emu->saved_ptr;
1926 for (reg = saved_regs; *reg != 0xff; reg++)
1927 for (i = 0; i < NUM_G; i++, val++)
1928 *val = snd_emu10k1_ptr_read(emu, *reg, i);
1930 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
1931 for (i = 0; i < NUM_G; i++, val++)
1932 *val = snd_emu10k1_ptr_read(emu, *reg, i);
1935 emu->saved_a_iocfg = inl(emu->port + A_IOCFG);
1936 emu->saved_hcfg = inl(emu->port + HCFG);
1939 void snd_emu10k1_resume_init(struct snd_emu10k1 *emu)
1941 if (emu->card_capabilities->ca_cardbus_chip)
1942 snd_emu10k1_cardbus_init(emu);
1943 if (emu->card_capabilities->ecard)
1944 snd_emu10k1_ecard_init(emu);
1945 else if (emu->card_capabilities->emu1010)
1946 snd_emu10k1_emu1010_init(emu);
1948 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
1949 snd_emu10k1_init(emu, emu->enable_ir, 1);
1952 void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu)
1958 snd_emu10k1_audio_enable(emu);
1960 /* resore for spdif */
1962 outl(emu->saved_a_iocfg, emu->port + A_IOCFG);
1963 outl(emu->saved_hcfg, emu->port + HCFG);
1965 val = emu->saved_ptr;
1966 for (reg = saved_regs; *reg != 0xff; reg++)
1967 for (i = 0; i < NUM_G; i++, val++)
1968 snd_emu10k1_ptr_write(emu, *reg, i, *val);
1970 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
1971 for (i = 0; i < NUM_G; i++, val++)
1972 snd_emu10k1_ptr_write(emu, *reg, i, *val);