2 * C-Media CMI8788 driver - main driver module
4 * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
7 * This driver is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License, version 2.
10 * This driver is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this driver; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include <linux/delay.h>
21 #include <linux/interrupt.h>
22 #include <linux/mutex.h>
23 #include <linux/pci.h>
24 #include <sound/ac97_codec.h>
25 #include <sound/asoundef.h>
26 #include <sound/core.h>
27 #include <sound/info.h>
28 #include <sound/mpu401.h>
29 #include <sound/pcm.h>
33 MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
34 MODULE_DESCRIPTION("C-Media CMI8788 helper library");
35 MODULE_LICENSE("GPL");
38 static irqreturn_t oxygen_interrupt(int dummy, void *dev_id)
40 struct oxygen *chip = dev_id;
41 unsigned int status, clear, elapsed_streams, i;
43 status = oxygen_read16(chip, OXYGEN_INTERRUPT_STATUS);
47 spin_lock(&chip->reg_lock);
49 clear = status & (OXYGEN_CHANNEL_A |
52 OXYGEN_CHANNEL_SPDIF |
53 OXYGEN_CHANNEL_MULTICH |
55 OXYGEN_INT_SPDIF_IN_DETECT |
58 if (clear & OXYGEN_INT_SPDIF_IN_DETECT)
59 chip->interrupt_mask &= ~OXYGEN_INT_SPDIF_IN_DETECT;
60 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK,
61 chip->interrupt_mask & ~clear);
62 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK,
63 chip->interrupt_mask);
66 elapsed_streams = status & chip->pcm_running;
68 spin_unlock(&chip->reg_lock);
70 for (i = 0; i < PCM_COUNT; ++i)
71 if ((elapsed_streams & (1 << i)) && chip->streams[i])
72 snd_pcm_period_elapsed(chip->streams[i]);
74 if (status & OXYGEN_INT_SPDIF_IN_DETECT) {
75 spin_lock(&chip->reg_lock);
76 i = oxygen_read32(chip, OXYGEN_SPDIF_CONTROL);
77 if (i & OXYGEN_SPDIF_RATE_INT) {
78 oxygen_write32(chip, OXYGEN_SPDIF_CONTROL, i);
79 schedule_work(&chip->spdif_input_bits_work);
81 spin_unlock(&chip->reg_lock);
84 if (status & OXYGEN_INT_GPIO)
87 if ((status & OXYGEN_INT_MIDI) && chip->midi)
88 snd_mpu401_uart_interrupt(0, chip->midi->private_data);
93 static void oxygen_spdif_input_bits_changed(struct work_struct *work)
95 struct oxygen *chip = container_of(work, struct oxygen,
96 spdif_input_bits_work);
98 spin_lock_irq(&chip->reg_lock);
99 oxygen_write32_masked(chip, OXYGEN_SPDIF_CONTROL,
100 OXYGEN_SPDIF_IN_CLOCK_96,
101 OXYGEN_SPDIF_IN_CLOCK_MASK);
102 spin_unlock_irq(&chip->reg_lock);
104 if (!(oxygen_read32(chip, OXYGEN_SPDIF_CONTROL)
105 & OXYGEN_SPDIF_LOCK_STATUS)) {
106 spin_lock_irq(&chip->reg_lock);
107 oxygen_write32_masked(chip, OXYGEN_SPDIF_CONTROL,
108 OXYGEN_SPDIF_IN_CLOCK_192,
109 OXYGEN_SPDIF_IN_CLOCK_MASK);
110 spin_unlock_irq(&chip->reg_lock);
112 if (!(oxygen_read32(chip, OXYGEN_SPDIF_CONTROL)
113 & OXYGEN_SPDIF_LOCK_STATUS)) {
114 spin_lock_irq(&chip->reg_lock);
115 oxygen_write32_masked(chip, OXYGEN_SPDIF_CONTROL,
116 OXYGEN_SPDIF_IN_CLOCK_96,
117 OXYGEN_SPDIF_IN_CLOCK_MASK);
118 spin_unlock_irq(&chip->reg_lock);
122 if (chip->controls[CONTROL_SPDIF_INPUT_BITS]) {
123 spin_lock_irq(&chip->reg_lock);
124 chip->interrupt_mask |= OXYGEN_INT_SPDIF_IN_DETECT;
125 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK,
126 chip->interrupt_mask);
127 spin_unlock_irq(&chip->reg_lock);
129 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
130 &chip->controls[CONTROL_SPDIF_INPUT_BITS]->id);
134 #ifdef CONFIG_PROC_FS
135 static void oxygen_proc_read(struct snd_info_entry *entry,
136 struct snd_info_buffer *buffer)
138 struct oxygen *chip = entry->private_data;
141 snd_iprintf(buffer, "CMI8788\n\n");
142 for (i = 0; i < 0x100; i += 0x10) {
143 snd_iprintf(buffer, "%02x:", i);
144 for (j = 0; j < 0x10; ++j)
145 snd_iprintf(buffer, " %02x", oxygen_read8(chip, i + j));
146 snd_iprintf(buffer, "\n");
148 if (mutex_lock_interruptible(&chip->mutex) < 0)
150 if (chip->has_ac97_0) {
151 snd_iprintf(buffer, "\nAC97\n");
152 for (i = 0; i < 0x80; i += 0x10) {
153 snd_iprintf(buffer, "%02x:", i);
154 for (j = 0; j < 0x10; j += 2)
155 snd_iprintf(buffer, " %04x",
156 oxygen_read_ac97(chip, 0, i + j));
157 snd_iprintf(buffer, "\n");
160 if (chip->has_ac97_1) {
161 snd_iprintf(buffer, "\nAC97 2\n");
162 for (i = 0; i < 0x80; i += 0x10) {
163 snd_iprintf(buffer, "%02x:", i);
164 for (j = 0; j < 0x10; j += 2)
165 snd_iprintf(buffer, " %04x",
166 oxygen_read_ac97(chip, 1, i + j));
167 snd_iprintf(buffer, "\n");
170 mutex_unlock(&chip->mutex);
173 static void __devinit oxygen_proc_init(struct oxygen *chip)
175 struct snd_info_entry *entry;
177 if (!snd_card_proc_new(chip->card, "cmi8788", &entry))
178 snd_info_set_text_ops(entry, chip, oxygen_proc_read);
181 #define oxygen_proc_init(chip)
184 static void __devinit oxygen_init(struct oxygen *chip)
188 chip->dac_routing = 1;
189 for (i = 0; i < 8; ++i)
190 chip->dac_volume[i] = 0xff;
191 chip->spdif_playback_enable = 1;
192 chip->spdif_bits = OXYGEN_SPDIF_C | OXYGEN_SPDIF_ORIGINAL |
193 (IEC958_AES1_CON_PCM_CODER << OXYGEN_SPDIF_CATEGORY_SHIFT);
194 chip->spdif_pcm_bits = chip->spdif_bits;
196 if (oxygen_read8(chip, OXYGEN_REVISION) & OXYGEN_REVISION_2)
201 if (chip->revision == 1)
202 oxygen_set_bits8(chip, OXYGEN_MISC,
203 OXYGEN_MISC_PCI_MEM_W_1_CLOCK);
205 i = oxygen_read16(chip, OXYGEN_AC97_CONTROL);
206 chip->has_ac97_0 = (i & OXYGEN_AC97_CODEC_0) != 0;
207 chip->has_ac97_1 = (i & OXYGEN_AC97_CODEC_1) != 0;
209 oxygen_set_bits8(chip, OXYGEN_FUNCTION,
210 OXYGEN_FUNCTION_RESET_CODEC |
211 chip->model->function_flags);
212 oxygen_write16(chip, OXYGEN_I2S_MULTICH_FORMAT,
213 OXYGEN_RATE_48000 | OXYGEN_I2S_FORMAT_LJUST |
214 OXYGEN_I2S_MCLK_128 | OXYGEN_I2S_BITS_16 |
215 OXYGEN_I2S_MASTER | OXYGEN_I2S_BCLK_64);
216 oxygen_write16(chip, OXYGEN_I2S_A_FORMAT,
217 OXYGEN_RATE_48000 | OXYGEN_I2S_FORMAT_LJUST |
218 OXYGEN_I2S_MCLK_128 | OXYGEN_I2S_BITS_16 |
219 OXYGEN_I2S_MASTER | OXYGEN_I2S_BCLK_64);
220 oxygen_write16(chip, OXYGEN_I2S_B_FORMAT,
221 OXYGEN_RATE_48000 | OXYGEN_I2S_FORMAT_LJUST |
222 OXYGEN_I2S_MCLK_128 | OXYGEN_I2S_BITS_16 |
223 OXYGEN_I2S_MASTER | OXYGEN_I2S_BCLK_64);
224 oxygen_write16(chip, OXYGEN_I2S_C_FORMAT,
225 OXYGEN_RATE_48000 | OXYGEN_I2S_FORMAT_LJUST |
226 OXYGEN_I2S_MCLK_128 | OXYGEN_I2S_BITS_16 |
227 OXYGEN_I2S_MASTER | OXYGEN_I2S_BCLK_64);
228 oxygen_set_bits32(chip, OXYGEN_SPDIF_CONTROL, OXYGEN_SPDIF_RATE_MASK);
229 oxygen_write32(chip, OXYGEN_SPDIF_OUTPUT_BITS, chip->spdif_bits);
230 oxygen_write16(chip, OXYGEN_PLAY_ROUTING,
231 OXYGEN_PLAY_MULTICH_I2S_DAC | OXYGEN_PLAY_SPDIF_SPDIF |
232 (0 << OXYGEN_PLAY_DAC0_SOURCE_SHIFT) |
233 (1 << OXYGEN_PLAY_DAC1_SOURCE_SHIFT) |
234 (2 << OXYGEN_PLAY_DAC2_SOURCE_SHIFT) |
235 (3 << OXYGEN_PLAY_DAC3_SOURCE_SHIFT));
236 oxygen_write8(chip, OXYGEN_REC_ROUTING,
237 OXYGEN_REC_A_ROUTE_I2S_ADC_1 |
238 OXYGEN_REC_B_ROUTE_AC97_1 |
239 OXYGEN_REC_C_ROUTE_SPDIF);
240 oxygen_write8(chip, OXYGEN_ADC_MONITOR, 0);
241 oxygen_write8(chip, OXYGEN_A_MONITOR_ROUTING,
242 (0 << OXYGEN_A_MONITOR_ROUTE_0_SHIFT) |
243 (1 << OXYGEN_A_MONITOR_ROUTE_1_SHIFT) |
244 (2 << OXYGEN_A_MONITOR_ROUTE_2_SHIFT) |
245 (3 << OXYGEN_A_MONITOR_ROUTE_3_SHIFT));
247 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, 0);
248 oxygen_write16(chip, OXYGEN_DMA_STATUS, 0);
250 oxygen_write8(chip, OXYGEN_AC97_INTERRUPT_MASK, 0);
251 if (chip->has_ac97_0) {
252 oxygen_clear_bits16(chip, OXYGEN_AC97_OUT_CONFIG,
253 OXYGEN_AC97_CODEC0_FRONTL |
254 OXYGEN_AC97_CODEC0_FRONTR |
255 OXYGEN_AC97_CODEC0_SIDEL |
256 OXYGEN_AC97_CODEC0_SIDER |
257 OXYGEN_AC97_CODEC0_CENTER |
258 OXYGEN_AC97_CODEC0_BASE |
259 OXYGEN_AC97_CODEC0_REARL |
260 OXYGEN_AC97_CODEC0_REARR);
261 oxygen_set_bits16(chip, OXYGEN_AC97_IN_CONFIG,
262 OXYGEN_AC97_CODEC0_LINEL |
263 OXYGEN_AC97_CODEC0_LINER);
264 oxygen_write_ac97(chip, 0, AC97_RESET, 0);
266 oxygen_ac97_set_bits(chip, 0, CM9780_GPIO_SETUP,
267 CM9780_GPIO0IO | CM9780_GPIO1IO);
268 oxygen_ac97_set_bits(chip, 0, CM9780_MIXER,
269 CM9780_BSTSEL | CM9780_STRO_MIC |
270 CM9780_MIX2FR | CM9780_PCBSW);
271 oxygen_ac97_set_bits(chip, 0, CM9780_JACK,
272 CM9780_RSOE | CM9780_CBOE |
273 CM9780_SSOE | CM9780_FROE |
274 CM9780_MIC2MIC | CM9780_LI2LI);
275 oxygen_write_ac97(chip, 0, AC97_MASTER, 0x0000);
276 oxygen_write_ac97(chip, 0, AC97_PC_BEEP, 0x8000);
277 oxygen_write_ac97(chip, 0, AC97_MIC, 0x8808);
278 oxygen_write_ac97(chip, 0, AC97_LINE, 0x0808);
279 oxygen_write_ac97(chip, 0, AC97_CD, 0x8808);
280 oxygen_write_ac97(chip, 0, AC97_VIDEO, 0x8808);
281 oxygen_write_ac97(chip, 0, AC97_AUX, 0x8808);
282 oxygen_write_ac97(chip, 0, AC97_REC_GAIN, 0x8000);
283 oxygen_write_ac97(chip, 0, AC97_CENTER_LFE_MASTER, 0x8080);
284 oxygen_write_ac97(chip, 0, AC97_SURROUND_MASTER, 0x8080);
285 oxygen_ac97_clear_bits(chip, 0,
286 CM9780_GPIO_STATUS, CM9780_GPO0);
287 /* power down unused ADCs and DACs */
288 oxygen_ac97_set_bits(chip, 0, AC97_POWERDOWN,
289 AC97_PD_PR0 | AC97_PD_PR1);
290 oxygen_ac97_set_bits(chip, 0, AC97_EXTENDED_STATUS,
291 AC97_EA_PRI | AC97_EA_PRJ | AC97_EA_PRK);
295 static void oxygen_card_free(struct snd_card *card)
297 struct oxygen *chip = card->private_data;
299 spin_lock_irq(&chip->reg_lock);
300 chip->interrupt_mask = 0;
301 chip->pcm_running = 0;
302 oxygen_write16(chip, OXYGEN_DMA_STATUS, 0);
303 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, 0);
304 spin_unlock_irq(&chip->reg_lock);
305 if (chip->irq >= 0) {
306 free_irq(chip->irq, chip);
307 synchronize_irq(chip->irq);
309 flush_scheduled_work();
310 chip->model->cleanup(chip);
311 mutex_destroy(&chip->mutex);
312 pci_release_regions(chip->pci);
313 pci_disable_device(chip->pci);
316 int __devinit oxygen_pci_probe(struct pci_dev *pci, int index, char *id,
317 int midi, const struct oxygen_model *model)
319 struct snd_card *card;
323 card = snd_card_new(index, id, model->owner,
324 sizeof *chip + model->model_data_size);
328 chip = card->private_data;
333 chip->model_data = chip + 1;
334 spin_lock_init(&chip->reg_lock);
335 mutex_init(&chip->mutex);
336 INIT_WORK(&chip->spdif_input_bits_work,
337 oxygen_spdif_input_bits_changed);
339 err = pci_enable_device(pci);
343 err = pci_request_regions(pci, model->chip);
345 snd_printk(KERN_ERR "cannot reserve PCI resources\n");
349 if (!(pci_resource_flags(pci, 0) & IORESOURCE_IO) ||
350 pci_resource_len(pci, 0) < 0x100) {
351 snd_printk(KERN_ERR "invalid PCI I/O range\n");
353 goto err_pci_regions;
355 chip->addr = pci_resource_start(pci, 0);
358 snd_card_set_dev(card, &pci->dev);
359 card->private_free = oxygen_card_free;
364 err = request_irq(pci->irq, oxygen_interrupt, IRQF_SHARED,
367 snd_printk(KERN_ERR "cannot grab interrupt %d\n", pci->irq);
370 chip->irq = pci->irq;
372 strcpy(card->driver, model->chip);
373 strcpy(card->shortname, model->shortname);
374 sprintf(card->longname, "%s (rev %u) at %#lx, irq %i",
375 model->longname, chip->revision, chip->addr, chip->irq);
376 strcpy(card->mixername, model->chip);
377 snd_component_add(card, model->chip);
379 err = oxygen_pcm_init(chip);
383 err = oxygen_mixer_init(chip);
387 oxygen_write8_masked(chip, OXYGEN_MISC,
388 midi ? OXYGEN_MISC_MIDI : 0, OXYGEN_MISC_MIDI);
390 err = snd_mpu401_uart_new(card, 0, MPU401_HW_CMIPCI,
391 chip->addr + OXYGEN_MPU401,
392 MPU401_INFO_INTEGRATED, 0, 0,
398 oxygen_proc_init(chip);
400 spin_lock_irq(&chip->reg_lock);
401 chip->interrupt_mask |= OXYGEN_INT_SPDIF_IN_DETECT;
402 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask);
403 spin_unlock_irq(&chip->reg_lock);
405 err = snd_card_register(card);
409 pci_set_drvdata(pci, card);
413 pci_release_regions(pci);
415 pci_disable_device(pci);
420 EXPORT_SYMBOL(oxygen_pci_probe);
422 void __devexit oxygen_pci_remove(struct pci_dev *pci)
424 snd_card_free(pci_get_drvdata(pci));
425 pci_set_drvdata(pci, NULL);
427 EXPORT_SYMBOL(oxygen_pci_remove);