+
+Implementation Details
+----------------------
+
+Future driver development should bear in mind that the following registers have
+different functions on the 627EHF and the 627DHG. Some registers also have
+different power-on default values, but BIOS should already be loading
+appropriate defaults. Note that bank selection must be performed as is currently
+done in the driver for all register addresses.
+
+0x49: only on DHG, selects temperature source for AUX fan, CPU fan0
+0x4a: not completely documented for the EHF and the DHG documentation assigns
+ different behavior to bits 7 and 6, including extending the temperature
+ input selection to SmartFan I, not just SmartFan III. Testing on the EHF
+ will reveal whether they are compatible or not.
+
+0x58: Chip ID: 0xa1=EHF 0xc1=DHG
+0x5e: only on DHG, has bits to enable "current mode" temperature detection and
+ critical temperature protection
+0x45b: only on EHF, bit 3, vin4 alarm (EHF supports 10 inputs, only 9 on DHG)
+0x552: only on EHF, vin4
+0x558: only on EHF, vin4 high limit
+0x559: only on EHF, vin4 low limit
+0x6b: only on DHG, SYS fan critical temperature
+0x6c: only on DHG, CPU fan0 critical temperature
+0x6d: only on DHG, AUX fan critical temperature
+0x6e: only on DHG, CPU fan1 critical temperature
+
+0x50-0x55 and 0x650-0x657 are marked "Test Register" for the EHF, but "Reserved
+ Register" for the DHG
+
+The DHG also supports PECI, where the DHG queries Intel CPU temperatures, and
+the ICH8 southbridge gets that data via PECI from the DHG, so that the
+southbridge drives the fans. And the DHG supports SST, a one-wire serial bus.