Add mcbsp_clks used by other clocks to the clock list.

[linux-2.6-omap-h63xx.git] / arch / arm / mach-omap2 / irq.c

diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index a39d306803002448d86357fa3bd7535be73e0e7f..82375295ee82bc6ed997297d43059e200a88bbff 100644 (file)
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -37,17 +37,15 @@ static struct omap_irq_bank {
 } __attribute__ ((aligned(4))) irq_banks[] = {
        {
                /* MPU INTC */
-               .base_reg       = OMAP24XX_IC_BASE,
+               .base_reg       = 0,
                .nr_irqs        = 96,
-       }, {
-               /* XXX: DSP INTC */
-       }
+       },
 };
 
 /* XXX: FIQ and additional INTC support (only MPU at the moment) */
 static void omap_ack_irq(unsigned int irq)
 {
-       omap_writel(0x1, irq_banks[0].base_reg + INTC_CONTROL);
+       __raw_writel(0x1, irq_banks[0].base_reg + INTC_CONTROL);
 }
 
 static void omap_mask_irq(unsigned int irq)
@@ -60,7 +58,7 @@ static void omap_mask_irq(unsigned int irq)
                irq %= 32;
        }
 
-       omap_writel(1 << irq, irq_banks[0].base_reg + INTC_MIR_SET0 + offset);
+       __raw_writel(1 << irq, irq_banks[0].base_reg + INTC_MIR_SET0 + offset);
 }
 
 static void omap_unmask_irq(unsigned int irq)
@@ -73,7 +71,7 @@ static void omap_unmask_irq(unsigned int irq)
                irq %= 32;
        }
 
-       omap_writel(1 << irq, irq_banks[0].base_reg + INTC_MIR_CLEAR0 + offset);
+       __raw_writel(1 << irq, irq_banks[0].base_reg + INTC_MIR_CLEAR0 + offset);
 }
 
 static void omap_mask_ack_irq(unsigned int irq)
@@ -93,17 +91,20 @@ static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank)
 {
        unsigned long tmp;
 
-       tmp = omap_readl(bank->base_reg + INTC_REVISION) & 0xff;
+       tmp = __raw_readl(bank->base_reg + INTC_REVISION) & 0xff;
        printk(KERN_INFO "IRQ: Found an INTC at 0x%08lx "
                         "(revision %ld.%ld) with %d interrupts\n",
                         bank->base_reg, tmp >> 4, tmp & 0xf, bank->nr_irqs);
 
-       tmp = omap_readl(bank->base_reg + INTC_SYSCONFIG);
+       tmp = __raw_readl(bank->base_reg + INTC_SYSCONFIG);
        tmp |= 1 << 1;  /* soft reset */
-       omap_writel(tmp, bank->base_reg + INTC_SYSCONFIG);
+       __raw_writel(tmp, bank->base_reg + INTC_SYSCONFIG);
 
-       while (!(omap_readl(bank->base_reg + INTC_SYSSTATUS) & 0x1))
+       while (!(__raw_readl(bank->base_reg + INTC_SYSSTATUS) & 0x1))
                /* Wait for reset to complete */;
+
+       /* Enable autoidle */
+       __raw_writel(1 << 0, bank->base_reg + INTC_SYSCONFIG);
 }
 
 void __init omap_init_irq(void)
@@ -115,10 +116,12 @@ void __init omap_init_irq(void)
        for (i = 0; i < ARRAY_SIZE(irq_banks); i++) {
                struct omap_irq_bank *bank = irq_banks + i;
 
-               /* XXX */
-               if (!bank->base_reg)
-                       continue;
-
+               if (cpu_is_omap24xx()) {
+                       bank->base_reg = IO_ADDRESS(OMAP24XX_IC_BASE);
+               }
+               if (cpu_is_omap34xx()) {
+                       bank->base_reg = IO_ADDRESS(OMAP34XX_IC_BASE);
+               }
                omap_irq_bank_init_one(bank);
 
                nr_irqs += bank->nr_irqs;