]> pilppa.org Git - linux-2.6-omap-h63xx.git/blobdiff - arch/arm/plat-omap/dma.c
ARM: OMAP: Enable idlemodes for DMA OCP
[linux-2.6-omap-h63xx.git] / arch / arm / plat-omap / dma.c
index b1d3c7991ffd62917c10872b3be56cf0c91194c5..9c71cbb498c90aaa1ad4b289a22a3b8f630d0872 100644 (file)
@@ -1901,7 +1901,7 @@ static int omap2_dma_handle_ch(int ch)
 /* STATUS register count is from 1-32 while our is 0-31 */
 static irqreturn_t omap2_dma_irq_handler(int irq, void *dev_id)
 {
-       u32 val;
+       u32 val, enable_reg;
        int i;
 
        val = dma_read(IRQSTATUS_L0);
@@ -1910,6 +1910,8 @@ static irqreturn_t omap2_dma_irq_handler(int irq, void *dev_id)
                        printk(KERN_WARNING "Spurious DMA IRQ\n");
                return IRQ_HANDLED;
        }
+       enable_reg = dma_read(IRQENABLE_L0);
+       val &= enable_reg; /* Dispatch only relevant interrupts */
        for (i = 0; i < dma_lch_count && val != 0; i++) {
                if (val & 1)
                        omap2_dma_handle_ch(i);
@@ -2422,6 +2424,19 @@ static int __init omap_init_dma(void)
        if (cpu_class_is_omap2())
                setup_irq(INT_24XX_SDMA_IRQ0, &omap24xx_dma_irq);
 
+       /* Enable smartidle idlemodes and autoidle */
+       if (cpu_is_omap34xx()) {
+               u32 v = dma_read(OCP_SYSCONFIG);
+               v &= ~(DMA_SYSCONFIG_MIDLEMODE_MASK |
+                               DMA_SYSCONFIG_SIDLEMODE_MASK |
+                               DMA_SYSCONFIG_AUTOIDLE);
+               v |= (DMA_SYSCONFIG_MIDLEMODE(DMA_IDLEMODE_SMARTIDLE) |
+                       DMA_SYSCONFIG_SIDLEMODE(DMA_IDLEMODE_SMARTIDLE) |
+                       DMA_SYSCONFIG_AUTOIDLE);
+               dma_write(v , OCP_SYSCONFIG);
+       }
+
+
        /* FIXME: Update LCD DMA to work on 24xx */
        if (cpu_class_is_omap1()) {
                r = request_irq(INT_DMA_LCD, lcd_dma_irq_handler, 0,