Blackfin arch: Check for Anomaly 05000182

[linux-2.6-omap-h63xx.git] / arch / blackfin / Kconfig

diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index 795d0ac67c2192a93c6fd0404bb3e9fed92c45d7..785d8b4fa0cb9dd453a78db16bb409850afe54d9 100644 (file)
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -479,16 +479,6 @@ comment "Memory Setup"
 
 comment "Misc"
 
-config ENET_FLASH_PIN
-       int "PF port/pin used for flash and ethernet sharing"
-       depends on (BFIN533_STAMP)
-       default  0
-       help
-         PF port/pin used for flash and ethernet sharing to allow other PF
-         pins to be used on other platforms without having to touch common
-         code.
-         For example: PF0 --> 0,PF1 --> 1,PF2 --> 2, etc.
-
 choice
        prompt "Blackfin Exception Scratch Register"
        default BFIN_SCRATCH_REG_RETN
@@ -832,6 +822,7 @@ config BANK_0
 config BANK_1
        hex "Bank 1"
        default 0x7BB0
+       default 0x5558 if BF54x
 
 config BANK_2
        hex "Bank 2"
@@ -963,21 +954,22 @@ endchoice
 
 endmenu
 
-if (BF537 || BF533 || BF54x)
-
 menu "CPU Frequency scaling"
 
 source "drivers/cpufreq/Kconfig"
 
-config CPU_FREQ
-       bool
+config CPU_VOLTAGE
+       bool "CPU Voltage scaling"
+       depends on EXPERIMENTAL 
+       depends on CPU_FREQ
        default n
        help
-         If you want to enable this option, you should select the
-         DPMC driver from Character Devices.
-endmenu
+         Say Y here if you want CPU voltage scaling according to the CPU frequency.
+         This option violates the PLL BYPASS recommendation in the Blackfin Processor
+         manuals. There is a theoretical risk that during VDDINT transitions 
+         the PLL may unlock.
 
-endif
+endmenu
 
 source "net/Kconfig"