Merge branch 'linux-2.6'

[linux-2.6-omap-h63xx.git] / arch / blackfin / mach-common / ints-priority-dc.c

diff --git a/arch/blackfin/mach-common/ints-priority-dc.c b/arch/blackfin/mach-common/ints-priority-dc.c
index 6b9fd03ce8355135b7227b9073d2249690aff766..8d18d6b163bbda94c345642e00f42fad1a58477f 100644 (file)
--- a/arch/blackfin/mach-common/ints-priority-dc.c
+++ b/arch/blackfin/mach-common/ints-priority-dc.c
@@ -52,7 +52,13 @@
  * -
  */
 
-unsigned long irq_flags = 0;
+/* Initialize this to an actual value to force it into the .data
+ * section so that we know it is properly initialized at entry into
+ * the kernel but before bss is initialized to zero (which is where
+ * it would live otherwise).  The 0x1f magic represents the IRQs we
+ * cannot actually mask out in hardware.
+ */
+unsigned long irq_flags = 0x1f;
 
 /* The number of spurious interrupts */
 atomic_t num_spurious;
@@ -175,7 +181,6 @@ static struct irq_chip bf561_internal_irqchip = {
        .unmask = bf561_internal_unmask_irq,
 };
 
-#ifdef CONFIG_IRQCHIP_DEMUX_GPIO
 static unsigned short gpio_enabled[gpio_bank(MAX_BLACKFIN_GPIOS)];
 static unsigned short gpio_edge_triggered[gpio_bank(MAX_BLACKFIN_GPIOS)];
 
@@ -217,11 +222,12 @@ static void bf561_gpio_unmask_irq(unsigned int irq)
 static unsigned int bf561_gpio_irq_startup(unsigned int irq)
 {
        unsigned int ret;
+       char buf[8];
        u16 gpionr = irq - IRQ_PF0;
 
        if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) {
-
-               ret = gpio_request(gpionr, NULL);
+               snprintf(buf, sizeof buf, "IRQ %d", irq);
+               ret = gpio_request(gpionr, buf);
                if (ret)
                        return ret;
 
@@ -245,6 +251,7 @@ static int bf561_gpio_irq_type(unsigned int irq, unsigned int type)
 {
 
        unsigned int ret;
+       char buf[8];
        u16 gpionr = irq - IRQ_PF0;
 
 
@@ -260,8 +267,8 @@ static int bf561_gpio_irq_type(unsigned int irq, unsigned int type)
                            IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) {
 
                if (!(gpio_enabled[gpio_bank(gpionr)] & gpio_bit(gpionr))) {
-
-                       ret = gpio_request(gpionr, NULL);
+                       snprintf(buf, sizeof buf, "IRQ %d", irq);
+                       ret = gpio_request(gpionr, buf);
                        if (ret)
                                return ret;
 
@@ -356,7 +363,29 @@ static void bf561_demux_gpio_irq(unsigned int inta_irq,
 
 }
 
-#endif                         /* CONFIG_IRQCHIP_DEMUX_GPIO */
+void __init init_exception_vectors(void)
+{
+       SSYNC();
+
+       /* cannot program in software:
+        * evt0 - emulation (jtag)
+        * evt1 - reset
+        */
+       bfin_write_EVT2(evt_nmi);
+       bfin_write_EVT3(trap);
+       bfin_write_EVT5(evt_ivhw);
+       bfin_write_EVT6(evt_timer);
+       bfin_write_EVT7(evt_evt7);
+       bfin_write_EVT8(evt_evt8);
+       bfin_write_EVT9(evt_evt9);
+       bfin_write_EVT10(evt_evt10);
+       bfin_write_EVT11(evt_evt11);
+       bfin_write_EVT12(evt_evt12);
+       bfin_write_EVT13(evt_evt13);
+       bfin_write_EVT14(evt14_softirq);
+       bfin_write_EVT15(evt_system_call);
+       CSYNC();
+}
 
 /*
  * This function should be called during kernel startup to initialize
@@ -378,49 +407,26 @@ int __init init_arch_irq(void)
 
        init_exception_buff();
 
-#ifndef CONFIG_KGDB
-       bfin_write_EVT0(evt_emulation);
-#endif
-       bfin_write_EVT2(evt_evt2);
-       bfin_write_EVT3(trap);
-       bfin_write_EVT5(evt_ivhw);
-       bfin_write_EVT6(evt_timer);
-       bfin_write_EVT7(evt_evt7);
-       bfin_write_EVT8(evt_evt8);
-       bfin_write_EVT9(evt_evt9);
-       bfin_write_EVT10(evt_evt10);
-       bfin_write_EVT11(evt_evt11);
-       bfin_write_EVT12(evt_evt12);
-       bfin_write_EVT13(evt_evt13);
-       bfin_write_EVT14(evt14_softirq);
-       bfin_write_EVT15(evt_system_call);
-       CSYNC();
-
        for (irq = 0; irq <= SYS_IRQS; irq++) {
                if (irq <= IRQ_CORETMR)
                        set_irq_chip(irq, &bf561_core_irqchip);
                else
                        set_irq_chip(irq, &bf561_internal_irqchip);
-#ifdef CONFIG_IRQCHIP_DEMUX_GPIO
+
                if ((irq != IRQ_PROG0_INTA) &&
-                   (irq != IRQ_PROG1_INTA) && (irq != IRQ_PROG2_INTA)) {
-#endif
+                   (irq != IRQ_PROG1_INTA) &&
+                   (irq != IRQ_PROG2_INTA))
                        set_irq_handler(irq, handle_simple_irq);
-#ifdef CONFIG_IRQCHIP_DEMUX_GPIO
-               } else {
+               else
                        set_irq_chained_handler(irq, bf561_demux_gpio_irq);
-               }
-#endif
-
        }
 
-#ifdef CONFIG_IRQCHIP_DEMUX_GPIO
        for (irq = IRQ_PF0; irq <= IRQ_PF47; irq++) {
                set_irq_chip(irq, &bf561_gpio_irqchip);
                /* if configured as edge, then will be changed to do_edge_IRQ */
                set_irq_handler(irq, handle_level_irq);
        }
-#endif
+
        bfin_write_IMASK(0);
        CSYNC();
        ilat = bfin_read_ILAT();
@@ -445,9 +451,8 @@ int __init init_arch_irq(void)
 }
 
 #ifdef CONFIG_DO_IRQ_L1
-void do_irq(int vec, struct pt_regs *fp)__attribute__((l1_text));
+__attribute__((l1_text))
 #endif
-
 void do_irq(int vec, struct pt_regs *fp)
 {
        if (vec == EVT_IVTMR_P) {