[PATCH] i386: Add machine_ops interface to abstract halting and rebooting

[linux-2.6-omap-h63xx.git] / arch / i386 / kernel / nmi.c

diff --git a/arch/i386/kernel/nmi.c b/arch/i386/kernel/nmi.c
index 9f1e8c1afab75e26daa0ad1ebe6fec79a6a26aec..aef22c881a0d5da802a46098324d9d4fdbef9c4d 100644 (file)
--- a/arch/i386/kernel/nmi.c
+++ b/arch/i386/kernel/nmi.c
@@ -126,7 +126,7 @@ int avail_to_resrv_perfctr_nmi_bit(unsigned int counter)
        int cpu;
        BUG_ON(counter > NMI_MAX_COUNTER_BITS);
        for_each_possible_cpu (cpu) {
-               if (test_bit(counter, &per_cpu(perfctr_nmi_owner, cpu)))
+               if (test_bit(counter, &per_cpu(perfctr_nmi_owner, cpu)[0]))
                        return 0;
        }
        return 1;
@@ -142,7 +142,7 @@ int avail_to_resrv_perfctr_nmi(unsigned int msr)
        BUG_ON(counter > NMI_MAX_COUNTER_BITS);
 
        for_each_possible_cpu (cpu) {
-               if (test_bit(counter, &per_cpu(perfctr_nmi_owner, cpu)))
+               if (test_bit(counter, &per_cpu(perfctr_nmi_owner, cpu)[0]))
                        return 0;
        }
        return 1;
@@ -157,7 +157,7 @@ static int __reserve_perfctr_nmi(int cpu, unsigned int msr)
        counter = nmi_perfctr_msr_to_bit(msr);
        BUG_ON(counter > NMI_MAX_COUNTER_BITS);
 
-       if (!test_and_set_bit(counter, &per_cpu(perfctr_nmi_owner, cpu)))
+       if (!test_and_set_bit(counter, &per_cpu(perfctr_nmi_owner, cpu)[0]))
                return 1;
        return 0;
 }
@@ -171,7 +171,7 @@ static void __release_perfctr_nmi(int cpu, unsigned int msr)
        counter = nmi_perfctr_msr_to_bit(msr);
        BUG_ON(counter > NMI_MAX_COUNTER_BITS);
 
-       clear_bit(counter, &per_cpu(perfctr_nmi_owner, cpu));
+       clear_bit(counter, &per_cpu(perfctr_nmi_owner, cpu)[0]);
 }
 
 int reserve_perfctr_nmi(unsigned int msr)
@@ -365,7 +365,7 @@ static int __init check_nmi_watchdog(void)
                nmi_hz = 1;
 
                if (wd->perfctr_msr == MSR_P6_PERFCTR0 ||
-                   wd->perfctr_msr == MSR_ARCH_PERFMON_PERFCTR0) {
+                   wd->perfctr_msr == MSR_ARCH_PERFMON_PERFCTR1) {
                        nmi_hz = adjust_for_32bit_ctr(nmi_hz);
                }
        }
@@ -799,8 +799,8 @@ static int setup_intel_arch_watchdog(void)
            (ebx & ARCH_PERFMON_UNHALTED_CORE_CYCLES_PRESENT))
                goto fail;
 
-       perfctr_msr = MSR_ARCH_PERFMON_PERFCTR0;
-       evntsel_msr = MSR_ARCH_PERFMON_EVENTSEL0;
+       perfctr_msr = MSR_ARCH_PERFMON_PERFCTR1;
+       evntsel_msr = MSR_ARCH_PERFMON_EVENTSEL1;
 
        if (!__reserve_perfctr_nmi(-1, perfctr_msr))
                goto fail;
@@ -1080,7 +1080,7 @@ __kprobes int nmi_watchdog_tick(struct pt_regs * regs, unsigned reason)
                                write_watchdog_counter(wd->perfctr_msr, NULL);
                        }
                        else if (wd->perfctr_msr == MSR_P6_PERFCTR0 ||
-                                wd->perfctr_msr == MSR_ARCH_PERFMON_PERFCTR0) {
+                                wd->perfctr_msr == MSR_ARCH_PERFMON_PERFCTR1) {
                                /* P6 based Pentium M need to re-unmask
                                 * the apic vector but it doesn't hurt
                                 * other P6 variant.