Merge git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc-merge

[linux-2.6-omap-h63xx.git] / arch / ia64 / sn / pci / pcibr / pcibr_reg.c

diff --git a/arch/ia64/sn/pci/pcibr/pcibr_reg.c b/arch/ia64/sn/pci/pcibr/pcibr_reg.c
index 4f718c3e93d3b47b07c4f3bc130ec88b02cb4198..8b8bbd51d43389f8a108d7599d9d98490a8e15f1 100644 (file)
--- a/arch/ia64/sn/pci/pcibr/pcibr_reg.c
+++ b/arch/ia64/sn/pci/pcibr/pcibr_reg.c
@@ -23,9 +23,9 @@ union br_ptr {
 /*
  * Control Register Access -- Read/Write                            0000_0020
  */
-void pcireg_control_bit_clr(struct pcibus_info *pcibus_info, uint64_t bits)
+void pcireg_control_bit_clr(struct pcibus_info *pcibus_info, u64 bits)
 {
-       union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
+       union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
 
        if (pcibus_info) {
                switch (pcibus_info->pbi_bridge_type) {
@@ -38,14 +38,14 @@ void pcireg_control_bit_clr(struct pcibus_info *pcibus_info, uint64_t bits)
                default:
                        panic
                            ("pcireg_control_bit_clr: unknown bridgetype bridge 0x%p",
-                            (void *)ptr);
+                            ptr);
                }
        }
 }
 
-void pcireg_control_bit_set(struct pcibus_info *pcibus_info, uint64_t bits)
+void pcireg_control_bit_set(struct pcibus_info *pcibus_info, u64 bits)
 {
-       union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
+       union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
 
        if (pcibus_info) {
                switch (pcibus_info->pbi_bridge_type) {
@@ -58,7 +58,7 @@ void pcireg_control_bit_set(struct pcibus_info *pcibus_info, uint64_t bits)
                default:
                        panic
                            ("pcireg_control_bit_set: unknown bridgetype bridge 0x%p",
-                            (void *)ptr);
+                            ptr);
                }
        }
 }
@@ -66,10 +66,10 @@ void pcireg_control_bit_set(struct pcibus_info *pcibus_info, uint64_t bits)
 /*
  * PCI/PCIX Target Flush Register Access -- Read Only              0000_0050
  */
-uint64_t pcireg_tflush_get(struct pcibus_info *pcibus_info)
+u64 pcireg_tflush_get(struct pcibus_info *pcibus_info)
 {
-       union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
-       uint64_t ret = 0;
+       union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
+       u64 ret = 0;
 
        if (pcibus_info) {
                switch (pcibus_info->pbi_bridge_type) {
@@ -82,7 +82,7 @@ uint64_t pcireg_tflush_get(struct pcibus_info *pcibus_info)
                default:
                        panic
                            ("pcireg_tflush_get: unknown bridgetype bridge 0x%p",
-                            (void *)ptr);
+                            ptr);
                }
        }
 
@@ -96,10 +96,10 @@ uint64_t pcireg_tflush_get(struct pcibus_info *pcibus_info)
 /*
  * Interrupt Status Register Access -- Read Only                   0000_0100
  */
-uint64_t pcireg_intr_status_get(struct pcibus_info * pcibus_info)
+u64 pcireg_intr_status_get(struct pcibus_info * pcibus_info)
 {
-       union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
-       uint64_t ret = 0;
+       union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
+       u64 ret = 0;
 
        if (pcibus_info) {
                switch (pcibus_info->pbi_bridge_type) {
@@ -112,7 +112,7 @@ uint64_t pcireg_intr_status_get(struct pcibus_info * pcibus_info)
                default:
                        panic
                            ("pcireg_intr_status_get: unknown bridgetype bridge 0x%p",
-                            (void *)ptr);
+                            ptr);
                }
        }
        return ret;
@@ -121,9 +121,9 @@ uint64_t pcireg_intr_status_get(struct pcibus_info * pcibus_info)
 /*
  * Interrupt Enable Register Access -- Read/Write                   0000_0108
  */
-void pcireg_intr_enable_bit_clr(struct pcibus_info *pcibus_info, uint64_t bits)
+void pcireg_intr_enable_bit_clr(struct pcibus_info *pcibus_info, u64 bits)
 {
-       union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
+       union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
 
        if (pcibus_info) {
                switch (pcibus_info->pbi_bridge_type) {
@@ -131,19 +131,19 @@ void pcireg_intr_enable_bit_clr(struct pcibus_info *pcibus_info, uint64_t bits)
                        __sn_clrq_relaxed(&ptr->tio.cp_int_enable, bits);
                        break;
                case PCIBR_BRIDGETYPE_PIC:
-                       __sn_clrq_relaxed(&ptr->pic.p_int_enable, ~bits);
+                       __sn_clrq_relaxed(&ptr->pic.p_int_enable, bits);
                        break;
                default:
                        panic
                            ("pcireg_intr_enable_bit_clr: unknown bridgetype bridge 0x%p",
-                            (void *)ptr);
+                            ptr);
                }
        }
 }
 
-void pcireg_intr_enable_bit_set(struct pcibus_info *pcibus_info, uint64_t bits)
+void pcireg_intr_enable_bit_set(struct pcibus_info *pcibus_info, u64 bits)
 {
-       union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
+       union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
 
        if (pcibus_info) {
                switch (pcibus_info->pbi_bridge_type) {
@@ -156,7 +156,7 @@ void pcireg_intr_enable_bit_set(struct pcibus_info *pcibus_info, uint64_t bits)
                default:
                        panic
                            ("pcireg_intr_enable_bit_set: unknown bridgetype bridge 0x%p",
-                            (void *)ptr);
+                            ptr);
                }
        }
 }
@@ -165,9 +165,9 @@ void pcireg_intr_enable_bit_set(struct pcibus_info *pcibus_info, uint64_t bits)
  * Intr Host Address Register (int_addr) -- Read/Write  0000_0130 - 0000_0168
  */
 void pcireg_intr_addr_addr_set(struct pcibus_info *pcibus_info, int int_n,
-                              uint64_t addr)
+                              u64 addr)
 {
-       union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
+       union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
 
        if (pcibus_info) {
                switch (pcibus_info->pbi_bridge_type) {
@@ -186,7 +186,7 @@ void pcireg_intr_addr_addr_set(struct pcibus_info *pcibus_info, int int_n,
                default:
                        panic
                            ("pcireg_intr_addr_addr_get: unknown bridgetype bridge 0x%p",
-                            (void *)ptr);
+                            ptr);
                }
        }
 }
@@ -196,7 +196,7 @@ void pcireg_intr_addr_addr_set(struct pcibus_info *pcibus_info, int int_n,
  */
 void pcireg_force_intr_set(struct pcibus_info *pcibus_info, int int_n)
 {
-       union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
+       union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
 
        if (pcibus_info) {
                switch (pcibus_info->pbi_bridge_type) {
@@ -209,7 +209,7 @@ void pcireg_force_intr_set(struct pcibus_info *pcibus_info, int int_n)
                default:
                        panic
                            ("pcireg_force_intr_set: unknown bridgetype bridge 0x%p",
-                            (void *)ptr);
+                            ptr);
                }
        }
 }
@@ -217,10 +217,10 @@ void pcireg_force_intr_set(struct pcibus_info *pcibus_info, int int_n)
 /*
  * Device(x) Write Buffer Flush Reg Access -- Read Only 0000_0240 - 0000_0258
  */
-uint64_t pcireg_wrb_flush_get(struct pcibus_info *pcibus_info, int device)
+u64 pcireg_wrb_flush_get(struct pcibus_info *pcibus_info, int device)
 {
-       union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
-       uint64_t ret = 0;
+       union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
+       u64 ret = 0;
 
        if (pcibus_info) {
                switch (pcibus_info->pbi_bridge_type) {
@@ -233,7 +233,7 @@ uint64_t pcireg_wrb_flush_get(struct pcibus_info *pcibus_info, int device)
                            __sn_readq_relaxed(&ptr->pic.p_wr_req_buf[device]);
                        break;
                default:
-                     panic("pcireg_wrb_flush_get: unknown bridgetype bridge 0x%p", (void *)ptr);
+                     panic("pcireg_wrb_flush_get: unknown bridgetype bridge 0x%p", ptr);
                }
 
        }
@@ -242,9 +242,9 @@ uint64_t pcireg_wrb_flush_get(struct pcibus_info *pcibus_info, int device)
 }
 
 void pcireg_int_ate_set(struct pcibus_info *pcibus_info, int ate_index,
-                       uint64_t val)
+                       u64 val)
 {
-       union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
+       union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
 
        if (pcibus_info) {
                switch (pcibus_info->pbi_bridge_type) {
@@ -257,15 +257,15 @@ void pcireg_int_ate_set(struct pcibus_info *pcibus_info, int ate_index,
                default:
                        panic
                            ("pcireg_int_ate_set: unknown bridgetype bridge 0x%p",
-                            (void *)ptr);
+                            ptr);
                }
        }
 }
 
-uint64_t *pcireg_int_ate_addr(struct pcibus_info *pcibus_info, int ate_index)
+u64 __iomem *pcireg_int_ate_addr(struct pcibus_info *pcibus_info, int ate_index)
 {
-       union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
-       uint64_t *ret = (uint64_t *) 0;
+       union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
+       u64 __iomem *ret = NULL;
 
        if (pcibus_info) {
                switch (pcibus_info->pbi_bridge_type) {
@@ -278,7 +278,7 @@ uint64_t *pcireg_int_ate_addr(struct pcibus_info *pcibus_info, int ate_index)
                default:
                        panic
                            ("pcireg_int_ate_addr: unknown bridgetype bridge 0x%p",
-                            (void *)ptr);
+                            ptr);
                }
        }
        return ret;