Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6 into for-linus

[linux-2.6-omap-h63xx.git] / arch / mips / sgi-ip32 / ip32-setup.c

diff --git a/arch/mips/sgi-ip32/ip32-setup.c b/arch/mips/sgi-ip32/ip32-setup.c
index 57708fe28bd7aa573af4292d7a1669b575b9a69d..c5a5d4a31b4b42f1c7d3c9a2f45cbbe88e16bf01 100644 (file)
--- a/arch/mips/sgi-ip32/ip32-setup.c
+++ b/arch/mips/sgi-ip32/ip32-setup.c
@@ -62,16 +62,10 @@ static inline void str2eaddr(unsigned char *ea, unsigned char *str)
 }
 #endif
 
-#ifdef CONFIG_SERIAL_8250
-#include <linux/tty.h>
-#include <linux/serial.h>
-#include <linux/serial_core.h>
-#endif /* CONFIG_SERIAL_8250 */
-
 /* An arbitrary time; this can be decreased if reliability looks good */
 #define WAIT_MS 10
 
-void __init ip32_time_init(void)
+void __init plat_time_init(void)
 {
        printk(KERN_INFO "Calibrating system timer... ");
        write_c0_count(0);
@@ -81,51 +75,10 @@ void __init ip32_time_init(void)
        printk("%d MHz CPU detected\n", mips_hpt_frequency * 2 / 1000000);
 }
 
-void __init plat_timer_setup(struct irqaction *irq)
-{
-       irq->handler = no_action;
-       setup_irq(IP32_R4K_TIMER_IRQ, irq);
-}
-
 void __init plat_mem_setup(void)
 {
        board_be_init = ip32_be_init;
 
-       rtc_mips_get_time = mc146818_get_cmos_time;
-       rtc_mips_set_mmss = mc146818_set_rtc_mmss;
-
-       board_time_init = ip32_time_init;
-
-#ifdef CONFIG_SERIAL_8250
-       {
-               static struct uart_port o2_serial[2];
-
-               memset(o2_serial, 0, sizeof(o2_serial));
-               o2_serial[0].type       = PORT_16550A;
-               o2_serial[0].line       = 0;
-               o2_serial[0].irq        = MACEISA_SERIAL1_IRQ;
-               o2_serial[0].flags      = UPF_SKIP_TEST;
-               o2_serial[0].uartclk    = 1843200;
-               o2_serial[0].iotype     = UPIO_MEM;
-               o2_serial[0].membase    = (char *)&mace->isa.serial1;
-               o2_serial[0].fifosize   = 14;
-                /* How much to shift register offset by. Each UART register
-                * is replicated over 256 byte space */
-               o2_serial[0].regshift   = 8;
-               o2_serial[1].type       = PORT_16550A;
-               o2_serial[1].line       = 1;
-               o2_serial[1].irq        = MACEISA_SERIAL2_IRQ;
-               o2_serial[1].flags      = UPF_SKIP_TEST;
-               o2_serial[1].uartclk    = 1843200;
-               o2_serial[1].iotype     = UPIO_MEM;
-               o2_serial[1].membase    = (char *)&mace->isa.serial2;
-               o2_serial[1].fifosize   = 14;
-               o2_serial[1].regshift   = 8;
-
-               early_serial_setup(&o2_serial[0]);
-               early_serial_setup(&o2_serial[1]);
-       }
-#endif
 #ifdef CONFIG_SGI_O2MACE_ETH
        {
                char *mac = ArcGetEnvironmentVariable("eaddr");