Merge branch 'master' of /pub/scm/linux/kernel/git/torvalds/linux-2.6

[linux-2.6-omap-h63xx.git] / arch / parisc / kernel / pci.c

diff --git a/arch/parisc/kernel/pci.c b/arch/parisc/kernel/pci.c
index e6a891a0cad05429afd83a4ecfdcd51e33206ebb..6936386c9861a3721aba9a857158e8cc9133743e 100644 (file)
--- a/arch/parisc/kernel/pci.c
+++ b/arch/parisc/kernel/pci.c
@@ -9,7 +9,6 @@
  * Copyright (C) 1999-2001 Hewlett-Packard Company
  * Copyright (C) 1999-2001 Grant Grundler
  */
-#include <linux/config.h>
 #include <linux/eisa.h>
 #include <linux/init.h>
 #include <linux/module.h>
@@ -47,18 +46,17 @@
  * this makes the boot time much longer than necessary.
  * 20ms seems to work for all the HP PCI implementations to date.
  *
- * XXX: turn into a #defined constant in <asm/pci.h> ?
+ * #define pci_post_reset_delay 50
  */
-int pci_post_reset_delay = 50;
 
-struct pci_port_ops *pci_port;
-struct pci_bios_ops *pci_bios;
+struct pci_port_ops *pci_port __read_mostly;
+struct pci_bios_ops *pci_bios __read_mostly;
 
-int pci_hba_count = 0;
+static int pci_hba_count __read_mostly;
 
 /* parisc_pci_hba used by pci_port->in/out() ops to lookup bus data.  */
 #define PCI_HBA_MAX 32
-struct pci_hba_data *parisc_pci_hba[PCI_HBA_MAX];
+static struct pci_hba_data *parisc_pci_hba[PCI_HBA_MAX] __read_mostly;
 
 
 /********************************************************************
@@ -196,36 +194,13 @@ void __init pcibios_init_bus(struct pci_bus *bus)
        pci_write_config_word(dev, PCI_BRIDGE_CONTROL, bridge_ctl);
 }
 
-
-/* KLUGE: Link the child and parent resources - generic PCI didn't */
-static void
-pcibios_link_hba_resources( struct resource *hba_res, struct resource *r)
-{
-       if (!r->parent) {
-               printk(KERN_EMERG "PCI: Tell willy he's wrong\n");
-               r->parent = hba_res;
-
-               /* reverse link is harder *sigh*  */
-               if (r->parent->child) {
-                       if (r->parent->sibling) {
-                               struct resource *next = r->parent->sibling;
-                               while (next->sibling)
-                                        next = next->sibling;
-                               next->sibling = r;
-                       } else {
-                               r->parent->sibling = r;
-                       }
-               } else
-                       r->parent->child = r;
-       }
-}
-
 /* called by drivers/pci/setup-bus.c:pci_setup_bridge().  */
 void __devinit pcibios_resource_to_bus(struct pci_dev *dev,
                struct pci_bus_region *region, struct resource *res)
 {
-       struct pci_bus *bus = dev->bus;
-       struct pci_hba_data *hba = HBA_DATA(bus->bridge->platform_data);
+#ifdef CONFIG_64BIT
+       struct pci_hba_data *hba = HBA_DATA(dev->bus->bridge->platform_data);
+#endif
 
        if (res->flags & IORESOURCE_IO) {
                /*
@@ -244,22 +219,16 @@ void __devinit pcibios_resource_to_bus(struct pci_dev *dev,
        }
 
        DBG_RES("pcibios_resource_to_bus(%02x %s [%lx,%lx])\n",
-               bus->number, res->flags & IORESOURCE_IO ? "IO" : "MEM",
+               dev->bus->number, res->flags & IORESOURCE_IO ? "IO" : "MEM",
                region->start, region->end);
-
-       /* KLUGE ALERT
-       ** if this resource isn't linked to a "parent", then it seems
-       ** to be a child of the HBA - lets link it in.
-       */
-       pcibios_link_hba_resources(&hba->io_space, bus->resource[0]);
-       pcibios_link_hba_resources(&hba->lmmio_space, bus->resource[1]);
 }
 
 void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
                              struct pci_bus_region *region)
 {
-       struct pci_bus *bus = dev->bus;
-       struct pci_hba_data *hba = HBA_DATA(bus->bridge->platform_data);
+#ifdef CONFIG_64BIT
+       struct pci_hba_data *hba = HBA_DATA(dev->bus->bridge->platform_data);
+#endif
 
        if (res->flags & IORESOURCE_MEM) {
                res->start = PCI_HOST_ADDR(hba, region->start);
@@ -287,9 +256,9 @@ EXPORT_SYMBOL(pcibios_bus_to_resource);
  * than res->start.
  */
 void pcibios_align_resource(void *data, struct resource *res,
-                               unsigned long size, unsigned long alignment)
+                               resource_size_t size, resource_size_t alignment)
 {
-       unsigned long mask, align;
+       resource_size_t mask, align;
 
        DBG_RES("pcibios_align_resource(%s, (%p) [%lx,%lx]/%x, 0x%lx, 0x%lx)\n",
                pci_name(((struct pci_dev *) data)),
@@ -318,23 +287,15 @@ void pcibios_align_resource(void *data, struct resource *res,
  */
 int pcibios_enable_device(struct pci_dev *dev, int mask)
 {
-       u16 cmd;
-       int idx;
-
-       pci_read_config_word(dev, PCI_COMMAND, &cmd);
-
-       for (idx = 0; idx < DEVICE_COUNT_RESOURCE; idx++) {
-               struct resource *r = &dev->resource[idx];
+       int err;
+       u16 cmd, old_cmd;
 
-               /* only setup requested resources */
-               if (!(mask & (1<<idx)))
-                       continue;
+       err = pci_enable_resources(dev, mask);
+       if (err < 0)
+               return err;
 
-               if (r->flags & IORESOURCE_IO)
-                       cmd |= PCI_COMMAND_IO;
-               if (r->flags & IORESOURCE_MEM)
-                       cmd |= PCI_COMMAND_MEMORY;
-       }
+       pci_read_config_word(dev, PCI_COMMAND, &cmd);
+       old_cmd = cmd;
 
        cmd |= (PCI_COMMAND_SERR | PCI_COMMAND_PARITY);
 
@@ -343,8 +304,12 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
        if (dev->bus->bridge_ctl & PCI_BRIDGE_CTL_FAST_BACK)
                cmd |= PCI_COMMAND_FAST_BACK;
 #endif
-       DBGC("PCIBIOS: Enabling device %s cmd 0x%04x\n", pci_name(dev), cmd);
-       pci_write_config_word(dev, PCI_COMMAND, cmd);
+
+       if (cmd != old_cmd) {
+               dev_info(&dev->dev, "enabling SERR and PARITY (%04x -> %04x)\n",
+                       old_cmd, cmd);
+               pci_write_config_word(dev, PCI_COMMAND, cmd);
+       }
        return 0;
 }