timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
- 32-bit;
};
};
soc8544@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
- #interrupt-cells = <2>;
device_type = "soc";
- ranges = <0 e0000000 00100000>;
- reg = <e0000000 00100000>; // CCSRBAR 1M
+
+
+ ranges = <00001000 e0001000 000ff000
+ 80000000 80000000 20000000
+ a0000000 a0000000 10000000
+ b0000000 b0000000 00100000
+ c0000000 c0000000 20000000
+ b0100000 b0100000 00100000
+ e1000000 e1000000 00010000
+ e1010000 e1010000 00010000
+ e1020000 e1020000 00010000>;
+ reg = <e0000000 00001000>; // CCSRBAR 1M
bus-frequency = <0>; // Filled out by uboot.
memory-controller@2000 {
interrupt-parent = <&mpic>;
interrupts = <18 2>;
bus-range = <0 ff>;
- ranges = <02000000 0 80000000 80000000 0 10000000
- 01000000 0 00000000 e2000000 0 00800000>;
+ ranges = <02000000 0 c0000000 c0000000 0 20000000
+ 01000000 0 00000000 e1000000 0 00010000>;
clock-frequency = <3f940aa>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
reg = <9000 1000>;
bus-range = <0 ff>;
- ranges = <02000000 0 90000000 90000000 0 10000000
- 01000000 0 00000000 e3000000 0 00800000>;
+ ranges = <02000000 0 80000000 80000000 0 20000000
+ 01000000 0 00000000 e1010000 0 00010000>;
clock-frequency = <1fca055>;
interrupt-parent = <&mpic>;
interrupts = <1a 2>;
reg = <a000 1000>;
bus-range = <0 ff>;
ranges = <02000000 0 a0000000 a0000000 0 10000000
- 01000000 0 00000000 e2800000 0 00800000>;
+ 01000000 0 00000000 e1020000 0 00010000>;
clock-frequency = <1fca055>;
interrupt-parent = <&mpic>;
interrupts = <19 2>;
#address-cells = <3>;
reg = <b000 1000>;
bus-range = <0 ff>;
- ranges = <02000000 0 b0000000 b0000000 0 10000000
- 01000000 0 00000000 e3800000 0 00800000>;
+ ranges = <02000000 0 b0000000 b0000000 0 00100000
+ 01000000 0 00000000 b0100000 0 00100000>;
clock-frequency = <1fca055>;
interrupt-parent = <&mpic>;
interrupts = <1b 2>;
- interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map-mask = <fb00 0 0 0>;
interrupt-map = <
-
- // IDSEL 0x1a
- d000 0 0 1 &i8259 6 2
- d000 0 0 2 &i8259 3 2
- d000 0 0 3 &i8259 4 2
- d000 0 0 4 &i8259 5 2
-
- // IDSEL 0x1b
- d800 0 0 1 &i8259 5 2
- d800 0 0 2 &i8259 0 0
- d800 0 0 3 &i8259 0 0
- d800 0 0 4 &i8259 0 0
-
// IDSEL 0x1c USB
- e000 0 0 1 &i8259 9 2
- e000 0 0 2 &i8259 a 2
- e000 0 0 3 &i8259 c 2
- e000 0 0 4 &i8259 7 2
+ e000 0 0 0 &i8259 c 2
+ e100 0 0 0 &i8259 9 2
+ e200 0 0 0 &i8259 a 2
+ e300 0 0 0 &i8259 b 2
// IDSEL 0x1d Audio
- e800 0 0 1 &i8259 9 2
- e800 0 0 2 &i8259 a 2
- e800 0 0 3 &i8259 b 2
- e800 0 0 4 &i8259 0 0
+ e800 0 0 0 &i8259 6 2
// IDSEL 0x1e Legacy
- f000 0 0 1 &i8259 c 2
- f000 0 0 2 &i8259 0 0
- f000 0 0 3 &i8259 0 0
- f000 0 0 4 &i8259 0 0
+ f000 0 0 0 &i8259 7 2
+ f100 0 0 0 &i8259 7 2
// IDSEL 0x1f IDE/SATA
- f800 0 0 1 &i8259 6 2
- f800 0 0 2 &i8259 0 0
- f800 0 0 3 &i8259 0 0
- f800 0 0 4 &i8259 0 0
+ f800 0 0 0 &i8259 e 2
+ f900 0 0 0 &i8259 5 2
>;
uli1575@0 {
reg = <0 0 0 0 0>;
#address-cells = <3>;
ranges = <02000000 0 b0000000
02000000 0 b0000000
- 0 10000000
+ 0 00100000
01000000 0 00000000
01000000 0 00000000
- 0 00080000>;
+ 0 00100000>;
pci_bridge@0 {
reg = <0 0 0 0 0>;
#address-cells = <3>;
ranges = <02000000 0 b0000000
02000000 0 b0000000
- 0 20000000
+ 0 00100000
01000000 0 00000000
01000000 0 00000000
- 0 00100000>;
+ 0 00100000>;
isa@1e {
device_type = "isa";
#size-cells = <1>;
#address-cells = <2>;
reg = <f000 0 0 0 0>;
- ranges = <1 0 01000000 0 0
+ ranges = <1 0
+ 01000000 0 0
00001000>;
interrupt-parent = <&i8259>;
reg = <1 20 2
1 a0 2
1 4d0 2>;
- clock-frequency = <0>;
interrupt-controller;
device_type = "interrupt-controller";
#address-cells = <0>;
#interrupt-cells = <2>;
- built-in;
compatible = "chrp,iic";
interrupts = <9 2>;
- interrupt-parent =
- <&mpic>;
+ interrupt-parent = <&mpic>;
};
i8042@60 {
#address-cells = <1>;
reg = <1 60 1 1 64 1>;
interrupts = <1 3 c 3>;
- interrupt-parent =
- <&i8259>;
+ interrupt-parent = <&i8259>;
keyboard@0 {
reg = <0>;
};
rtc@70 {
- compatible =
- "pnpPNP,b00";
+ compatible = "pnpPNP,b00";
reg = <1 70 2>;
};
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <40000 40000>;
- built-in;
compatible = "chrp,open-pic";
device_type = "open-pic";
big-endian;