Merge master.kernel.org:/home/rmk/linux-2.6-arm

[linux-2.6-omap-h63xx.git] / arch / ppc64 / kernel / cpu_setup_power4.S

diff --git a/arch/ppc64/kernel/cpu_setup_power4.S b/arch/ppc64/kernel/cpu_setup_power4.S
index 42fc08cf87a03059b8d9bd4fc6331ea495cf5798..1fb673c511ff504972e0568fbfaf35d88ab290a6 100644 (file)
--- a/arch/ppc64/kernel/cpu_setup_power4.S
+++ b/arch/ppc64/kernel/cpu_setup_power4.S
@@ -12,10 +12,9 @@
 #include <linux/config.h>
 #include <asm/processor.h>
 #include <asm/page.h>
-#include <asm/ppc_asm.h>
 #include <asm/cputable.h>
 #include <asm/ppc_asm.h>
-#include <asm/offsets.h>
+#include <asm/asm-offsets.h>
 #include <asm/cache.h>
 
 _GLOBAL(__970_cpu_preinit)
@@ -31,10 +30,13 @@ _GLOBAL(__970_cpu_preinit)
         */
        mfspr   r0,SPRN_PVR
        srwi    r0,r0,16
-       cmpwi   cr0,r0,0x39
-       cmpwi   cr1,r0,0x3c
-       cror    4*cr0+eq,4*cr0+eq,4*cr1+eq
+       cmpwi   r0,0x39
+       beq     1f
+       cmpwi   r0,0x3c
+       beq     1f
+       cmpwi   r0,0x44
        bnelr
+1:
 
        /* Make sure HID4:rm_ci is off before MMU is turned off, that large
         * pages are enabled with HID4:61 and clear HID5:DCBZ_size and
@@ -133,12 +135,14 @@ _GLOBAL(__save_cpu_setup)
        /* We only deal with 970 for now */
        mfspr   r0,SPRN_PVR
        srwi    r0,r0,16
-       cmpwi   cr0,r0,0x39
-       cmpwi   cr1,r0,0x3c
-       cror    4*cr0+eq,4*cr0+eq,4*cr1+eq
-       bne     1f
-
-       /* Save HID0,1,4 and 5 */
+       cmpwi   r0,0x39
+       beq     1f
+       cmpwi   r0,0x3c
+       beq     1f
+       cmpwi   r0,0x44
+       bne     2f
+
+1:     /* Save HID0,1,4 and 5 */
        mfspr   r3,SPRN_HID0
        std     r3,CS_HID0(r5)
        mfspr   r3,SPRN_HID1
@@ -148,7 +152,7 @@ _GLOBAL(__save_cpu_setup)
        mfspr   r3,SPRN_HID5
        std     r3,CS_HID5(r5)
        
-1:
+2:
        mtcr    r7
        blr
 
@@ -165,12 +169,14 @@ _GLOBAL(__restore_cpu_setup)
        /* We only deal with 970 for now */
        mfspr   r0,SPRN_PVR
        srwi    r0,r0,16
-       cmpwi   cr0,r0,0x39
-       cmpwi   cr1,r0,0x3c
-       cror    4*cr0+eq,4*cr0+eq,4*cr1+eq
-       bne     1f
+       cmpwi   r0,0x39
+       beq     1f
+       cmpwi   r0,0x3c
+       beq     1f
+       cmpwi   r0,0x44
+       bnelr
 
-       /* Before accessing memory, we make sure rm_ci is clear */
+1:     /* Before accessing memory, we make sure rm_ci is clear */
        li      r0,0
        mfspr   r3,SPRN_HID4
        rldimi  r3,r0,40,23     /* clear bit 23 (rm_ci) */
@@ -223,6 +229,5 @@ _GLOBAL(__restore_cpu_setup)
        mtspr   SPRN_HID5,r3
        sync
        isync
-1:
        blr