]> pilppa.org Git - linux-2.6-omap-h63xx.git/blobdiff - arch/x86/kvm/svm.c
Merge git://git.infradead.org/~dedekind/ubi-2.6
[linux-2.6-omap-h63xx.git] / arch / x86 / kvm / svm.c
index de755cb1431dcef84617b04e29eacb5a06fc59d0..1a582f1090e895aaa19634aa21d02ccf6c1584f0 100644 (file)
@@ -792,6 +792,10 @@ static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
        vcpu->arch.cr0 = cr0;
        cr0 |= X86_CR0_PG | X86_CR0_WP;
        cr0 &= ~(X86_CR0_CD | X86_CR0_NW);
+       if (!vcpu->fpu_active) {
+               svm->vmcb->control.intercept_exceptions |= (1 << NM_VECTOR);
+               cr0 |= X86_CR0_TS;
+       }
        svm->vmcb->save.cr0 = cr0;
 }
 
@@ -1096,6 +1100,24 @@ static int svm_get_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 *data)
        case MSR_IA32_SYSENTER_ESP:
                *data = svm->vmcb->save.sysenter_esp;
                break;
+       /* Nobody will change the following 5 values in the VMCB so
+          we can safely return them on rdmsr. They will always be 0
+          until LBRV is implemented. */
+       case MSR_IA32_DEBUGCTLMSR:
+               *data = svm->vmcb->save.dbgctl;
+               break;
+       case MSR_IA32_LASTBRANCHFROMIP:
+               *data = svm->vmcb->save.br_from;
+               break;
+       case MSR_IA32_LASTBRANCHTOIP:
+               *data = svm->vmcb->save.br_to;
+               break;
+       case MSR_IA32_LASTINTFROMIP:
+               *data = svm->vmcb->save.last_excp_from;
+               break;
+       case MSR_IA32_LASTINTTOIP:
+               *data = svm->vmcb->save.last_excp_to;
+               break;
        default:
                return kvm_get_msr_common(vcpu, ecx, data);
        }
@@ -1156,6 +1178,10 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 data)
        case MSR_IA32_SYSENTER_ESP:
                svm->vmcb->save.sysenter_esp = data;
                break;
+       case MSR_IA32_DEBUGCTLMSR:
+               pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
+                               __FUNCTION__, data);
+               break;
        case MSR_K7_EVNTSEL0:
        case MSR_K7_EVNTSEL1:
        case MSR_K7_EVNTSEL2: