Merge branch 'linus' of master.kernel.org:/pub/scm/linux/kernel/git/perex/alsa

[linux-2.6-omap-h63xx.git] / drivers / char / watchdog / booke_wdt.c

diff --git a/drivers/char/watchdog/booke_wdt.c b/drivers/char/watchdog/booke_wdt.c
index 488902231cc237ec24cd76568af57c186bc6d12d..0e23f29f71abb42f27d38d4175f8dd5c91ee5730 100644 (file)
--- a/drivers/char/watchdog/booke_wdt.c
+++ b/drivers/char/watchdog/booke_wdt.c
@@ -35,7 +35,7 @@
 #ifdef CONFIG_FSL_BOOKE
 #define WDT_PERIOD_DEFAULT 63  /* Ex. wdt_period=28 bus=333Mhz , reset=~40sec */
 #else
-#define WDT_PERIOD_DEFAULT 4   /* Refer to the PPC40x and PPC4xx manuals */
+#define WDT_PERIOD_DEFAULT 3   /* Refer to the PPC40x and PPC4xx manuals */
 #endif                         /* for timing information */
 
 u32 booke_wdt_enabled = 0;
@@ -47,6 +47,14 @@ u32 booke_wdt_period = WDT_PERIOD_DEFAULT;
 #define WDTP(x)                (TCR_WP(x))
 #endif
 
+/*
+ * booke_wdt_ping:
+ */
+static __inline__ void booke_wdt_ping(void)
+{
+       mtspr(SPRN_TSR, TSR_ENW|TSR_WIS);
+}
+
 /*
  * booke_wdt_enable:
  */
@@ -54,20 +62,14 @@ static __inline__ void booke_wdt_enable(void)
 {
        u32 val;
 
+       /* clear status before enabling watchdog */
+       booke_wdt_ping();
        val = mfspr(SPRN_TCR);
        val |= (TCR_WIE|TCR_WRC(WRC_CHIP)|WDTP(booke_wdt_period));
 
        mtspr(SPRN_TCR, val);
 }
 
-/*
- * booke_wdt_ping:
- */
-static __inline__ void booke_wdt_ping(void)
-{
-       mtspr(SPRN_TSR, TSR_ENW|TSR_WIS);
-}
-
 /*
  * booke_wdt_write:
  */