]> pilppa.org Git - linux-2.6-omap-h63xx.git/blobdiff - drivers/gpu/drm/i915/i915_dma.c
Merge branch 'bjorn-cleanups' into release
[linux-2.6-omap-h63xx.git] / drivers / gpu / drm / i915 / i915_dma.c
index 2d797ffe8137c43472f08a3019ecb2052d664ec6..6d21b9e48b89a4624936123fd169d79ce3f35cc9 100644 (file)
@@ -811,7 +811,7 @@ static int i915_set_status_page(struct drm_device *dev, void *data,
        dev_priv->hws_map.flags = 0;
        dev_priv->hws_map.mtrr = 0;
 
-       drm_core_ioremap(&dev_priv->hws_map, dev);
+       drm_core_ioremap_wc(&dev_priv->hws_map, dev);
        if (dev_priv->hws_map.handle == NULL) {
                i915_dma_cleanup(dev);
                dev_priv->status_gfx_addr = 0;
@@ -1090,6 +1090,11 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
         dev_priv->mm.gtt_mapping =
                io_mapping_create_wc(dev->agp->base,
                                     dev->agp->agp_info.aper_size * 1024*1024);
+       if (dev_priv->mm.gtt_mapping == NULL) {
+               ret = -EIO;
+               goto out_rmmap;
+       }
+
        /* Set up a WC MTRR for non-PAT systems.  This is more common than
         * one would think, because the kernel disables PAT on first
         * generation Core chips because WC PAT gets overridden by a UC
@@ -1100,7 +1105,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
                                         1024 * 1024,
                                         MTRR_TYPE_WRCOMB, 1);
        if (dev_priv->mm.gtt_mtrr < 0) {
-               DRM_INFO("MTRR allocation failed\n.  Graphics "
+               DRM_INFO("MTRR allocation failed.  Graphics "
                         "performance may suffer.\n");
        }
 
@@ -1122,7 +1127,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
        if (!I915_NEED_GFX_HWS(dev)) {
                ret = i915_init_phys_hws(dev);
                if (ret != 0)
-                       goto out_rmmap;
+                       goto out_iomapfree;
        }
 
        /* On the 945G/GM, the chipset reports the MSI capability on the
@@ -1161,6 +1166,8 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
 
        return 0;
 
+out_iomapfree:
+       io_mapping_free(dev_priv->mm.gtt_mapping);
 out_rmmap:
        iounmap(dev_priv->regs);
 free_priv: