Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/drzeus/mmc

[linux-2.6-omap-h63xx.git] / drivers / ide / pci / cmd64x.c

diff --git a/drivers/ide/pci/cmd64x.c b/drivers/ide/pci/cmd64x.c
index 08674711d0895c6fae3476cba5d02a2d1f351541..ce58bfcdb3c6c645c51b70321d799dfa0157524b 100644 (file)
--- a/drivers/ide/pci/cmd64x.c
+++ b/drivers/ide/pci/cmd64x.c
@@ -69,7 +69,7 @@ static u8 quantize_timing(int timing, int quant)
 static void program_cycle_times (ide_drive_t *drive, int cycle_time, int active_time)
 {
        struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
-       int clock_time = 1000 / (ide_pci_clk ? ide_pci_clk : system_bus_clock());
+       int clock_time = 1000 / (ide_pci_clk ? ide_pci_clk : 33);
        u8  cycle_count, active_count, recovery_count, drwtim;
        static const u8 recovery_values[] =
                {15, 15, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 0};
@@ -116,6 +116,7 @@ static void cmd64x_tune_pio(ide_drive_t *drive, const u8 pio)
 {
        ide_hwif_t *hwif        = HWIF(drive);
        struct pci_dev *dev     = to_pci_dev(hwif->dev);
+       struct ide_timing *t    = ide_timing_find_mode(XFER_PIO_0 + pio);
        unsigned int cycle_time;
        u8 setup_count, arttim = 0;
 
@@ -124,11 +125,10 @@ static void cmd64x_tune_pio(ide_drive_t *drive, const u8 pio)
 
        cycle_time = ide_pio_cycle_time(drive, pio);
 
-       program_cycle_times(drive, cycle_time,
-                           ide_pio_timings[pio].active_time);
+       program_cycle_times(drive, cycle_time, t->active);
 
-       setup_count = quantize_timing(ide_pio_timings[pio].setup_time,
-                       1000 / (ide_pci_clk ? ide_pci_clk : system_bus_clock()));
+       setup_count = quantize_timing(t->setup,
+                       1000 / (ide_pci_clk ? ide_pci_clk : 33));
 
        /*
         * The primary channel has individual address setup timing registers
@@ -262,7 +262,7 @@ static int cmd648_dma_test_irq(ide_drive_t *drive)
        unsigned long base      = hwif->dma_base - (hwif->channel * 8);
        u8 irq_mask             = hwif->channel ? MRDMODE_INTR_CH1 :
                                                  MRDMODE_INTR_CH0;
-       u8 dma_stat             = inb(hwif->dma_status);
+       u8 dma_stat             = inb(hwif->dma_base + ATA_DMA_STATUS);
        u8 mrdmode              = inb(base + 1);
 
 #ifdef DEBUG
@@ -286,7 +286,7 @@ static int cmd64x_dma_test_irq(ide_drive_t *drive)
        int irq_reg             = hwif->channel ? ARTTIM23 : CFR;
        u8  irq_mask            = hwif->channel ? ARTTIM23_INTR_CH1 :
                                                  CFR_INTR_CH0;
-       u8  dma_stat            = inb(hwif->dma_status);
+       u8  dma_stat            = inb(hwif->dma_base + ATA_DMA_STATUS);
        u8  irq_stat            = 0;
 
        (void) pci_read_config_byte(dev, irq_reg, &irq_stat);
@@ -317,13 +317,13 @@ static int cmd646_1_dma_end(ide_drive_t *drive)
 
        drive->waiting_for_dma = 0;
        /* get DMA status */
-       dma_stat = inb(hwif->dma_status);
+       dma_stat = inb(hwif->dma_base + ATA_DMA_STATUS);
        /* read DMA command state */
-       dma_cmd = inb(hwif->dma_command);
+       dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD);
        /* stop DMA */
-       outb(dma_cmd & ~1, hwif->dma_command);
+       outb(dma_cmd & ~1, hwif->dma_base + ATA_DMA_CMD);
        /* clear the INTR & ERROR bits */
-       outb(dma_stat | 6, hwif->dma_status);
+       outb(dma_stat | 6, hwif->dma_base + ATA_DMA_STATUS);
        /* and free any DMA resources */
        ide_destroy_dmatable(drive);
        /* verify good DMA status */