]> pilppa.org Git - linux-2.6-omap-h63xx.git/blobdiff - drivers/media/video/cx88/cx88-core.c
Pull 5165 into release branch
[linux-2.6-omap-h63xx.git] / drivers / media / video / cx88 / cx88-core.c
index d4d39c1751af7cc45b5bed973dd545141b02d45d..bb6eb54e19ceddcb4726ee9dfc5117baa8c73ef1 100644 (file)
@@ -153,26 +153,26 @@ static u32* cx88_risc_field(u32 *rp, struct scatterlist *sglist,
                }
                if (bpl <= sg_dma_len(sg)-offset) {
                        /* fits into current chunk */
-                        *(rp++)=cpu_to_le32(RISC_WRITE|RISC_SOL|RISC_EOL|bpl);
-                        *(rp++)=cpu_to_le32(sg_dma_address(sg)+offset);
-                        offset+=bpl;
+                       *(rp++)=cpu_to_le32(RISC_WRITE|RISC_SOL|RISC_EOL|bpl);
+                       *(rp++)=cpu_to_le32(sg_dma_address(sg)+offset);
+                       offset+=bpl;
                } else {
                        /* scanline needs to be splitted */
-                        todo = bpl;
-                        *(rp++)=cpu_to_le32(RISC_WRITE|RISC_SOL|
+                       todo = bpl;
+                       *(rp++)=cpu_to_le32(RISC_WRITE|RISC_SOL|
                                            (sg_dma_len(sg)-offset));
-                        *(rp++)=cpu_to_le32(sg_dma_address(sg)+offset);
-                        todo -= (sg_dma_len(sg)-offset);
-                        offset = 0;
-                        sg++;
-                        while (todo > sg_dma_len(sg)) {
-                                *(rp++)=cpu_to_le32(RISC_WRITE|
+                       *(rp++)=cpu_to_le32(sg_dma_address(sg)+offset);
+                       todo -= (sg_dma_len(sg)-offset);
+                       offset = 0;
+                       sg++;
+                       while (todo > sg_dma_len(sg)) {
+                               *(rp++)=cpu_to_le32(RISC_WRITE|
                                                    sg_dma_len(sg));
-                                *(rp++)=cpu_to_le32(sg_dma_address(sg));
+                               *(rp++)=cpu_to_le32(sg_dma_address(sg));
                                todo -= sg_dma_len(sg);
                                sg++;
                        }
-                        *(rp++)=cpu_to_le32(RISC_WRITE|RISC_EOL|todo);
+                       *(rp++)=cpu_to_le32(RISC_WRITE|RISC_EOL|todo);
                        *(rp++)=cpu_to_le32(sg_dma_address(sg));
                        offset += todo;
                }
@@ -309,7 +309,7 @@ struct sram_channel cx88_sram_channels[] = {
                .name       = "video y / packed",
                .cmds_start = 0x180040,
                .ctrl_start = 0x180400,
-               .cdt        = 0x180400 + 64,
+               .cdt        = 0x180400 + 64,
                .fifo_start = 0x180c00,
                .fifo_size  = 0x002800,
                .ptr1_reg   = MO_DMA21_PTR1,
@@ -321,7 +321,7 @@ struct sram_channel cx88_sram_channels[] = {
                .name       = "video u",
                .cmds_start = 0x180080,
                .ctrl_start = 0x1804a0,
-               .cdt        = 0x1804a0 + 64,
+               .cdt        = 0x1804a0 + 64,
                .fifo_start = 0x183400,
                .fifo_size  = 0x000800,
                .ptr1_reg   = MO_DMA22_PTR1,
@@ -333,7 +333,7 @@ struct sram_channel cx88_sram_channels[] = {
                .name       = "video v",
                .cmds_start = 0x1800c0,
                .ctrl_start = 0x180540,
-               .cdt        = 0x180540 + 64,
+               .cdt        = 0x180540 + 64,
                .fifo_start = 0x183c00,
                .fifo_size  = 0x000800,
                .ptr1_reg   = MO_DMA23_PTR1,
@@ -345,7 +345,7 @@ struct sram_channel cx88_sram_channels[] = {
                .name       = "vbi",
                .cmds_start = 0x180100,
                .ctrl_start = 0x1805e0,
-               .cdt        = 0x1805e0 + 64,
+               .cdt        = 0x1805e0 + 64,
                .fifo_start = 0x184400,
                .fifo_size  = 0x001000,
                .ptr1_reg   = MO_DMA24_PTR1,
@@ -357,7 +357,7 @@ struct sram_channel cx88_sram_channels[] = {
                .name       = "audio from",
                .cmds_start = 0x180140,
                .ctrl_start = 0x180680,
-               .cdt        = 0x180680 + 64,
+               .cdt        = 0x180680 + 64,
                .fifo_start = 0x185400,
                .fifo_size  = 0x000200,
                .ptr1_reg   = MO_DMA25_PTR1,
@@ -369,7 +369,7 @@ struct sram_channel cx88_sram_channels[] = {
                .name       = "audio to",
                .cmds_start = 0x180180,
                .ctrl_start = 0x180720,
-               .cdt        = 0x180680 + 64,  /* same as audio IN */
+               .cdt        = 0x180680 + 64,  /* same as audio IN */
                .fifo_start = 0x185400,       /* same as audio IN */
                .fifo_size  = 0x000200,       /* same as audio IN */
                .ptr1_reg   = MO_DMA26_PTR1,
@@ -837,6 +837,29 @@ static int set_pll(struct cx88_core *core, int prescale, u32 ofreq)
        return -1;
 }
 
+int cx88_start_audio_dma(struct cx88_core *core)
+{
+       /* setup fifo + format */
+       cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH25], 128, 0);
+       cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH26], 128, 0);
+
+       cx_write(MO_AUDD_LNGTH,    128); /* fifo bpl size */
+       cx_write(MO_AUDR_LNGTH,    128); /* fifo bpl size */
+
+       /* start dma */
+       cx_write(MO_AUD_DMACNTRL, 0x0003); /* Up and Down fifo enable */
+
+       return 0;
+}
+
+int cx88_stop_audio_dma(struct cx88_core *core)
+{
+       /* stop dma */
+       cx_write(MO_AUD_DMACNTRL, 0x0000);
+
+       return 0;
+}
+
 static int set_tvaudio(struct cx88_core *core)
 {
        struct cx88_tvnorm *norm = core->tvnorm;
@@ -877,12 +900,16 @@ static int set_tvaudio(struct cx88_core *core)
        cx88_set_tvaudio(core);
        /* cx88_set_stereo(dev,V4L2_TUNER_MODE_STEREO); */
 
-       cx_write(MO_AUDD_LNGTH,    128); /* fifo size */
-       cx_write(MO_AUDR_LNGTH,    128); /* fifo size */
-       cx_write(MO_AUD_DMACNTRL, 0x03); /* need audio fifo */
+/*
+   This should be needed only on cx88-alsa. It seems that some cx88 chips have
+   bugs and does require DMA enabled for it to work.
+ */
+       cx88_start_audio_dma(core);
        return 0;
 }
 
+
+
 int cx88_set_tvnorm(struct cx88_core *core, struct cx88_tvnorm *norm)
 {
        u32 fsc8;
@@ -1137,7 +1164,7 @@ struct cx88_core* cx88_core_get(struct pci_dev *pci)
        if (!core->radio_addr)
                core->radio_addr = cx88_boards[core->board].radio_addr;
 
-        printk(KERN_INFO "TV tuner %d at 0x%02x, Radio tuner %d at 0x%02x\n",
+       printk(KERN_INFO "TV tuner %d at 0x%02x, Radio tuner %d at 0x%02x\n",
                core->tuner_type, core->tuner_addr<<1,
                core->radio_type, core->radio_addr<<1);
 
@@ -1204,6 +1231,8 @@ EXPORT_SYMBOL(cx88_set_scale);
 EXPORT_SYMBOL(cx88_vdev_init);
 EXPORT_SYMBOL(cx88_core_get);
 EXPORT_SYMBOL(cx88_core_put);
+EXPORT_SYMBOL(cx88_start_audio_dma);
+EXPORT_SYMBOL(cx88_stop_audio_dma);
 
 /*
  * Local variables: