Merge branch 'for-2.6.24' of git://git.kernel.org/pub/scm/linux/kernel/git/galak...

[linux-2.6-omap-h63xx.git] / drivers / mfd / sm501.c

diff --git a/drivers/mfd/sm501.c b/drivers/mfd/sm501.c
index 3a0ecfc404e95497e4fff9ede0e2b15db0bcadfa..afd82966f9a0782ad5624f45fcf4538e3755a73f 100644 (file)
--- a/drivers/mfd/sm501.c
+++ b/drivers/mfd/sm501.c
@@ -156,7 +156,7 @@ static void sm501_dump_clk(struct sm501_devdata *sm)
 
        dev_dbg(sm->dev, "PM0[%c]: "
                 "P2 %ld.%ld MHz (%ld), V2 %ld.%ld (%ld), "
-x               "M %ld.%ld (%ld), MX1 %ld.%ld (%ld)\n",
+                "M %ld.%ld (%ld), MX1 %ld.%ld (%ld)\n",
                 (pmc & 3 ) == 0 ? '*' : '-',
                 fmt_freq(decode_div(pll2, pm0, 24, 1<<29, 31, px_div)),
                 fmt_freq(decode_div(pll2, pm0, 16, 1<<20, 15, misc_div)),
@@ -855,6 +855,24 @@ static void sm501_init_regs(struct sm501_devdata *sm,
                dev_info(sm->dev, "setting MCLK to %ld\n", init->mclk);
                sm501_set_clock(sm->dev, SM501_CLOCK_MCLK, init->mclk);
        }
+
+}
+
+/* Check the PLL sources for the M1CLK and M1XCLK
+ *
+ * If the M1CLK and M1XCLKs are not sourced from the same PLL, then
+ * there is a risk (see errata AB-5) that the SM501 will cease proper
+ * function. If this happens, then it is likely the SM501 will
+ * hang the system.
+*/
+
+static int sm501_check_clocks(struct sm501_devdata *sm)
+{
+       unsigned long pwrmode = readl(sm->regs + SM501_CURRENT_CLOCK);
+       unsigned long msrc = (pwrmode & SM501_POWERMODE_M_SRC);
+       unsigned long m1src = (pwrmode & SM501_POWERMODE_M1_SRC);
+
+       return ((msrc == 0 && m1src != 0) || (msrc != 0 && m1src == 0));
 }
 
 static unsigned int sm501_mem_local[] = {
@@ -875,6 +893,7 @@ static int sm501_init_dev(struct sm501_devdata *sm)
 {
        resource_size_t mem_avail;
        unsigned long dramctrl;
+       unsigned long devid;
        int ret;
 
        mutex_init(&sm->clock_lock);
@@ -882,13 +901,18 @@ static int sm501_init_dev(struct sm501_devdata *sm)
 
        INIT_LIST_HEAD(&sm->devices);
 
-       dramctrl = readl(sm->regs + SM501_DRAM_CONTROL);
+       devid = readl(sm->regs + SM501_DEVICEID);
+
+       if ((devid & SM501_DEVICEID_IDMASK) != SM501_DEVICEID_SM501) {
+               dev_err(sm->dev, "incorrect device id %08lx\n", devid);
+               return -EINVAL;
+       }
 
+       dramctrl = readl(sm->regs + SM501_DRAM_CONTROL);
        mem_avail = sm501_mem_local[(dramctrl >> 13) & 0x7];
 
-       dev_info(sm->dev, "SM501 At %p: Version %08x, %ld Mb, IRQ %d\n",
-                sm->regs, readl(sm->regs + SM501_DEVICEID),
-                (unsigned long)mem_avail >> 20, sm->irq);
+       dev_info(sm->dev, "SM501 At %p: Version %08lx, %ld Mb, IRQ %d\n",
+                sm->regs, devid, (unsigned long)mem_avail >> 20, sm->irq);
 
        sm501_dump_gate(sm);
 
@@ -911,6 +935,13 @@ static int sm501_init_dev(struct sm501_devdata *sm)
                }
        }
 
+       ret = sm501_check_clocks(sm);
+       if (ret) {
+               dev_err(sm->dev, "M1X and M clocks sourced from different "
+                                       "PLLs\n");
+               return -EINVAL;
+       }
+
        /* always create a framebuffer */
        sm501_register_display(sm, &mem_avail);
 
@@ -1048,8 +1079,12 @@ static struct sm501_initdata sm501_pci_initdata = {
        },
 
        .devices        = SM501_USE_ALL,
-       .mclk           = 100 * MHZ,
-       .m1xclk         = 160 * MHZ,
+
+       /* Errata AB-3 says that 72MHz is the fastest available
+        * for 33MHZ PCI with proper bus-mastering operation */
+
+       .mclk           = 72 * MHZ,
+       .m1xclk         = 144 * MHZ,
 };
 
 static struct sm501_platdata_fbsub sm501_pdata_fbsub = {