]> pilppa.org Git - linux-2.6-omap-h63xx.git/blobdiff - drivers/net/e1000e/es2lan.c
Merge branch 'devel'
[linux-2.6-omap-h63xx.git] / drivers / net / e1000e / es2lan.c
index 2657754475389e8361724bbbbc7b208173feb28c..d59a99ae44bee83b6afa7aff45315ae828f9c9b7 100644 (file)
@@ -119,7 +119,7 @@ static s32 e1000_init_phy_params_80003es2lan(struct e1000_hw *hw)
        struct e1000_phy_info *phy = &hw->phy;
        s32 ret_val;
 
-       if (hw->media_type != e1000_media_type_copper) {
+       if (hw->phy.media_type != e1000_media_type_copper) {
                phy->type       = e1000_phy_none;
                return 0;
        }
@@ -178,6 +178,10 @@ static s32 e1000_init_nvm_params_80003es2lan(struct e1000_hw *hw)
         * for setting word_size.
         */
        size += NVM_WORD_SIZE_BASE_SHIFT;
+
+       /* EEPROM access above 16k is unsupported */
+       if (size > 14)
+               size = 14;
        nvm->word_size  = 1 << size;
 
        return 0;
@@ -198,10 +202,10 @@ static s32 e1000_init_mac_params_80003es2lan(struct e1000_adapter *adapter)
        /* Set media type */
        switch (adapter->pdev->device) {
        case E1000_DEV_ID_80003ES2LAN_SERDES_DPT:
-               hw->media_type = e1000_media_type_internal_serdes;
+               hw->phy.media_type = e1000_media_type_internal_serdes;
                break;
        default:
-               hw->media_type = e1000_media_type_copper;
+               hw->phy.media_type = e1000_media_type_copper;
                break;
        }
 
@@ -213,7 +217,7 @@ static s32 e1000_init_mac_params_80003es2lan(struct e1000_adapter *adapter)
        mac->arc_subsystem_valid = (er32(FWSM) & E1000_FWSM_MODE_MASK) ? 1 : 0;
 
        /* check for link */
-       switch (hw->media_type) {
+       switch (hw->phy.media_type) {
        case e1000_media_type_copper:
                func->setup_physical_interface = e1000_setup_copper_link_80003es2lan;
                func->check_for_link = e1000e_check_for_copper_link;
@@ -234,7 +238,7 @@ static s32 e1000_init_mac_params_80003es2lan(struct e1000_adapter *adapter)
        return 0;
 }
 
-static s32 e1000_get_invariants_80003es2lan(struct e1000_adapter *adapter)
+static s32 e1000_get_variants_80003es2lan(struct e1000_adapter *adapter)
 {
        struct e1000_hw *hw = &adapter->hw;
        s32 rc;
@@ -591,7 +595,7 @@ static s32 e1000_phy_force_speed_duplex_80003es2lan(struct e1000_hw *hw)
 
        udelay(1);
 
-       if (hw->phy.wait_for_link) {
+       if (hw->phy.autoneg_wait_to_complete) {
                hw_dbg(hw, "Waiting for forced speed/duplex link "
                         "on GG82563 phy.\n");
 
@@ -682,7 +686,7 @@ static s32 e1000_get_link_up_info_80003es2lan(struct e1000_hw *hw, u16 *speed,
 {
        s32 ret_val;
 
-       if (hw->media_type == e1000_media_type_copper) {
+       if (hw->phy.media_type == e1000_media_type_copper) {
                ret_val = e1000e_get_speed_and_duplex_copper(hw,
                                                                    speed,
                                                                    duplex);
@@ -788,16 +792,16 @@ static s32 e1000_init_hw_80003es2lan(struct e1000_hw *hw)
        ret_val = e1000e_setup_link(hw);
 
        /* Set the transmit descriptor write-back policy */
-       reg_data = er32(TXDCTL);
+       reg_data = er32(TXDCTL(0));
        reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) |
                   E1000_TXDCTL_FULL_TX_DESC_WB | E1000_TXDCTL_COUNT_DESC;
-       ew32(TXDCTL, reg_data);
+       ew32(TXDCTL(0), reg_data);
 
        /* ...for both queues. */
-       reg_data = er32(TXDCTL1);
+       reg_data = er32(TXDCTL(1));
        reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) |
                   E1000_TXDCTL_FULL_TX_DESC_WB | E1000_TXDCTL_COUNT_DESC;
-       ew32(TXDCTL1, reg_data);
+       ew32(TXDCTL(1), reg_data);
 
        /* Enable retransmit on late collisions */
        reg_data = er32(TCTL);
@@ -842,29 +846,29 @@ static void e1000_initialize_hw_bits_80003es2lan(struct e1000_hw *hw)
        u32 reg;
 
        /* Transmit Descriptor Control 0 */
-       reg = er32(TXDCTL);
+       reg = er32(TXDCTL(0));
        reg |= (1 << 22);
-       ew32(TXDCTL, reg);
+       ew32(TXDCTL(0), reg);
 
        /* Transmit Descriptor Control 1 */
-       reg = er32(TXDCTL1);
+       reg = er32(TXDCTL(1));
        reg |= (1 << 22);
-       ew32(TXDCTL1, reg);
+       ew32(TXDCTL(1), reg);
 
        /* Transmit Arbitration Control 0 */
-       reg = er32(TARC0);
+       reg = er32(TARC(0));
        reg &= ~(0xF << 27); /* 30:27 */
-       if (hw->media_type != e1000_media_type_copper)
+       if (hw->phy.media_type != e1000_media_type_copper)
                reg &= ~(1 << 20);
-       ew32(TARC0, reg);
+       ew32(TARC(0), reg);
 
        /* Transmit Arbitration Control 1 */
-       reg = er32(TARC1);
+       reg = er32(TARC(1));
        if (er32(TCTL) & E1000_TCTL_MULR)
                reg &= ~(1 << 28);
        else
                reg |= (1 << 28);
-       ew32(TARC1, reg);
+       ew32(TARC(1), reg);
 }
 
 /**
@@ -1190,7 +1194,7 @@ static struct e1000_mac_operations es2_mac_ops = {
        .get_link_up_info       = e1000_get_link_up_info_80003es2lan,
        .led_on                 = e1000e_led_on_generic,
        .led_off                = e1000e_led_off_generic,
-       .mc_addr_list_update    = e1000e_mc_addr_list_update_generic,
+       .update_mc_addr_list    = e1000e_update_mc_addr_list_generic,
        .reset_hw               = e1000_reset_hw_80003es2lan,
        .init_hw                = e1000_init_hw_80003es2lan,
        .setup_link             = e1000e_setup_link,
@@ -1239,7 +1243,7 @@ struct e1000_info e1000_es2_info = {
                                  | FLAG_DISABLE_FC_PAUSE_TIME /* errata */
                                  | FLAG_TIPG_MEDIUM_FOR_80003ESLAN,
        .pba                    = 38,
-       .get_invariants         = e1000_get_invariants_80003es2lan,
+       .get_variants           = e1000_get_variants_80003es2lan,
        .mac_ops                = &es2_mac_ops,
        .phy_ops                = &es2_phy_ops,
        .nvm_ops                = &es2_nvm_ops,