MODULE_DESCRIPTION("Sensoray 626 Comedi driver module");
MODULE_LICENSE("GPL");
-typedef struct s626_board_struct {
+struct s626_board {
const char *name;
int ai_chans;
int ai_bits;
int dio_chans;
int dio_banks;
int enc_chans;
-} s626_board;
+};
-static const s626_board s626_boards[] = {
+static const struct s626_board s626_boards[] = {
{
name: "s626",
ai_chans : S626_ADC_CHANNELS,
}
};
-#define thisboard ((const s626_board *)dev->board_ptr)
+#define thisboard ((const struct s626_board *)dev->board_ptr)
#define PCI_VENDOR_ID_S626 0x1131
#define PCI_DEVICE_ID_S626 0x7146
MODULE_DEVICE_TABLE(pci, s626_pci_table);
-static int s626_attach(comedi_device *dev, comedi_devconfig *it);
-static int s626_detach(comedi_device *dev);
+static int s626_attach(struct comedi_device *dev, struct comedi_devconfig *it);
+static int s626_detach(struct comedi_device *dev);
-static comedi_driver driver_s626 = {
+static struct comedi_driver driver_s626 = {
driver_name:"s626",
module : THIS_MODULE,
attach : s626_attach,
detach : s626_detach,
};
-typedef struct {
+struct s626_private {
struct pci_dev *pdev;
void *base_addr;
int got_regions;
uint16_t CounterIntEnabs;
/* Counter interrupt enable mask for MISC2 register. */
uint8_t AdcItems; /* Number of items in ADC poll list. */
- DMABUF RPSBuf; /* DMA buffer used to hold ADC (RPS1) program. */
- DMABUF ANABuf;
+ struct bufferDMA RPSBuf; /* DMA buffer used to hold ADC (RPS1) program. */
+ struct bufferDMA ANABuf;
/* DMA buffer used to receive ADC data and hold DAC data. */
uint32_t *pDacWBuf;
/* Pointer to logical adrs of DMA buffer used to hold DAC data. */
uint32_t I2CAdrs;
/* I2C device address for onboard EEPROM (board rev dependent). */
/* short I2Cards; */
- lsampl_t ao_readback[S626_DAC_CHANNELS];
-} s626_private;
+ unsigned int ao_readback[S626_DAC_CHANNELS];
+};
-typedef struct {
+struct dio_private {
uint16_t RDDIn;
uint16_t WRDOut;
uint16_t RDEdgSel;
uint16_t RDCapFlg;
uint16_t RDIntSel;
uint16_t WRIntSel;
-} dio_private;
+};
-static dio_private dio_private_A = {
+static struct dio_private dio_private_A = {
RDDIn:LP_RDDINA,
WRDOut : LP_WRDOUTA,
RDEdgSel : LP_RDEDGSELA,
WRIntSel : LP_WRINTSELA,
};
-static dio_private dio_private_B = {
+static struct dio_private dio_private_B = {
RDDIn:LP_RDDINB,
WRDOut : LP_WRDOUTB,
RDEdgSel : LP_RDEDGSELB,
WRIntSel : LP_WRINTSELB,
};
-static dio_private dio_private_C = {
+static struct dio_private dio_private_C = {
RDDIn:LP_RDDINC,
WRDOut : LP_WRDOUTC,
RDEdgSel : LP_RDEDGSELC,
};
/* to group dio devices (48 bits mask and data are not allowed ???)
-static dio_private *dio_private_word[]={
+static struct dio_private *dio_private_word[]={
&dio_private_A,
&dio_private_B,
&dio_private_C,
};
*/
-#define devpriv ((s626_private *)dev->private)
-#define diopriv ((dio_private *)s->private)
+#define devpriv ((struct s626_private *)dev->private)
+#define diopriv ((struct dio_private *)s->private)
COMEDI_PCI_INITCLEANUP_NOMODULE(driver_s626, s626_pci_table);
/* ioctl routines */
-static int s626_ai_insn_config(comedi_device *dev, comedi_subdevice *s,
- comedi_insn *insn, lsampl_t *data);
-/* static int s626_ai_rinsn(comedi_device *dev,comedi_subdevice *s,comedi_insn *insn,lsampl_t *data); */
-static int s626_ai_insn_read(comedi_device *dev, comedi_subdevice *s,
- comedi_insn *insn, lsampl_t *data);
-static int s626_ai_cmd(comedi_device *dev, comedi_subdevice *s);
-static int s626_ai_cmdtest(comedi_device *dev, comedi_subdevice *s,
- comedi_cmd *cmd);
-static int s626_ai_cancel(comedi_device *dev, comedi_subdevice *s);
-static int s626_ao_winsn(comedi_device *dev, comedi_subdevice *s,
- comedi_insn *insn, lsampl_t *data);
-static int s626_ao_rinsn(comedi_device *dev, comedi_subdevice *s,
- comedi_insn *insn, lsampl_t *data);
-static int s626_dio_insn_bits(comedi_device *dev, comedi_subdevice *s,
- comedi_insn *insn, lsampl_t *data);
-static int s626_dio_insn_config(comedi_device *dev, comedi_subdevice *s,
- comedi_insn *insn, lsampl_t *data);
-static int s626_dio_set_irq(comedi_device *dev, unsigned int chan);
-static int s626_dio_reset_irq(comedi_device *dev, unsigned int gruop,
+static int s626_ai_insn_config(struct comedi_device *dev, struct comedi_subdevice *s,
+ struct comedi_insn *insn, unsigned int *data);
+/* static int s626_ai_rinsn(struct comedi_device *dev,struct comedi_subdevice *s,struct comedi_insn *insn,unsigned int *data); */
+static int s626_ai_insn_read(struct comedi_device *dev, struct comedi_subdevice *s,
+ struct comedi_insn *insn, unsigned int *data);
+static int s626_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s);
+static int s626_ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
+ struct comedi_cmd *cmd);
+static int s626_ai_cancel(struct comedi_device *dev, struct comedi_subdevice *s);
+static int s626_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
+ struct comedi_insn *insn, unsigned int *data);
+static int s626_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
+ struct comedi_insn *insn, unsigned int *data);
+static int s626_dio_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s,
+ struct comedi_insn *insn, unsigned int *data);
+static int s626_dio_insn_config(struct comedi_device *dev, struct comedi_subdevice *s,
+ struct comedi_insn *insn, unsigned int *data);
+static int s626_dio_set_irq(struct comedi_device *dev, unsigned int chan);
+static int s626_dio_reset_irq(struct comedi_device *dev, unsigned int gruop,
unsigned int mask);
-static int s626_dio_clear_irq(comedi_device *dev);
-static int s626_enc_insn_config(comedi_device *dev, comedi_subdevice *s,
- comedi_insn *insn, lsampl_t *data);
-static int s626_enc_insn_read(comedi_device *dev, comedi_subdevice *s,
- comedi_insn *insn, lsampl_t *data);
-static int s626_enc_insn_write(comedi_device *dev, comedi_subdevice *s,
- comedi_insn *insn, lsampl_t *data);
+static int s626_dio_clear_irq(struct comedi_device *dev);
+static int s626_enc_insn_config(struct comedi_device *dev, struct comedi_subdevice *s,
+ struct comedi_insn *insn, unsigned int *data);
+static int s626_enc_insn_read(struct comedi_device *dev, struct comedi_subdevice *s,
+ struct comedi_insn *insn, unsigned int *data);
+static int s626_enc_insn_write(struct comedi_device *dev, struct comedi_subdevice *s,
+ struct comedi_insn *insn, unsigned int *data);
static int s626_ns_to_timer(int *nanosec, int round_mode);
-static int s626_ai_load_polllist(uint8_t *ppl, comedi_cmd *cmd);
-static int s626_ai_inttrig(comedi_device *dev, comedi_subdevice *s,
+static int s626_ai_load_polllist(uint8_t *ppl, struct comedi_cmd *cmd);
+static int s626_ai_inttrig(struct comedi_device *dev, struct comedi_subdevice *s,
unsigned int trignum);
static irqreturn_t s626_irq_handler(int irq, void *d PT_REGS_ARG);
-static lsampl_t s626_ai_reg_to_uint(int data);
-/* static lsampl_t s626_uint_to_reg(comedi_subdevice *s, int data); */
+static unsigned int s626_ai_reg_to_uint(int data);
+/* static unsigned int s626_uint_to_reg(struct comedi_subdevice *s, int data); */
/* end ioctl routines */
/* internal routines */
-static void s626_dio_init(comedi_device *dev);
-static void ResetADC(comedi_device *dev, uint8_t *ppl);
-static void LoadTrimDACs(comedi_device *dev);
-static void WriteTrimDAC(comedi_device *dev, uint8_t LogicalChan,
+static void s626_dio_init(struct comedi_device *dev);
+static void ResetADC(struct comedi_device *dev, uint8_t *ppl);
+static void LoadTrimDACs(struct comedi_device *dev);
+static void WriteTrimDAC(struct comedi_device *dev, uint8_t LogicalChan,
uint8_t DacData);
-static uint8_t I2Cread(comedi_device *dev, uint8_t addr);
-static uint32_t I2Chandshake(comedi_device *dev, uint32_t val);
-static void SetDAC(comedi_device *dev, uint16_t chan, short dacdata);
-static void SendDAC(comedi_device *dev, uint32_t val);
-static void WriteMISC2(comedi_device *dev, uint16_t NewImage);
-static void DEBItransfer(comedi_device *dev);
-static uint16_t DEBIread(comedi_device *dev, uint16_t addr);
-static void DEBIwrite(comedi_device *dev, uint16_t addr, uint16_t wdata);
-static void DEBIreplace(comedi_device *dev, uint16_t addr, uint16_t mask,
+static uint8_t I2Cread(struct comedi_device *dev, uint8_t addr);
+static uint32_t I2Chandshake(struct comedi_device *dev, uint32_t val);
+static void SetDAC(struct comedi_device *dev, uint16_t chan, short dacdata);
+static void SendDAC(struct comedi_device *dev, uint32_t val);
+static void WriteMISC2(struct comedi_device *dev, uint16_t NewImage);
+static void DEBItransfer(struct comedi_device *dev);
+static uint16_t DEBIread(struct comedi_device *dev, uint16_t addr);
+static void DEBIwrite(struct comedi_device *dev, uint16_t addr, uint16_t wdata);
+static void DEBIreplace(struct comedi_device *dev, uint16_t addr, uint16_t mask,
uint16_t wdata);
-static void CloseDMAB(comedi_device *dev, DMABUF *pdma, size_t bsize);
+static void CloseDMAB(struct comedi_device *dev, struct bufferDMA *pdma, size_t bsize);
/* COUNTER OBJECT ------------------------------------------------ */
-typedef struct enc_private_struct {
+struct enc_private {
/* Pointers to functions that differ for A and B counters: */
- uint16_t(*GetEnable) (comedi_device *dev, struct enc_private_struct *); /* Return clock enable. */
- uint16_t(*GetIntSrc) (comedi_device *dev, struct enc_private_struct *); /* Return interrupt source. */
- uint16_t(*GetLoadTrig) (comedi_device *dev, struct enc_private_struct *); /* Return preload trigger source. */
- uint16_t(*GetMode) (comedi_device *dev, struct enc_private_struct *); /* Return standardized operating mode. */
- void (*PulseIndex) (comedi_device *dev, struct enc_private_struct *); /* Generate soft index strobe. */
- void (*SetEnable) (comedi_device *dev, struct enc_private_struct *, uint16_t enab); /* Program clock enable. */
- void (*SetIntSrc) (comedi_device *dev, struct enc_private_struct *, uint16_t IntSource); /* Program interrupt source. */
- void (*SetLoadTrig) (comedi_device *dev, struct enc_private_struct *, uint16_t Trig); /* Program preload trigger source. */
- void (*SetMode) (comedi_device *dev, struct enc_private_struct *, uint16_t Setup, uint16_t DisableIntSrc); /* Program standardized operating mode. */
- void (*ResetCapFlags) (comedi_device *dev, struct enc_private_struct *); /* Reset event capture flags. */
+ uint16_t(*GetEnable) (struct comedi_device *dev, struct enc_private *); /* Return clock enable. */
+ uint16_t(*GetIntSrc) (struct comedi_device *dev, struct enc_private *); /* Return interrupt source. */
+ uint16_t(*GetLoadTrig) (struct comedi_device *dev, struct enc_private *); /* Return preload trigger source. */
+ uint16_t(*GetMode) (struct comedi_device *dev, struct enc_private *); /* Return standardized operating mode. */
+ void (*PulseIndex) (struct comedi_device *dev, struct enc_private *); /* Generate soft index strobe. */
+ void (*SetEnable) (struct comedi_device *dev, struct enc_private *, uint16_t enab); /* Program clock enable. */
+ void (*SetIntSrc) (struct comedi_device *dev, struct enc_private *, uint16_t IntSource); /* Program interrupt source. */
+ void (*SetLoadTrig) (struct comedi_device *dev, struct enc_private *, uint16_t Trig); /* Program preload trigger source. */
+ void (*SetMode) (struct comedi_device *dev, struct enc_private *, uint16_t Setup, uint16_t DisableIntSrc); /* Program standardized operating mode. */
+ void (*ResetCapFlags) (struct comedi_device *dev, struct enc_private *); /* Reset event capture flags. */
uint16_t MyCRA; /* Address of CRA register. */
uint16_t MyCRB; /* Address of CRB register. */
uint16_t MyLatchLsw; /* Address of Latch least-significant-word */
/* register. */
uint16_t MyEventBits[4]; /* Bit translations for IntSrc -->RDMISC2. */
-} enc_private; /* counter object */
+};
-#define encpriv ((enc_private *)(dev->subdevices+5)->private)
+#define encpriv ((struct enc_private *)(dev->subdevices+5)->private)
/* counters routines */
-static void s626_timer_load(comedi_device *dev, enc_private *k, int tick);
-static uint32_t ReadLatch(comedi_device *dev, enc_private *k);
-static void ResetCapFlags_A(comedi_device *dev, enc_private *k);
-static void ResetCapFlags_B(comedi_device *dev, enc_private *k);
-static uint16_t GetMode_A(comedi_device *dev, enc_private *k);
-static uint16_t GetMode_B(comedi_device *dev, enc_private *k);
-static void SetMode_A(comedi_device *dev, enc_private *k, uint16_t Setup,
+static void s626_timer_load(struct comedi_device *dev, struct enc_private *k, int tick);
+static uint32_t ReadLatch(struct comedi_device *dev, struct enc_private *k);
+static void ResetCapFlags_A(struct comedi_device *dev, struct enc_private *k);
+static void ResetCapFlags_B(struct comedi_device *dev, struct enc_private *k);
+static uint16_t GetMode_A(struct comedi_device *dev, struct enc_private *k);
+static uint16_t GetMode_B(struct comedi_device *dev, struct enc_private *k);
+static void SetMode_A(struct comedi_device *dev, struct enc_private *k, uint16_t Setup,
uint16_t DisableIntSrc);
-static void SetMode_B(comedi_device *dev, enc_private *k, uint16_t Setup,
+static void SetMode_B(struct comedi_device *dev, struct enc_private *k, uint16_t Setup,
uint16_t DisableIntSrc);
-static void SetEnable_A(comedi_device *dev, enc_private *k, uint16_t enab);
-static void SetEnable_B(comedi_device *dev, enc_private *k, uint16_t enab);
-static uint16_t GetEnable_A(comedi_device *dev, enc_private *k);
-static uint16_t GetEnable_B(comedi_device *dev, enc_private *k);
-static void SetLatchSource(comedi_device *dev, enc_private *k,
+static void SetEnable_A(struct comedi_device *dev, struct enc_private *k, uint16_t enab);
+static void SetEnable_B(struct comedi_device *dev, struct enc_private *k, uint16_t enab);
+static uint16_t GetEnable_A(struct comedi_device *dev, struct enc_private *k);
+static uint16_t GetEnable_B(struct comedi_device *dev, struct enc_private *k);
+static void SetLatchSource(struct comedi_device *dev, struct enc_private *k,
uint16_t value);
-/* static uint16_t GetLatchSource(comedi_device *dev, enc_private *k ); */
-static void SetLoadTrig_A(comedi_device *dev, enc_private *k, uint16_t Trig);
-static void SetLoadTrig_B(comedi_device *dev, enc_private *k, uint16_t Trig);
-static uint16_t GetLoadTrig_A(comedi_device *dev, enc_private *k);
-static uint16_t GetLoadTrig_B(comedi_device *dev, enc_private *k);
-static void SetIntSrc_B(comedi_device *dev, enc_private *k,
+/* static uint16_t GetLatchSource(struct comedi_device *dev, struct enc_private *k ); */
+static void SetLoadTrig_A(struct comedi_device *dev, struct enc_private *k, uint16_t Trig);
+static void SetLoadTrig_B(struct comedi_device *dev, struct enc_private *k, uint16_t Trig);
+static uint16_t GetLoadTrig_A(struct comedi_device *dev, struct enc_private *k);
+static uint16_t GetLoadTrig_B(struct comedi_device *dev, struct enc_private *k);
+static void SetIntSrc_B(struct comedi_device *dev, struct enc_private *k,
uint16_t IntSource);
-static void SetIntSrc_A(comedi_device *dev, enc_private *k,
+static void SetIntSrc_A(struct comedi_device *dev, struct enc_private *k,
uint16_t IntSource);
-static uint16_t GetIntSrc_A(comedi_device *dev, enc_private *k);
-static uint16_t GetIntSrc_B(comedi_device *dev, enc_private *k);
-/* static void SetClkMult(comedi_device *dev, enc_private *k, uint16_t value ) ; */
-/* static uint16_t GetClkMult(comedi_device *dev, enc_private *k ) ; */
-/* static void SetIndexPol(comedi_device *dev, enc_private *k, uint16_t value ); */
-/* static uint16_t GetClkPol(comedi_device *dev, enc_private *k ) ; */
-/* static void SetIndexSrc( comedi_device *dev,enc_private *k, uint16_t value ); */
-/* static uint16_t GetClkSrc( comedi_device *dev,enc_private *k ); */
-/* static void SetIndexSrc( comedi_device *dev,enc_private *k, uint16_t value ); */
-/* static uint16_t GetIndexSrc( comedi_device *dev,enc_private *k ); */
-static void PulseIndex_A(comedi_device *dev, enc_private *k);
-static void PulseIndex_B(comedi_device *dev, enc_private *k);
-static void Preload(comedi_device *dev, enc_private *k, uint32_t value);
-static void CountersInit(comedi_device *dev);
+static uint16_t GetIntSrc_A(struct comedi_device *dev, struct enc_private *k);
+static uint16_t GetIntSrc_B(struct comedi_device *dev, struct enc_private *k);
+/* static void SetClkMult(struct comedi_device *dev, struct enc_private *k, uint16_t value ) ; */
+/* static uint16_t GetClkMult(struct comedi_device *dev, struct enc_private *k ) ; */
+/* static void SetIndexPol(struct comedi_device *dev, struct enc_private *k, uint16_t value ); */
+/* static uint16_t GetClkPol(struct comedi_device *dev, struct enc_private *k ) ; */
+/* static void SetIndexSrc( struct comedi_device *dev,struct enc_private *k, uint16_t value ); */
+/* static uint16_t GetClkSrc( struct comedi_device *dev,struct enc_private *k ); */
+/* static void SetIndexSrc( struct comedi_device *dev,struct enc_private *k, uint16_t value ); */
+/* static uint16_t GetIndexSrc( struct comedi_device *dev,struct enc_private *k ); */
+static void PulseIndex_A(struct comedi_device *dev, struct enc_private *k);
+static void PulseIndex_B(struct comedi_device *dev, struct enc_private *k);
+static void Preload(struct comedi_device *dev, struct enc_private *k, uint32_t value);
+static void CountersInit(struct comedi_device *dev);
/* end internal routines */
/* Counter objects constructor. */
/* Counter overflow/index event flag masks for RDMISC2. */
-#define INDXMASK(C) ( 1 << ( ( (C) > 2 ) ? ( (C) * 2 - 1 ) : ( (C) * 2 + 4 ) ) )
-#define OVERMASK(C) ( 1 << ( ( (C) > 2 ) ? ( (C) * 2 + 5 ) : ( (C) * 2 + 10 ) ) )
+#define INDXMASK(C) (1 << (((C) > 2) ? ((C) * 2 - 1) : ((C) * 2 + 4)))
+#define OVERMASK(C) (1 << (((C) > 2) ? ((C) * 2 + 5) : ((C) * 2 + 10)))
#define EVBITS(C) { 0, OVERMASK(C), INDXMASK(C), OVERMASK(C) | INDXMASK(C) }
/* Translation table to map IntSrc into equivalent RDMISC2 event flag bits. */
/* static const uint16_t EventBits[][4] = { EVBITS(0), EVBITS(1), EVBITS(2), EVBITS(3), EVBITS(4), EVBITS(5) }; */
-/* enc_private; */
-static enc_private enc_private_data[] = {
+/* struct enc_private; */
+static struct enc_private enc_private_data[] = {
{
GetEnable:GetEnable_A,
GetIntSrc : GetIntSrc_A,
GetLoadTrig : GetLoadTrig_A,
- GetMode: GetMode_A,
+ GetMode : GetMode_A,
PulseIndex : PulseIndex_A,
SetEnable : SetEnable_A,
SetIntSrc : SetIntSrc_A,
SetLoadTrig : SetLoadTrig_A,
- SetMode: SetMode_A,
+ SetMode : SetMode_A,
ResetCapFlags : ResetCapFlags_A,
- MyCRA: LP_CR0A,
- MyCRB: LP_CR0B,
+ MyCRA : LP_CR0A,
+ MyCRB : LP_CR0B,
MyLatchLsw : LP_CNTR0ALSW,
MyEventBits : EVBITS(0),
},
GetEnable:GetEnable_A,
GetIntSrc : GetIntSrc_A,
GetLoadTrig : GetLoadTrig_A,
- GetMode: GetMode_A,
+ GetMode : GetMode_A,
PulseIndex : PulseIndex_A,
SetEnable : SetEnable_A,
SetIntSrc : SetIntSrc_A,
SetLoadTrig : SetLoadTrig_A,
- SetMode: SetMode_A,
+ SetMode : SetMode_A,
ResetCapFlags : ResetCapFlags_A,
- MyCRA: LP_CR1A,
- MyCRB: LP_CR1B,
+ MyCRA : LP_CR1A,
+ MyCRB : LP_CR1B,
MyLatchLsw : LP_CNTR1ALSW,
MyEventBits : EVBITS(1),
},
GetEnable:GetEnable_A,
GetIntSrc : GetIntSrc_A,
GetLoadTrig : GetLoadTrig_A,
- GetMode: GetMode_A,
+ GetMode : GetMode_A,
PulseIndex : PulseIndex_A,
SetEnable : SetEnable_A,
SetIntSrc : SetIntSrc_A,
SetLoadTrig : SetLoadTrig_A,
- SetMode: SetMode_A,
+ SetMode : SetMode_A,
ResetCapFlags : ResetCapFlags_A,
- MyCRA: LP_CR2A,
- MyCRB: LP_CR2B,
+ MyCRA : LP_CR2A,
+ MyCRB : LP_CR2B,
MyLatchLsw : LP_CNTR2ALSW,
MyEventBits : EVBITS(2),
},
GetEnable:GetEnable_B,
GetIntSrc : GetIntSrc_B,
GetLoadTrig : GetLoadTrig_B,
- GetMode: GetMode_B,
+ GetMode : GetMode_B,
PulseIndex : PulseIndex_B,
SetEnable : SetEnable_B,
SetIntSrc : SetIntSrc_B,
SetLoadTrig : SetLoadTrig_B,
- SetMode: SetMode_B,
+ SetMode : SetMode_B,
ResetCapFlags : ResetCapFlags_B,
- MyCRA: LP_CR0A,
- MyCRB: LP_CR0B,
+ MyCRA : LP_CR0A,
+ MyCRB : LP_CR0B,
MyLatchLsw : LP_CNTR0BLSW,
MyEventBits : EVBITS(3),
},
GetEnable:GetEnable_B,
GetIntSrc : GetIntSrc_B,
GetLoadTrig : GetLoadTrig_B,
- GetMode: GetMode_B,
+ GetMode : GetMode_B,
PulseIndex : PulseIndex_B,
SetEnable : SetEnable_B,
SetIntSrc : SetIntSrc_B,
SetLoadTrig : SetLoadTrig_B,
- SetMode: SetMode_B,
+ SetMode : SetMode_B,
ResetCapFlags : ResetCapFlags_B,
- MyCRA: LP_CR1A,
- MyCRB: LP_CR1B,
+ MyCRA : LP_CR1A,
+ MyCRB : LP_CR1B,
MyLatchLsw : LP_CNTR1BLSW,
MyEventBits : EVBITS(4),
},
GetEnable:GetEnable_B,
GetIntSrc : GetIntSrc_B,
GetLoadTrig : GetLoadTrig_B,
- GetMode: GetMode_B,
+ GetMode : GetMode_B,
PulseIndex : PulseIndex_B,
SetEnable : SetEnable_B,
SetIntSrc : SetIntSrc_B,
SetLoadTrig : SetLoadTrig_B,
- SetMode: SetMode_B,
+ SetMode : SetMode_B,
ResetCapFlags : ResetCapFlags_B,
- MyCRA: LP_CR2A,
- MyCRB: LP_CR2B,
+ MyCRA : LP_CR2A,
+ MyCRB : LP_CR2B,
MyLatchLsw : LP_CNTR2BLSW,
MyEventBits : EVBITS(5),
},
/* enab/disable a function or test status bit(s) that are accessed */
/* through Main Control Registers 1 or 2. */
-#define MC_ENABLE( REGADRS, CTRLWORD ) writel( ( (uint32_t)( CTRLWORD ) << 16 ) | (uint32_t)( CTRLWORD ), devpriv->base_addr+( REGADRS ) )
+#define MC_ENABLE(REGADRS, CTRLWORD) writel(((uint32_t)(CTRLWORD) << 16) | (uint32_t)(CTRLWORD), devpriv->base_addr+(REGADRS))
-#define MC_DISABLE( REGADRS, CTRLWORD ) writel( (uint32_t)( CTRLWORD ) << 16 , devpriv->base_addr+( REGADRS ) )
+#define MC_DISABLE(REGADRS, CTRLWORD) writel((uint32_t)(CTRLWORD) << 16 , devpriv->base_addr+(REGADRS))
-#define MC_TEST( REGADRS, CTRLWORD ) ( ( readl(devpriv->base_addr+( REGADRS )) & CTRLWORD ) != 0 )
+#define MC_TEST(REGADRS, CTRLWORD) ((readl(devpriv->base_addr+(REGADRS)) & CTRLWORD) != 0)
/* #define WR7146(REGARDS,CTRLWORD)
writel(CTRLWORD,(uint32_t)(devpriv->base_addr+(REGARDS))) */
readl((uint32_t)(devpriv->base_addr+(REGARDS))) */
#define RR7146(REGARDS) readl(devpriv->base_addr+(REGARDS))
-#define BUGFIX_STREG(REGADRS) ( REGADRS - 4 )
+#define BUGFIX_STREG(REGADRS) (REGADRS - 4)
/* Write a time slot control record to TSL2. */
-#define VECTPORT( VECTNUM ) (P_TSL2 + ( (VECTNUM) << 2 ))
-#define SETVECT( VECTNUM, VECTVAL ) WR7146(VECTPORT( VECTNUM ), (VECTVAL))
+#define VECTPORT(VECTNUM) (P_TSL2 + ((VECTNUM) << 2))
+#define SETVECT(VECTNUM, VECTVAL) WR7146(VECTPORT(VECTNUM), (VECTVAL))
/* Code macros used for constructing I2C command bytes. */
-#define I2C_B2(ATTR, VAL) ( ( (ATTR) << 6 ) | ( (VAL) << 24 ) )
-#define I2C_B1(ATTR, VAL) ( ( (ATTR) << 4 ) | ( (VAL) << 16 ) )
-#define I2C_B0(ATTR, VAL) ( ( (ATTR) << 2 ) | ( (VAL) << 8 ) )
+#define I2C_B2(ATTR, VAL) (((ATTR) << 6) | ((VAL) << 24))
+#define I2C_B1(ATTR, VAL) (((ATTR) << 4) | ((VAL) << 16))
+#define I2C_B0(ATTR, VAL) (((ATTR) << 2) | ((VAL) << 8))
-static const comedi_lrange s626_range_table = { 2, {
+static const struct comedi_lrange s626_range_table = { 2, {
RANGE(-5, 5),
RANGE(-10, 10),
}
};
-static int s626_attach(comedi_device *dev, comedi_devconfig *it)
+static int s626_attach(struct comedi_device *dev, struct comedi_devconfig *it)
{
/* uint8_t PollList; */
/* uint16_t AdcData; */
int ret;
resource_size_t resourceStart;
dma_addr_t appdma;
- comedi_subdevice *s;
+ struct comedi_subdevice *s;
struct pci_dev *pdev;
- if (alloc_private(dev, sizeof(s626_private)) < 0)
+ if (alloc_private(dev, sizeof(struct s626_private)) < 0)
return -ENOMEM;
for (pdev = pci_get_device(PCI_VENDOR_ID_S626, PCI_DEVICE_ID_S626,
return -ENODEV;
}
- if ((result = comedi_pci_enable(pdev, "s626")) < 0) {
+ result = comedi_pci_enable(pdev, "s626");
+ if (result < 0) {
printk("s626_attach: comedi_pci_enable fails\n");
return -ENODEV;
}
/* adc buffer allocation */
devpriv->allocatedBuf = 0;
- if ((devpriv->ANABuf.LogicalBase =
- pci_alloc_consistent(devpriv->pdev, DMABUF_SIZE,
- &appdma)) == NULL) {
+ devpriv->ANABuf.LogicalBase =
+ pci_alloc_consistent(devpriv->pdev, DMABUF_SIZE, &appdma);
+
+ if (devpriv->ANABuf.LogicalBase == NULL) {
printk("s626_attach: DMA Memory mapping error\n");
return -ENOMEM;
}
devpriv->allocatedBuf++;
- if ((devpriv->RPSBuf.LogicalBase =
- pci_alloc_consistent(devpriv->pdev, DMABUF_SIZE,
- &appdma)) == NULL) {
+ devpriv->RPSBuf.LogicalBase =
+ pci_alloc_consistent(devpriv->pdev, DMABUF_SIZE, &appdma);
+
+ if (devpriv->RPSBuf.LogicalBase == NULL) {
printk("s626_attach: DMA Memory mapping error\n");
return -ENOMEM;
}
if (dev->irq == 0) {
printk(" unknown irq (bad)\n");
} else {
- if ((ret = comedi_request_irq(dev->irq, s626_irq_handler,
- IRQF_SHARED, "s626", dev)) < 0) {
+ ret = comedi_request_irq(dev->irq, s626_irq_handler,
+ IRQF_SHARED, "s626", dev);
+
+ if (ret < 0) {
printk(" irq not available\n");
dev->irq = 0;
}
/* Write I2C control: abort any I2C activity. */
MC_ENABLE(P_MC2, MC2_UPLD_IIC);
/* Invoke command upload */
- while ((RR7146(P_MC2) & MC2_UPLD_IIC) == 0);
+ while ((RR7146(P_MC2) & MC2_UPLD_IIC) == 0)
+ ;
/* and wait for upload to complete. */
/* Per SAA7146 data sheet, write to STATUS reg twice to
WR7146(P_I2CSTAT, I2C_CLKSEL);
/* Write I2C control: reset error flags. */
MC_ENABLE(P_MC2, MC2_UPLD_IIC); /* Invoke command upload */
- while (!MC_TEST(P_MC2, MC2_UPLD_IIC));
+ while (!MC_TEST(P_MC2, MC2_UPLD_IIC))
+ ;
/* and wait for upload to complete. */
}
return 1;
}
-static lsampl_t s626_ai_reg_to_uint(int data)
+static unsigned int s626_ai_reg_to_uint(int data)
{
- lsampl_t tempdata;
+ unsigned int tempdata;
tempdata = (data >> 18);
if (tempdata & 0x2000)
return tempdata;
}
-/* static lsampl_t s626_uint_to_reg(comedi_subdevice *s, int data){ */
+/* static unsigned int s626_uint_to_reg(struct comedi_subdevice *s, int data){ */
/* return 0; */
/* } */
static irqreturn_t s626_irq_handler(int irq, void *d PT_REGS_ARG)
{
- comedi_device *dev = d;
- comedi_subdevice *s;
- comedi_cmd *cmd;
- enc_private *k;
+ struct comedi_device *dev = d;
+ struct comedi_subdevice *s;
+ struct comedi_cmd *cmd;
+ struct enc_private *k;
unsigned long flags;
int32_t *readaddr;
uint32_t irqtype, irqstatus;
int i = 0;
- sampl_t tempdata;
+ short tempdata;
uint8_t group;
uint16_t irqbit;
irqbit = 0;
/* read interrupt type */
irqbit = DEBIread(dev,
- ((dio_private *) (dev->subdevices + 2 +
+ ((struct dio_private *) (dev->subdevices + 2 +
group)->private)->RDCapFlg);
/* check if interrupt is generated from dio channels */
return IRQ_HANDLED;
}
-static int s626_detach(comedi_device *dev)
+static int s626_detach(struct comedi_device *dev)
{
if (devpriv) {
/* stop ai_command */
CloseDMAB(dev, &devpriv->ANABuf, DMABUF_SIZE);
}
- if (dev->irq) {
+ if (dev->irq)
comedi_free_irq(dev->irq, dev);
- }
- if (devpriv->base_addr) {
+ if (devpriv->base_addr)
iounmap(devpriv->base_addr);
- }
if (devpriv->pdev) {
- if (devpriv->got_regions) {
+ if (devpriv->got_regions)
comedi_pci_disable(devpriv->pdev);
- }
pci_dev_put(devpriv->pdev);
}
}
/*
* this functions build the RPS program for hardware driven acquistion
*/
-void ResetADC(comedi_device *dev, uint8_t *ppl)
+void ResetADC(struct comedi_device *dev, uint8_t *ppl)
{
register uint32_t *pRPS;
uint32_t JmpAdrs;
uint16_t i;
uint16_t n;
uint32_t LocalPPL;
- comedi_cmd *cmd = &(dev->subdevices->async->cmd);
+ struct comedi_cmd *cmd = &(dev->subdevices->async->cmd);
/* Stop RPS program in case it is currently running. */
MC_DISABLE(P_MC1, MC1_ERPS1);
}
/* TO COMPLETE, IF NECESSARY */
-static int s626_ai_insn_config(comedi_device *dev, comedi_subdevice *s,
- comedi_insn *insn, lsampl_t *data)
+static int s626_ai_insn_config(struct comedi_device *dev, struct comedi_subdevice *s,
+ struct comedi_insn *insn, unsigned int *data)
{
return -EINVAL;
}
-/* static int s626_ai_rinsn(comedi_device *dev,comedi_subdevice *s,comedi_insn *insn,lsampl_t *data) */
+/* static int s626_ai_rinsn(struct comedi_device *dev,struct comedi_subdevice *s,struct comedi_insn *insn,unsigned int *data) */
/* { */
/* register uint8_t i; */
/* register int32_t *readaddr; */
/* return i; */
/* } */
-static int s626_ai_insn_read(comedi_device *dev, comedi_subdevice *s,
- comedi_insn *insn, lsampl_t *data)
+static int s626_ai_insn_read(struct comedi_device *dev, struct comedi_subdevice *s,
+ struct comedi_insn *insn, unsigned int *data)
{
uint16_t chan = CR_CHAN(insn->chanspec);
uint16_t range = CR_RANGE(insn->chanspec);
/* shift into FB BUFFER 1 register. */
/* Wait for ADC done. */
- while (!(RR7146(P_PSR) & PSR_GPIO2)) ;
+ while (!(RR7146(P_PSR) & PSR_GPIO2))
+ ;
/* Fetch ADC data. */
if (n != 0)
/* Wait for the data to arrive in FB BUFFER 1 register. */
/* Wait for ADC done. */
- while (!(RR7146(P_PSR) & PSR_GPIO2)) ;
+ while (!(RR7146(P_PSR) & PSR_GPIO2))
+ ;
/* Fetch ADC data from audio interface's input shift register. */
return n;
}
-static int s626_ai_load_polllist(uint8_t *ppl, comedi_cmd *cmd)
+static int s626_ai_load_polllist(uint8_t *ppl, struct comedi_cmd *cmd)
{
int n;
return n;
}
-static int s626_ai_inttrig(comedi_device *dev, comedi_subdevice *s,
+static int s626_ai_inttrig(struct comedi_device *dev, struct comedi_subdevice *s,
unsigned int trignum)
{
if (trignum != 0)
}
/* TO COMPLETE */
-static int s626_ai_cmd(comedi_device *dev, comedi_subdevice *s)
+static int s626_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
{
uint8_t ppl[16];
- comedi_cmd *cmd = &s->async->cmd;
- enc_private *k;
+ struct comedi_cmd *cmd = &s->async->cmd;
+ struct enc_private *k;
int tick;
DEBUG("s626_ai_cmd: entering command function\n");
return 0;
}
-static int s626_ai_cmdtest(comedi_device *dev, comedi_subdevice *s,
- comedi_cmd *cmd)
+static int s626_ai_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
+ struct comedi_cmd *cmd)
{
int err = 0;
int tmp;
return 0;
}
-static int s626_ai_cancel(comedi_device *dev, comedi_subdevice *s)
+static int s626_ai_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
{
/* Stop RPS program in case it is currently running. */
MC_DISABLE(P_MC1, MC1_ERPS1);
return divider - 1;
}
-static int s626_ao_winsn(comedi_device *dev, comedi_subdevice *s,
- comedi_insn *insn, lsampl_t *data)
+static int s626_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
+ struct comedi_insn *insn, unsigned int *data)
{
int i;
return i;
}
-static int s626_ao_rinsn(comedi_device *dev, comedi_subdevice *s,
- comedi_insn *insn, lsampl_t *data)
+static int s626_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
+ struct comedi_insn *insn, unsigned int *data)
{
int i;
- for (i = 0; i < insn->n; i++) {
+ for (i = 0; i < insn->n; i++)
data[i] = devpriv->ao_readback[CR_CHAN(insn->chanspec)];
- }
return i;
}
* ports A, B and C, respectively.
*/
-static void s626_dio_init(comedi_device *dev)
+static void s626_dio_init(struct comedi_device *dev)
{
uint16_t group;
- comedi_subdevice *s;
+ struct comedi_subdevice *s;
/* Prepare to treat writes to WRCapSel as capture disables. */
DEBIwrite(dev, LP_MISC1, MISC1_NOEDCAP);
* This allows packed reading/writing of the DIO channels. The comedi
* core can convert between insn_bits and insn_read/write */
-static int s626_dio_insn_bits(comedi_device *dev, comedi_subdevice *s,
- comedi_insn *insn, lsampl_t *data)
+static int s626_dio_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s,
+ struct comedi_insn *insn, unsigned int *data)
{
/* Length of data must be 2 (mask and new data, see below) */
- if (insn->n == 0) {
+ if (insn->n == 0)
return 0;
- }
+
if (insn->n != 2) {
printk("comedi%d: s626: s626_dio_insn_bits(): Invalid instruction length\n", dev->minor);
return -EINVAL;
return 2;
}
-static int s626_dio_insn_config(comedi_device *dev, comedi_subdevice *s,
- comedi_insn *insn, lsampl_t *data)
+static int s626_dio_insn_config(struct comedi_device *dev, struct comedi_subdevice *s,
+ struct comedi_insn *insn, unsigned int *data)
{
switch (data[0]) {
return 1;
}
-static int s626_dio_set_irq(comedi_device *dev, unsigned int chan)
+static int s626_dio_set_irq(struct comedi_device *dev, unsigned int chan)
{
unsigned int group;
unsigned int bitmask;
/* set channel to capture positive edge */
status = DEBIread(dev,
- ((dio_private *) (dev->subdevices + 2 +
+ ((struct dio_private *) (dev->subdevices + 2 +
group)->private)->RDEdgSel);
DEBIwrite(dev,
- ((dio_private *) (dev->subdevices + 2 +
+ ((struct dio_private *) (dev->subdevices + 2 +
group)->private)->WREdgSel, bitmask | status);
/* enable interrupt on selected channel */
status = DEBIread(dev,
- ((dio_private *) (dev->subdevices + 2 +
+ ((struct dio_private *) (dev->subdevices + 2 +
group)->private)->RDIntSel);
DEBIwrite(dev,
- ((dio_private *) (dev->subdevices + 2 +
+ ((struct dio_private *) (dev->subdevices + 2 +
group)->private)->WRIntSel, bitmask | status);
/* enable edge capture write command */
/* enable edge capture on selected channel */
status = DEBIread(dev,
- ((dio_private *) (dev->subdevices + 2 +
+ ((struct dio_private *) (dev->subdevices + 2 +
group)->private)->RDCapSel);
DEBIwrite(dev,
- ((dio_private *) (dev->subdevices + 2 +
+ ((struct dio_private *) (dev->subdevices + 2 +
group)->private)->WRCapSel, bitmask | status);
return 0;
}
-static int s626_dio_reset_irq(comedi_device *dev, unsigned int group,
+static int s626_dio_reset_irq(struct comedi_device *dev, unsigned int group,
unsigned int mask)
{
DEBUG("s626_dio_reset_irq: disable interrupt on dio channel %d group %d\n", mask, group);
/* enable edge capture on selected channel */
DEBIwrite(dev,
- ((dio_private *) (dev->subdevices + 2 +
+ ((struct dio_private *) (dev->subdevices + 2 +
group)->private)->WRCapSel, mask);
return 0;
}
-static int s626_dio_clear_irq(comedi_device *dev)
+static int s626_dio_clear_irq(struct comedi_device *dev)
{
unsigned int group;
for (group = 0; group < S626_DIO_BANKS; group++) {
/* clear pending events and interrupt */
DEBIwrite(dev,
- ((dio_private *) (dev->subdevices + 2 +
+ ((struct dio_private *) (dev->subdevices + 2 +
group)->private)->WRCapSel, 0xffff);
}
/* Now this function initializes the value of the counter (data[0])
and set the subdevice. To complete with trigger and interrupt
configuration */
-static int s626_enc_insn_config(comedi_device *dev, comedi_subdevice *s,
- comedi_insn *insn, lsampl_t *data)
+static int s626_enc_insn_config(struct comedi_device *dev, struct comedi_subdevice *s,
+ struct comedi_insn *insn, unsigned int *data)
{
uint16_t Setup = (LOADSRC_INDX << BF_LOADSRC) | /* Preload upon */
/* index. */
/* uint32_t Preloadvalue; //Counter initial value */
uint16_t valueSrclatch = LATCHSRC_AB_READ;
uint16_t enab = CLKENAB_ALWAYS;
- enc_private *k = &encpriv[CR_CHAN(insn->chanspec)];
+ struct enc_private *k = &encpriv[CR_CHAN(insn->chanspec)];
DEBUG("s626_enc_insn_config: encoder config\n");
return insn->n;
}
-static int s626_enc_insn_read(comedi_device *dev, comedi_subdevice *s,
- comedi_insn *insn, lsampl_t *data)
+static int s626_enc_insn_read(struct comedi_device *dev, struct comedi_subdevice *s,
+ struct comedi_insn *insn, unsigned int *data)
{
int n;
- enc_private *k = &encpriv[CR_CHAN(insn->chanspec)];
+ struct enc_private *k = &encpriv[CR_CHAN(insn->chanspec)];
DEBUG("s626_enc_insn_read: encoder read channel %d \n",
CR_CHAN(insn->chanspec));
return n;
}
-static int s626_enc_insn_write(comedi_device *dev, comedi_subdevice *s,
- comedi_insn *insn, lsampl_t *data)
+static int s626_enc_insn_write(struct comedi_device *dev, struct comedi_subdevice *s,
+ struct comedi_insn *insn, unsigned int *data)
{
- enc_private *k = &encpriv[CR_CHAN(insn->chanspec)];
+ struct enc_private *k = &encpriv[CR_CHAN(insn->chanspec)];
DEBUG("s626_enc_insn_write: encoder write channel %d \n",
CR_CHAN(insn->chanspec));
return 1;
}
-static void s626_timer_load(comedi_device *dev, enc_private *k, int tick)
+static void s626_timer_load(struct comedi_device *dev, struct enc_private *k, int tick)
{
uint16_t Setup = (LOADSRC_INDX << BF_LOADSRC) | /* Preload upon */
/* index. */
/* *********** DAC FUNCTIONS *********** */
/* Slot 0 base settings. */
-#define VECT0 ( XSD2 | RSD3 | SIB_A2 )
+#define VECT0 (XSD2 | RSD3 | SIB_A2)
/* Slot 0 always shifts in 0xFF and store it to FB_BUFFER2. */
/* TrimDac LogicalChan-to-PhysicalChan mapping table. */
static uint8_t trimadrs[] =
{ 0x40, 0x41, 0x42, 0x50, 0x51, 0x52, 0x53, 0x60, 0x61, 0x62, 0x63 };
-static void LoadTrimDACs(comedi_device *dev)
+static void LoadTrimDACs(struct comedi_device *dev)
{
register uint8_t i;
WriteTrimDAC(dev, i, I2Cread(dev, trimadrs[i]));
}
-static void WriteTrimDAC(comedi_device *dev, uint8_t LogicalChan,
+static void WriteTrimDAC(struct comedi_device *dev, uint8_t LogicalChan,
uint8_t DacData)
{
uint32_t chan;
/* ************** EEPROM ACCESS FUNCTIONS ************** */
/* Read uint8_t from EEPROM. */
-static uint8_t I2Cread(comedi_device *dev, uint8_t addr)
+static uint8_t I2Cread(struct comedi_device *dev, uint8_t addr)
{
uint8_t rtnval;
/* Byte2 = I2C command: write to I2C EEPROM device. */
| I2C_B1(I2C_ATTRSTOP, addr)
/* Byte1 = EEPROM internal target address. */
- | I2C_B0(I2C_ATTRNOP, 0))) /* Byte0 = Not sent. */
- {
+ | I2C_B0(I2C_ATTRNOP, 0))) { /* Byte0 = Not sent. */
/* Abort function and declare error if handshake failed. */
DEBUG("I2Cread: error handshake I2Cread a\n");
return 0;
| I2C_B1(I2C_ATTRSTOP, 0) /* Byte1 receives */
/* uint8_t from */
/* EEPROM. */
- | I2C_B0(I2C_ATTRNOP, 0))) /* Byte0 = Not */
- /* sent. */
- {
+ | I2C_B0(I2C_ATTRNOP, 0))) { /* Byte0 = Not sent. */
+
/* Abort function and declare error if handshake failed. */
DEBUG("I2Cread: error handshake I2Cread b\n");
return 0;
return rtnval;
}
-static uint32_t I2Chandshake(comedi_device *dev, uint32_t val)
+static uint32_t I2Chandshake(struct comedi_device *dev, uint32_t val)
{
/* Write I2C command to I2C Transfer Control shadow register. */
WR7146(P_I2CCTRL, val);
/* upload confirmation. */
MC_ENABLE(P_MC2, MC2_UPLD_IIC);
- while (!MC_TEST(P_MC2, MC2_UPLD_IIC)) ;
+ while (!MC_TEST(P_MC2, MC2_UPLD_IIC))
+ ;
/* Wait until I2C bus transfer is finished or an error occurs. */
- while ((RR7146(P_I2CCTRL) & (I2C_BUSY | I2C_ERR)) == I2C_BUSY) ;
+ while ((RR7146(P_I2CCTRL) & (I2C_BUSY | I2C_ERR)) == I2C_BUSY)
+ ;
/* Return non-zero if I2C error occured. */
return RR7146(P_I2CCTRL) & I2C_ERR;
/* Private helper function: Write setpoint to an application DAC channel. */
-static void SetDAC(comedi_device *dev, uint16_t chan, short dacdata)
+static void SetDAC(struct comedi_device *dev, uint16_t chan, short dacdata)
{
register uint16_t signmask;
register uint32_t WSImage;
* Dacpol contains valid target image.
*/
-static void SendDAC(comedi_device *dev, uint32_t val)
+static void SendDAC(struct comedi_device *dev, uint32_t val)
{
/* START THE SERIAL CLOCK RUNNING ------------- */
* Done by polling the DMAC enable flag; this flag is automatically
* cleared when the transfer has finished.
*/
- while ((RR7146(P_MC1) & MC1_A2OUT) != 0) ;
+ while ((RR7146(P_MC1) & MC1_A2OUT) != 0)
+ ;
/* START THE OUTPUT STREAM TO THE TARGET DAC -------------------- */
* finished transferring the DAC's data DWORD from the output FIFO
* to the output buffer register.
*/
- while ((RR7146(P_SSR) & SSR_AF2_OUT) == 0) ;
+ while ((RR7146(P_SSR) & SSR_AF2_OUT) == 0)
+ ;
/* Set up to trap execution at slot 0 when the TSL sequencer cycles
* back to slot 0 after executing the EOS in slot 5. Also,
* from 0xFF to 0x00, which slot 0 causes to happen by shifting
* out/in on SD2 the 0x00 that is always referenced by slot 5.
*/
- while ((RR7146(P_FB_BUFFER2) & 0xFF000000) != 0) ;
+ while ((RR7146(P_FB_BUFFER2) & 0xFF000000) != 0)
+ ;
}
/* Either (1) we were too late setting the slot 0 trap; the TSL
* sequencer restarted slot 0 before we could set the EOS trap flag,
* the next DAC write. This is detected when FB_BUFFER2 MSB changes
* from 0x00 to 0xFF.
*/
- while ((RR7146(P_FB_BUFFER2) & 0xFF000000) == 0) ;
+ while ((RR7146(P_FB_BUFFER2) & 0xFF000000) == 0)
+ ;
}
-static void WriteMISC2(comedi_device *dev, uint16_t NewImage)
+static void WriteMISC2(struct comedi_device *dev, uint16_t NewImage)
{
DEBIwrite(dev, LP_MISC1, MISC1_WENABLE); /* enab writes to */
/* MISC2 register. */
/* Initialize the DEBI interface for all transfers. */
-static uint16_t DEBIread(comedi_device *dev, uint16_t addr)
+static uint16_t DEBIread(struct comedi_device *dev, uint16_t addr)
{
uint16_t retval;
/* Execute a DEBI transfer. This must be called from within a */
/* critical section. */
-static void DEBItransfer(comedi_device *dev)
+static void DEBItransfer(struct comedi_device *dev)
{
/* Initiate upload of shadow RAM to DEBI control register. */
MC_ENABLE(P_MC2, MC2_UPLD_DEBI);
/* Wait for completion of upload from shadow RAM to DEBI control */
/* register. */
- while (!MC_TEST(P_MC2, MC2_UPLD_DEBI)) ;
+ while (!MC_TEST(P_MC2, MC2_UPLD_DEBI))
+ ;
/* Wait until DEBI transfer is done. */
- while (RR7146(P_PSR) & PSR_DEBI_S) ;
+ while (RR7146(P_PSR) & PSR_DEBI_S)
+ ;
}
/* Write a value to a gate array register. */
-static void DEBIwrite(comedi_device *dev, uint16_t addr, uint16_t wdata)
+static void DEBIwrite(struct comedi_device *dev, uint16_t addr, uint16_t wdata)
{
/* Set up DEBI control register value in shadow RAM. */
* specifies bits that are to be preserved, wdata is new value to be
* or'd with the masked original.
*/
-static void DEBIreplace(comedi_device *dev, uint16_t addr, uint16_t mask,
+static void DEBIreplace(struct comedi_device *dev, uint16_t addr, uint16_t mask,
uint16_t wdata)
{
DEBItransfer(dev); /* Execute the DEBI Write transfer. */
}
-static void CloseDMAB(comedi_device *dev, DMABUF *pdma, size_t bsize)
+static void CloseDMAB(struct comedi_device *dev, struct bufferDMA *pdma, size_t bsize)
{
void *vbptr;
dma_addr_t vpptr;
/* Read a counter's output latch. */
-static uint32_t ReadLatch(comedi_device *dev, enc_private *k)
+static uint32_t ReadLatch(struct comedi_device *dev, struct enc_private *k)
{
register uint32_t value;
/* DEBUG FIXME DEBUG("ReadLatch: Read Latch enter\n"); */
/* Reset a counter's index and overflow event capture flags. */
-static void ResetCapFlags_A(comedi_device *dev, enc_private *k)
+static void ResetCapFlags_A(struct comedi_device *dev, struct enc_private *k)
{
DEBIreplace(dev, k->MyCRB, (uint16_t) (~CRBMSK_INTCTRL),
CRBMSK_INTRESETCMD | CRBMSK_INTRESET_A);
}
-static void ResetCapFlags_B(comedi_device *dev, enc_private *k)
+static void ResetCapFlags_B(struct comedi_device *dev, struct enc_private *k)
{
DEBIreplace(dev, k->MyCRB, (uint16_t) (~CRBMSK_INTCTRL),
CRBMSK_INTRESETCMD | CRBMSK_INTRESET_B);
/* Return counter setup in a format (COUNTER_SETUP) that is consistent */
/* for both A and B counters. */
-static uint16_t GetMode_A(comedi_device *dev, enc_private *k)
+static uint16_t GetMode_A(struct comedi_device *dev, struct enc_private *k)
{
register uint16_t cra;
register uint16_t crb;
return setup;
}
-static uint16_t GetMode_B(comedi_device *dev, enc_private *k)
+static uint16_t GetMode_B(struct comedi_device *dev, struct enc_private *k)
{
register uint16_t cra;
register uint16_t crb;
* ClkPol, ClkEnab, IndexSrc, IndexPol, LoadSrc.
*/
-static void SetMode_A(comedi_device *dev, enc_private *k, uint16_t Setup,
+static void SetMode_A(struct comedi_device *dev, struct enc_private *k, uint16_t Setup,
uint16_t DisableIntSrc)
{
register uint16_t cra;
(uint16_t) (~(CRBMSK_INTCTRL | CRBMSK_CLKENAB_A)), crb);
}
-static void SetMode_B(comedi_device *dev, enc_private *k, uint16_t Setup,
+static void SetMode_B(struct comedi_device *dev, struct enc_private *k, uint16_t Setup,
uint16_t DisableIntSrc)
{
register uint16_t cra;
/* Return/set a counter's enable. enab: 0=always enabled, 1=enabled by index. */
-static void SetEnable_A(comedi_device *dev, enc_private *k, uint16_t enab)
+static void SetEnable_A(struct comedi_device *dev, struct enc_private *k, uint16_t enab)
{
DEBUG("SetEnable_A: SetEnable_A enter 3541\n");
DEBIreplace(dev, k->MyCRB,
(uint16_t) (enab << CRBBIT_CLKENAB_A));
}
-static void SetEnable_B(comedi_device *dev, enc_private *k, uint16_t enab)
+static void SetEnable_B(struct comedi_device *dev, struct enc_private *k, uint16_t enab)
{
DEBIreplace(dev, k->MyCRB,
(uint16_t) (~(CRBMSK_INTCTRL | CRBMSK_CLKENAB_B)),
(uint16_t) (enab << CRBBIT_CLKENAB_B));
}
-static uint16_t GetEnable_A(comedi_device *dev, enc_private *k)
+static uint16_t GetEnable_A(struct comedi_device *dev, struct enc_private *k)
{
return (DEBIread(dev, k->MyCRB) >> CRBBIT_CLKENAB_A) & 1;
}
-static uint16_t GetEnable_B(comedi_device *dev, enc_private *k)
+static uint16_t GetEnable_B(struct comedi_device *dev, struct enc_private *k)
{
return (DEBIread(dev, k->MyCRB) >> CRBBIT_CLKENAB_B) & 1;
}
* latches B.
*/
-static void SetLatchSource(comedi_device *dev, enc_private *k, uint16_t value)
+static void SetLatchSource(struct comedi_device *dev, struct enc_private *k, uint16_t value)
{
DEBUG("SetLatchSource: SetLatchSource enter 3550 \n");
DEBIreplace(dev, k->MyCRB,
}
/*
- * static uint16_t GetLatchSource(comedi_device *dev, enc_private *k )
+ * static uint16_t GetLatchSource(struct comedi_device *dev, struct enc_private *k )
* {
* return ( DEBIread( dev, k->MyCRB) >> CRBBIT_LATCHSRC ) & 3;
* }
* 2=OverflowA (B counters only), 3=disabled.
*/
-static void SetLoadTrig_A(comedi_device *dev, enc_private *k, uint16_t Trig)
+static void SetLoadTrig_A(struct comedi_device *dev, struct enc_private *k, uint16_t Trig)
{
DEBIreplace(dev, k->MyCRA, (uint16_t) (~CRAMSK_LOADSRC_A),
(uint16_t) (Trig << CRABIT_LOADSRC_A));
}
-static void SetLoadTrig_B(comedi_device *dev, enc_private *k, uint16_t Trig)
+static void SetLoadTrig_B(struct comedi_device *dev, struct enc_private *k, uint16_t Trig)
{
DEBIreplace(dev, k->MyCRB,
(uint16_t) (~(CRBMSK_LOADSRC_B | CRBMSK_INTCTRL)),
(uint16_t) (Trig << CRBBIT_LOADSRC_B));
}
-static uint16_t GetLoadTrig_A(comedi_device *dev, enc_private *k)
+static uint16_t GetLoadTrig_A(struct comedi_device *dev, struct enc_private *k)
{
return (DEBIread(dev, k->MyCRA) >> CRABIT_LOADSRC_A) & 3;
}
-static uint16_t GetLoadTrig_B(comedi_device *dev, enc_private *k)
+static uint16_t GetLoadTrig_B(struct comedi_device *dev, struct enc_private *k)
{
return (DEBIread(dev, k->MyCRB) >> CRBBIT_LOADSRC_B) & 3;
}
* 2=IndexOnly, 3=IndexAndOverflow.
*/
-static void SetIntSrc_A(comedi_device *dev, enc_private *k,
+static void SetIntSrc_A(struct comedi_device *dev, struct enc_private *k,
uint16_t IntSource)
{
/* Reset any pending counter overflow or index captures. */
MyEventBits[IntSource];
}
-static void SetIntSrc_B(comedi_device *dev, enc_private *k,
+static void SetIntSrc_B(struct comedi_device *dev, struct enc_private *k,
uint16_t IntSource)
{
uint16_t crb;
MyEventBits[IntSource];
}
-static uint16_t GetIntSrc_A(comedi_device *dev, enc_private *k)
+static uint16_t GetIntSrc_A(struct comedi_device *dev, struct enc_private *k)
{
return (DEBIread(dev, k->MyCRA) >> CRABIT_INTSRC_A) & 3;
}
-static uint16_t GetIntSrc_B(comedi_device *dev, enc_private *k)
+static uint16_t GetIntSrc_B(struct comedi_device *dev, struct enc_private *k)
{
return (DEBIread(dev, k->MyCRB) >> CRBBIT_INTSRC_B) & 3;
}
/* Return/set the clock multiplier. */
-/* static void SetClkMult(comedi_device *dev, enc_private *k, uint16_t value ) */
+/* static void SetClkMult(struct comedi_device *dev, struct enc_private *k, uint16_t value ) */
/* { */
/* k->SetMode(dev, k, (uint16_t)( ( k->GetMode(dev, k ) & ~STDMSK_CLKMULT ) | ( value << STDBIT_CLKMULT ) ), FALSE ); */
/* } */
-/* static uint16_t GetClkMult(comedi_device *dev, enc_private *k ) */
+/* static uint16_t GetClkMult(struct comedi_device *dev, struct enc_private *k ) */
/* { */
/* return ( k->GetMode(dev, k ) >> STDBIT_CLKMULT ) & 3; */
/* } */
/* Return/set the clock polarity. */
-/* static void SetClkPol( comedi_device *dev,enc_private *k, uint16_t value ) */
+/* static void SetClkPol( struct comedi_device *dev,struct enc_private *k, uint16_t value ) */
/* { */
/* k->SetMode(dev, k, (uint16_t)( ( k->GetMode(dev, k ) & ~STDMSK_CLKPOL ) | ( value << STDBIT_CLKPOL ) ), FALSE ); */
/* } */
-/* static uint16_t GetClkPol(comedi_device *dev, enc_private *k ) */
+/* static uint16_t GetClkPol(struct comedi_device *dev, struct enc_private *k ) */
/* { */
/* return ( k->GetMode(dev, k ) >> STDBIT_CLKPOL ) & 1; */
/* } */
/* Return/set the clock source. */
-/* static void SetClkSrc( comedi_device *dev,enc_private *k, uint16_t value ) */
+/* static void SetClkSrc( struct comedi_device *dev,struct enc_private *k, uint16_t value ) */
/* { */
/* k->SetMode(dev, k, (uint16_t)( ( k->GetMode(dev, k ) & ~STDMSK_CLKSRC ) | ( value << STDBIT_CLKSRC ) ), FALSE ); */
/* } */
-/* static uint16_t GetClkSrc( comedi_device *dev,enc_private *k ) */
+/* static uint16_t GetClkSrc( struct comedi_device *dev,struct enc_private *k ) */
/* { */
/* return ( k->GetMode(dev, k ) >> STDBIT_CLKSRC ) & 3; */
/* } */
/* Return/set the index polarity. */
-/* static void SetIndexPol(comedi_device *dev, enc_private *k, uint16_t value ) */
+/* static void SetIndexPol(struct comedi_device *dev, struct enc_private *k, uint16_t value ) */
/* { */
/* k->SetMode(dev, k, (uint16_t)( ( k->GetMode(dev, k ) & ~STDMSK_INDXPOL ) | ( (value != 0) << STDBIT_INDXPOL ) ), FALSE ); */
/* } */
-/* static uint16_t GetIndexPol(comedi_device *dev, enc_private *k ) */
+/* static uint16_t GetIndexPol(struct comedi_device *dev, struct enc_private *k ) */
/* { */
/* return ( k->GetMode(dev, k ) >> STDBIT_INDXPOL ) & 1; */
/* } */
/* Return/set the index source. */
-/* static void SetIndexSrc(comedi_device *dev, enc_private *k, uint16_t value ) */
+/* static void SetIndexSrc(struct comedi_device *dev, struct enc_private *k, uint16_t value ) */
/* { */
/* DEBUG("SetIndexSrc: set index src enter 3700\n"); */
/* k->SetMode(dev, k, (uint16_t)( ( k->GetMode(dev, k ) & ~STDMSK_INDXSRC ) | ( (value != 0) << STDBIT_INDXSRC ) ), FALSE ); */
/* } */
-/* static uint16_t GetIndexSrc(comedi_device *dev, enc_private *k ) */
+/* static uint16_t GetIndexSrc(struct comedi_device *dev, struct enc_private *k ) */
/* { */
/* return ( k->GetMode(dev, k ) >> STDBIT_INDXSRC ) & 1; */
/* } */
/* Generate an index pulse. */
-static void PulseIndex_A(comedi_device *dev, enc_private *k)
+static void PulseIndex_A(struct comedi_device *dev, struct enc_private *k)
{
register uint16_t cra;
DEBIwrite(dev, k->MyCRA, cra);
}
-static void PulseIndex_B(comedi_device *dev, enc_private *k)
+static void PulseIndex_B(struct comedi_device *dev, struct enc_private *k)
{
register uint16_t crb;
/* Write value into counter preload register. */
-static void Preload(comedi_device *dev, enc_private *k, uint32_t value)
+static void Preload(struct comedi_device *dev, struct enc_private *k, uint32_t value)
{
DEBUG("Preload: preload enter\n");
DEBIwrite(dev, (uint16_t) (k->MyLatchLsw), (uint16_t) value); /* Write value to preload register. */
(uint16_t) (value >> 16));
}
-static void CountersInit(comedi_device *dev)
+static void CountersInit(struct comedi_device *dev)
{
int chan;
- enc_private *k;
+ struct enc_private *k;
uint16_t Setup = (LOADSRC_INDX << BF_LOADSRC) | /* Preload upon */
/* index. */
(INDXSRC_SOFT << BF_INDXSRC) | /* Disable hardware index. */
projects / linux-2.6-omap-h63xx.git / blobdiff