void __iomem *mbase = musb->mregs;
struct urb *urb = next_urb(qh);
struct musb_hw_ep *hw_ep = qh->hw_ep;
- unsigned nPipe = urb->pipe;
- u8 address = usb_pipedevice(nPipe);
+ unsigned pipe = urb->pipe;
+ u8 address = usb_pipedevice(pipe);
int epnum = hw_ep->epnum;
/* initialize software qh state */
* PIO RX for a packet (or part of it).
*/
static u8 musb_host_packet_rx(struct musb *musb, struct urb *urb,
- u8 epnum, u8 bIsochError)
+ u8 epnum, u8 iso_err)
{
- u16 wRxCount;
+ u16 rx_count;
u8 *buf;
u16 csr;
- u8 bDone = FALSE;
+ u8 done = FALSE;
u32 length;
int do_flush = 0;
struct musb_hw_ep *hw_ep = musb->endpoints + epnum;
void __iomem *epio = hw_ep->regs;
struct musb_qh *qh = hw_ep->in_qh;
- int nPipe = urb->pipe;
+ int pipe = urb->pipe;
void *buffer = urb->transfer_buffer;
// musb_ep_select(mbase, epnum);
- wRxCount = musb_readw(epio, MUSB_RXCOUNT);
- DBG(3, "RX%d count %d, buffer %p len %d/%d\n", epnum, wRxCount,
+ rx_count = musb_readw(epio, MUSB_RXCOUNT);
+ DBG(3, "RX%d count %d, buffer %p len %d/%d\n", epnum, rx_count,
urb->transfer_buffer, qh->offset,
urb->transfer_buffer_length);
/* unload FIFO */
- if (usb_pipeisoc(nPipe)) {
+ if (usb_pipeisoc(pipe)) {
int status = 0;
struct usb_iso_packet_descriptor *d;
- if (bIsochError) {
+ if (iso_err) {
status = -EILSEQ;
urb->error_count++;
}
d = urb->iso_frame_desc + qh->iso_idx;
buf = buffer + d->offset;
length = d->length;
- if (wRxCount > length) {
+ if (rx_count > length) {
if (status == 0) {
status = -EOVERFLOW;
urb->error_count++;
}
- DBG(2, "** OVERFLOW %d into %d\n", wRxCount, length);
+ DBG(2, "** OVERFLOW %d into %d\n", rx_count, length);
do_flush = 1;
} else
- length = wRxCount;
+ length = rx_count;
urb->actual_length += length;
d->actual_length = length;
d->status = status;
/* see if we are done */
- bDone = (++qh->iso_idx >= urb->number_of_packets);
+ done = (++qh->iso_idx >= urb->number_of_packets);
} else {
/* non-isoch */
buf = buffer + qh->offset;
length = urb->transfer_buffer_length - qh->offset;
- if (wRxCount > length) {
+ if (rx_count > length) {
if (urb->status == -EINPROGRESS)
urb->status = -EOVERFLOW;
- DBG(2, "** OVERFLOW %d into %d\n", wRxCount, length);
+ DBG(2, "** OVERFLOW %d into %d\n", rx_count, length);
do_flush = 1;
} else
- length = wRxCount;
+ length = rx_count;
urb->actual_length += length;
qh->offset += length;
/* see if we are done */
- bDone = (urb->actual_length == urb->transfer_buffer_length)
- || (wRxCount < qh->maxpacket)
+ done = (urb->actual_length == urb->transfer_buffer_length)
+ || (rx_count < qh->maxpacket)
|| (urb->status != -EINPROGRESS);
- if (bDone
+ if (done
&& (urb->status == -EINPROGRESS)
&& (urb->transfer_flags & URB_SHORT_NOT_OK)
&& (urb->actual_length
else {
/* REVISIT this assumes AUTOCLEAR is never set */
csr &= ~(MUSB_RXCSR_RXPKTRDY | MUSB_RXCSR_H_REQPKT);
- if (!bDone)
+ if (!done)
csr |= MUSB_RXCSR_H_REQPKT;
musb_writew(epio, MUSB_RXCSR, csr);
}
- return bDone;
+ return done;
}
/* we don't always need to reinit a given side of an endpoint...
u8 * buf, u32 len)
{
struct dma_controller *dma_controller;
- struct dma_channel *pDmaChannel;
- u8 bDmaOk;
+ struct dma_channel *dma_channel;
+ u8 dma_ok;
void __iomem *mbase = musb->mregs;
struct musb_hw_ep *hw_ep = musb->endpoints + epnum;
void __iomem *epio = hw_ep->regs;
/* candidate for DMA? */
dma_controller = musb->dma_controller;
if (is_dma_capable() && epnum && dma_controller) {
- pDmaChannel = is_out ? hw_ep->tx_channel : hw_ep->rx_channel;
- if (!pDmaChannel) {
- pDmaChannel = dma_controller->channel_alloc(
+ dma_channel = is_out ? hw_ep->tx_channel : hw_ep->rx_channel;
+ if (!dma_channel) {
+ dma_channel = dma_controller->channel_alloc(
dma_controller, hw_ep, is_out);
if (is_out)
- hw_ep->tx_channel = pDmaChannel;
+ hw_ep->tx_channel = dma_channel;
else
- hw_ep->rx_channel = pDmaChannel;
+ hw_ep->rx_channel = dma_channel;
}
} else
- pDmaChannel = NULL;
+ dma_channel = NULL;
/* make sure we clear DMAEnab, autoSet bits from previous run */
if (is_out) {
u16 csr;
u16 int_txe;
- u16 wLoadCount;
+ u16 load_count;
csr = musb_readw(epio, MUSB_TXCSR);
}
if (can_bulk_split(musb, qh->type))
- wLoadCount = min((u32) hw_ep->max_packet_sz_tx,
+ load_count = min((u32) hw_ep->max_packet_sz_tx,
len);
else
- wLoadCount = min((u32) packet_sz, len);
+ load_count = min((u32) packet_sz, len);
#ifdef CONFIG_USB_INVENTRA_DMA
- if (pDmaChannel) {
+ if (dma_channel) {
/* clear previous state */
csr = musb_readw(epio, MUSB_TXCSR);
musb_writew(epio, MUSB_TXCSR,
csr | MUSB_TXCSR_MODE);
- qh->segsize = min(len, pDmaChannel->max_len);
+ qh->segsize = min(len, dma_channel->max_len);
if (qh->segsize <= packet_sz)
- pDmaChannel->desired_mode = 0;
+ dma_channel->desired_mode = 0;
else
- pDmaChannel->desired_mode = 1;
+ dma_channel->desired_mode = 1;
- if (pDmaChannel->desired_mode == 0) {
+ if (dma_channel->desired_mode == 0) {
csr &= ~(MUSB_TXCSR_AUTOSET
| MUSB_TXCSR_DMAMODE);
csr |= (MUSB_TXCSR_DMAENAB);
musb_writew(epio, MUSB_TXCSR, csr);
- bDmaOk = dma_controller->channel_program(
- pDmaChannel, packet_sz,
- pDmaChannel->desired_mode,
+ dma_ok = dma_controller->channel_program(
+ dma_channel, packet_sz,
+ dma_channel->desired_mode,
urb->transfer_dma,
qh->segsize);
- if (bDmaOk) {
- wLoadCount = 0;
+ if (dma_ok) {
+ load_count = 0;
} else {
- dma_controller->channel_release(pDmaChannel);
+ dma_controller->channel_release(dma_channel);
if (is_out)
hw_ep->tx_channel = NULL;
else
hw_ep->rx_channel = NULL;
- pDmaChannel = NULL;
+ dma_channel = NULL;
}
}
#endif
/* candidate for DMA */
- if ((is_cppi_enabled() || tusb_dma_omap()) && pDmaChannel) {
+ if ((is_cppi_enabled() || tusb_dma_omap()) && dma_channel) {
/* program endpoint CSRs first, then setup DMA.
* assume CPPI setup succeeds.
musb_writew(epio, MUSB_TXCSR,
csr | MUSB_TXCSR_MODE);
- pDmaChannel->actual_len = 0L;
+ dma_channel->actual_len = 0L;
qh->segsize = len;
/* TX uses "rndis" mode automatically, but needs help
* to identify the zero-length-final-packet case.
*/
- bDmaOk = dma_controller->channel_program(
- pDmaChannel, packet_sz,
+ dma_ok = dma_controller->channel_program(
+ dma_channel, packet_sz,
(urb->transfer_flags
& URB_ZERO_PACKET)
== URB_ZERO_PACKET,
urb->transfer_dma,
qh->segsize);
- if (bDmaOk) {
- wLoadCount = 0;
+ if (dma_ok) {
+ load_count = 0;
} else {
- dma_controller->channel_release(pDmaChannel);
- pDmaChannel = hw_ep->tx_channel = NULL;
+ dma_controller->channel_release(dma_channel);
+ dma_channel = hw_ep->tx_channel = NULL;
/* REVISIT there's an error path here that
* needs handling: can't do dma, but
}
}
- if (wLoadCount) {
+ if (load_count) {
/* ASSERT: TXCSR_DMAENAB was already cleared */
/* PIO to load FIFO */
- qh->segsize = wLoadCount;
- musb_write_fifo(hw_ep, wLoadCount, buf);
+ qh->segsize = load_count;
+ musb_write_fifo(hw_ep, load_count, buf);
csr = musb_readw(epio, MUSB_TXCSR);
csr &= ~(MUSB_TXCSR_DMAENAB
| MUSB_TXCSR_DMAMODE
/* kick things off */
- if ((is_cppi_enabled() || tusb_dma_omap()) && pDmaChannel) {
+ if ((is_cppi_enabled() || tusb_dma_omap()) && dma_channel) {
/* candidate for DMA */
- if (pDmaChannel) {
- pDmaChannel->actual_len = 0L;
+ if (dma_channel) {
+ dma_channel->actual_len = 0L;
qh->segsize = len;
/* AUTOREQ is in a DMA register */
/* unless caller treats short rx transfers as
* errors, we dare not queue multiple transfers.
*/
- bDmaOk = dma_controller->channel_program(
- pDmaChannel, packet_sz,
+ dma_ok = dma_controller->channel_program(
+ dma_channel, packet_sz,
!(urb->transfer_flags
& URB_SHORT_NOT_OK),
urb->transfer_dma,
qh->segsize);
- if (!bDmaOk) {
+ if (!dma_ok) {
dma_controller->channel_release(
- pDmaChannel);
- pDmaChannel = hw_ep->rx_channel = NULL;
+ dma_channel);
+ dma_channel = hw_ep->rx_channel = NULL;
} else
csr |= MUSB_RXCSR_DMAENAB;
}
u16 len, struct urb *urb)
{
int bMore = FALSE;
- u8 *pFifoDest = NULL;
+ u8 *fifo_dest = NULL;
u16 fifo_count = 0;
struct musb_hw_ep *hw_ep = musb->control_ep;
struct musb_qh *qh = hw_ep->in_qh;
switch (musb->ep0_stage) {
case MGC_END0_IN:
- pFifoDest = urb->transfer_buffer + urb->actual_length;
+ fifo_dest = urb->transfer_buffer + urb->actual_length;
fifo_count = min(len, ((u16) (urb->transfer_buffer_length
- urb->actual_length)));
if (fifo_count < len)
urb->status = -EOVERFLOW;
- musb_read_fifo(hw_ep, fifo_count, pFifoDest);
+ musb_read_fifo(hw_ep, fifo_count, fifo_dest);
urb->actual_length += fifo_count;
if (len < qh->maxpacket) {
- urb->actual_length)));
if (fifo_count) {
- pFifoDest = (u8 *) (urb->transfer_buffer
+ fifo_dest = (u8 *) (urb->transfer_buffer
+ urb->actual_length);
DBG(3, "Sending %d bytes to %p\n",
- fifo_count, pFifoDest);
- musb_write_fifo(hw_ep, fifo_count, pFifoDest);
+ fifo_count, fifo_dest);
+ musb_write_fifo(hw_ep, fifo_count, fifo_dest);
urb->actual_length += fifo_count;
bMore = TRUE;
/* Service a Tx-Available or dma completion irq for the endpoint */
void musb_host_tx(struct musb *musb, u8 epnum)
{
- int nPipe;
- u8 bDone = FALSE;
+ int pipe;
+ u8 done = FALSE;
u16 tx_csr;
size_t wLength = 0;
u8 *buf = NULL;
goto finish;
}
- nPipe = urb->pipe;
+ pipe = urb->pipe;
dma = is_dma_capable() ? hw_ep->tx_channel : NULL;
DBG(4, "OUT/TX%d end, csr %04x%s\n", epnum, tx_csr,
dma ? ", dma" : "");
musb_writew(epio, MUSB_TXCSR, tx_csr);
musb_writeb(epio, MUSB_TXINTERVAL, 0);
- bDone = TRUE;
+ done = TRUE;
}
/* second cppi case */
}
/* REVISIT this looks wrong... */
- if (!status || dma || usb_pipeisoc(nPipe)) {
+ if (!status || dma || usb_pipeisoc(pipe)) {
if (dma)
wLength = dma->actual_len;
else
wLength = qh->segsize;
qh->offset += wLength;
- if (usb_pipeisoc(nPipe)) {
+ if (usb_pipeisoc(pipe)) {
struct usb_iso_packet_descriptor *d;
d = urb->iso_frame_desc + qh->iso_idx;
d->actual_length = qh->segsize;
if (++qh->iso_idx >= urb->number_of_packets) {
- bDone = TRUE;
+ done = TRUE;
} else if (!dma) {
d++;
buf = urb->transfer_buffer + d->offset;
wLength = d->length;
}
} else if (dma) {
- bDone = TRUE;
+ done = TRUE;
} else {
/* see if we need to send more data, or ZLP */
if (qh->segsize < qh->maxpacket)
- bDone = TRUE;
+ done = TRUE;
else if (qh->offset == urb->transfer_buffer_length
&& !(urb-> transfer_flags
& URB_ZERO_PACKET))
- bDone = TRUE;
- if (!bDone) {
+ done = TRUE;
+ if (!done) {
buf = urb->transfer_buffer
+ qh->offset;
wLength = urb->transfer_buffer_length
* so we must abort this transfer after cleanup
*/
if (urb->status != -EINPROGRESS) {
- bDone = TRUE;
+ done = TRUE;
if (status == 0)
status = urb->status;
}
- if (bDone) {
+ if (done) {
/* set status */
urb->status = status;
urb->actual_length = qh->offset;
struct musb_qh *qh = hw_ep->in_qh;
size_t xfer_len;
void __iomem *mbase = musb->mregs;
- int nPipe;
+ int pipe;
u16 rx_csr, wVal;
- u8 bIsochError = FALSE;
- u8 bDone = FALSE;
+ u8 iso_err = FALSE;
+ u8 done = FALSE;
u32 status;
struct dma_channel *dma;
return;
}
- nPipe = urb->pipe;
+ pipe = urb->pipe;
DBG(5, "<== hw %d rxcsr %04x, urb actual %d (+dma %zd)\n",
epnum, rx_csr, urb->actual_length,
} else {
DBG(4, "RX end %d ISO data error\n", epnum);
/* packet error reported later */
- bIsochError = TRUE;
+ iso_err = TRUE;
}
}
}
musb_h_flush_rxfifo(hw_ep, 0);
musb_writeb(epio, MUSB_RXINTERVAL, 0);
- bDone = TRUE;
+ done = TRUE;
goto finish;
}
dma->status = MGC_DMA_STATUS_CORE_ABORT;
(void) musb->dma_controller->channel_abort(dma);
xfer_len = dma->actual_len;
- bDone = TRUE;
+ done = TRUE;
}
DBG(2, "RXCSR%d %04x, reqpkt, len %zd%s\n", epnum, rx_csr,
musb_writew(hw_ep->regs, MUSB_RXCSR, wVal);
#ifdef CONFIG_USB_INVENTRA_DMA
- /* bDone if urb buffer is full or short packet is recd */
- bDone = ((urb->actual_length + xfer_len) >=
+ /* done if urb buffer is full or short packet is recd */
+ done = ((urb->actual_length + xfer_len) >=
urb->transfer_buffer_length)
|| (dma->actual_len & (qh->maxpacket - 1));
/* send IN token for next packet, without AUTOREQ */
- if (!bDone) {
+ if (!done) {
wVal |= MUSB_RXCSR_H_REQPKT;
musb_writew(epio, MUSB_RXCSR,
MUSB_RXCSR_H_WZC_BITS | wVal);
}
DBG(4, "ep %d dma %s, rxcsr %04x, rxcount %d\n", epnum,
- bDone ? "off" : "reset",
+ done ? "off" : "reset",
musb_readw(epio, MUSB_RXCSR),
musb_readw(epio, MUSB_RXCOUNT));
#else
- bDone = TRUE;
+ done = TRUE;
#endif
} else if (urb->status == -EINPROGRESS) {
/* if no errors, be sure a packet is ready for unloading */
#ifdef CONFIG_USB_INVENTRA_DMA
if (dma) {
struct dma_controller *c;
- u16 wRxCount;
+ u16 rx_count;
int status;
- wRxCount = musb_readw(epio, MUSB_RXCOUNT);
+ rx_count = musb_readw(epio, MUSB_RXCOUNT);
DBG(2, "RX%d count %d, buffer 0x%x len %d/%d\n",
- epnum, wRxCount,
+ epnum, rx_count,
urb->transfer_dma
+ urb->actual_length,
qh->offset,
urb->transfer_dma
+ urb->actual_length,
(dma->desired_mode == 0)
- ? wRxCount
+ ? rx_count
: urb->transfer_buffer_length);
if (!status) {
#endif /* Mentor DMA */
if (!dma) {
- bDone = musb_host_packet_rx(musb, urb,
- epnum, bIsochError);
- DBG(6, "read %spacket\n", bDone ? "last " : "");
+ done = musb_host_packet_rx(musb, urb,
+ epnum, iso_err);
+ DBG(6, "read %spacket\n", done ? "last " : "");
}
}
finish:
urb->actual_length += xfer_len;
qh->offset += xfer_len;
- if (bDone) {
+ if (done) {
if (urb->status == -EINPROGRESS)
urb->status = status;
musb_advance_schedule(musb, urb, hw_ep, USB_DIR_IN);
projects / linux-2.6-omap-h63xx.git / blobdiff