/* NOTE: otg and peripheral-only state machines start at B_IDLE.
* OTG or host-only go to A_IDLE when ID is sensed.
*/
-#define is_peripheral_active(m) (!(m)->bIsHost)
-#define is_host_active(m) ((m)->bIsHost)
+#define is_peripheral_active(m) (!(m)->is_host)
+#define is_host_active(m) ((m)->is_host)
#else
#define is_peripheral_enabled(musb) is_peripheral_capable()
/* TUSB mapping: "flat" plus ep0 special cases */
#if defined(CONFIG_USB_TUSB6010)
-#define MGC_SelectEnd(_mbase, _bEnd) \
- musb_writeb((_mbase), MGC_O_HDRC_INDEX, (_bEnd))
+#define musb_ep_select(_mbase, _epnum) \
+ musb_writeb((_mbase), MGC_O_HDRC_INDEX, (_epnum))
#define MGC_END_OFFSET MGC_TUSB_OFFSET
/* "flat" mapping: each endpoint has its own i/o address */
#elif defined(MUSB_FLAT_REG)
-#define MGC_SelectEnd(_mbase, _bEnd) (((void)(_mbase)),((void)(_bEnd)))
+#define musb_ep_select(_mbase, _epnum) (((void)(_mbase)),((void)(_epnum)))
#define MGC_END_OFFSET MGC_FLAT_OFFSET
/* "indexed" mapping: INDEX register controls register bank select */
#else
-#define MGC_SelectEnd(_mbase, _bEnd) \
- musb_writeb((_mbase), MGC_O_HDRC_INDEX, (_bEnd))
+#define musb_ep_select(_mbase, _epnum) \
+ musb_writeb((_mbase), MGC_O_HDRC_INDEX, (_epnum))
#define MGC_END_OFFSET MGC_INDEXED_OFFSET
#endif
/****************************** FUNCTIONS ********************************/
-#define MUSB_HST_MODE(_pthis)\
- { (_pthis)->bIsHost=TRUE; }
-#define MUSB_DEV_MODE(_pthis) \
- { (_pthis)->bIsHost=FALSE; }
+#define MUSB_HST_MODE(_musb)\
+ { (_musb)->is_host=TRUE; }
+#define MUSB_DEV_MODE(_musb) \
+ { (_musb)->is_host=FALSE; }
#define test_devctl_hst_mode(_x) \
(musb_readb((_x)->mregs, MGC_O_HDRC_DEVCTL)&MGC_M_DEVCTL_HM)
-#define MUSB_MODE(musb) ((musb)->bIsHost ? "Host" : "Peripheral")
-
-/************************** Ep Configuration ********************************/
-
-/** The End point descriptor */
-struct MUSB_EpFifoDescriptor {
- u8 bType; /* 0 for autoconfig, CNTR, ISOC, BULK, INTR */
- u8 bDir; /* 0 for autoconfig, INOUT, IN, OUT */
- int wSize; /* 0 for autoconfig, or the size */
-};
-
-#define MUSB_EPD_AUTOCONFIG 0
-
-#define MUSB_EPD_T_CNTRL 1
-#define MUSB_EPD_T_ISOC 2
-#define MUSB_EPD_T_BULK 3
-#define MUSB_EPD_T_INTR 4
-
-#define MUSB_EPD_D_INOUT 0
-#define MUSB_EPD_D_TX 1
-#define MUSB_EPD_D_RX 2
+#define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")
/******************************** TYPES *************************************/
u8 epnum;
/* hardware configuration, possibly dynamic */
- u8 bIsSharedFifo;
+ u8 is_shared_fifo;
u8 tx_double_buffered;
u8 rx_double_buffered;
- u16 wMaxPacketSizeTx;
+ u16 max_packet_sz_tx;
u16 wMaxPacketSizeRx;
struct dma_channel *tx_channel;
* struct musb - Driver instance data.
*/
struct musb {
- spinlock_t Lock;
+ spinlock_t lock;
struct clk *clock;
irqreturn_t (*isr)(int, void *);
struct work_struct irq_work;
unsigned is_active:1;
unsigned bIsMultipoint:1;
- unsigned bIsHost:1;
+ unsigned is_host:1;
unsigned bIgnoreDisconnect:1; /* during bus resets */
int a_wait_bcon; /* VBUS timeout in msecs */