[IA64] pci_get_legacy_ide_irq should return irq (not GSI)

[linux-2.6-omap-h63xx.git] / include / asm-ia64 / sal.h

diff --git a/include/asm-ia64/sal.h b/include/asm-ia64/sal.h
index 240676f75390f530b4b66521bbaf6b8b1a8e3df4..46cadf5aaac57a3dd1136f2e140905103c4188e0 100644 (file)
--- a/include/asm-ia64/sal.h
+++ b/include/asm-ia64/sal.h
@@ -91,6 +91,7 @@ extern spinlock_t sal_lock;
 #define SAL_PCI_CONFIG_READ            0x01000010
 #define SAL_PCI_CONFIG_WRITE           0x01000011
 #define SAL_FREQ_BASE                  0x01000012
+#define SAL_PHYSICAL_ID_INFO           0x01000013
 
 #define SAL_UPDATE_PAL                 0x01000020
 
@@ -319,7 +320,8 @@ typedef struct sal_log_timestamp {
 typedef struct sal_log_record_header {
        u64 id;                         /* Unique monotonically increasing ID */
        sal_log_revision_t revision;    /* Major and Minor revision of header */
-       u16 severity;                   /* Error Severity */
+       u8 severity;                    /* Error Severity */
+       u8 validation_bits;             /* 0: platform_guid, 1: !timestamp */
        u32 len;                        /* Length of this error log in bytes */
        sal_log_timestamp_t timestamp;  /* Timestamp */
        efi_guid_t platform_guid;       /* Unique OEM Platform ID */
@@ -656,15 +658,8 @@ ia64_sal_freq_base (unsigned long which, unsigned long *ticks_per_second,
        return isrv.status;
 }
 
-/* Flush all the processor and platform level instruction and/or data caches */
-static inline s64
-ia64_sal_cache_flush (u64 cache_type)
-{
-       struct ia64_sal_retval isrv;
-       SAL_CALL(isrv, SAL_CACHE_FLUSH, cache_type, 0, 0, 0, 0, 0, 0);
-       return isrv.status;
-}
-
+extern s64 ia64_sal_cache_flush (u64 cache_type);
+extern void __init check_sal_cache_flush (void);
 
 /* Initialize all the processor and platform level instruction and data caches */
 static inline s64
@@ -815,6 +810,17 @@ ia64_sal_update_pal (u64 param_buf, u64 scratch_buf, u64 scratch_buf_size,
        return isrv.status;
 }
 
+/* Get physical processor die mapping in the platform. */
+static inline s64
+ia64_sal_physical_id_info(u16 *splid)
+{
+       struct ia64_sal_retval isrv;
+       SAL_CALL(isrv, SAL_PHYSICAL_ID_INFO, 0, 0, 0, 0, 0, 0, 0);
+       if (splid)
+               *splid = isrv.v0;
+       return isrv.status;
+}
+
 extern unsigned long sal_platform_features;
 
 extern int (*salinfo_platform_oemdata)(const u8 *, u8 **, u64 *);
@@ -841,12 +847,13 @@ extern int ia64_sal_oemcall_reentrant(struct ia64_sal_retval *, u64, u64, u64,
  */
 struct sal_to_os_boot {
        u64 rr[8];              /* Region Registers */
-       u64     br[6];          /* br0: return addr into SAL boot rendez routine */
+       u64 br[6];              /* br0:
+                                * return addr into SAL boot rendez routine */
        u64 gr1;                /* SAL:GP */
        u64 gr12;               /* SAL:SP */
        u64 gr13;               /* SAL: Task Pointer */
        u64 fpsr;
-       u64     pfs;
+       u64 pfs;
        u64 rnat;
        u64 unat;
        u64 bspstore;