* memory-like regions on I/O busses.
*/
#define ioremap_cachable(offset, size) \
- __ioremap_mode((offset), (size), PAGE_CACHABLE_DEFAULT)
+ __ioremap_mode((offset), (size), _page_cachable_default)
/*
* These two are MIPS specific ioremap variant. ioremap_cacheable_cow
* caches. Dirty lines of the caches may be written back or simply
* be discarded. This operation is necessary before dma operations
* to the memory.
+ *
+ * This API used to be exported; it now is for arch code internal use only.
*/
#ifdef CONFIG_DMA_NONCOHERENT