Pull sbs into release branch

[linux-2.6-omap-h63xx.git] / include / asm-mips / mips-boards / generic.h

diff --git a/include/asm-mips/mips-boards/generic.h b/include/asm-mips/mips-boards/generic.h
index fa8b913cc3e0e0ba262d938ad1d8829df6443ed7..c8ebcc3e12677cc8eadd22407e7b68ea31e20ca2 100644 (file)
--- a/include/asm-mips/mips-boards/generic.h
+++ b/include/asm-mips/mips-boards/generic.h
@@ -20,7 +20,6 @@
 #ifndef __ASM_MIPS_BOARDS_GENERIC_H
 #define __ASM_MIPS_BOARDS_GENERIC_H
 
-#include <linux/config.h>
 #include <asm/addrspace.h>
 #include <asm/byteorder.h>
 #include <asm/mips-boards/bonito64.h>
@@ -74,12 +73,28 @@
  *  CoreEMUL with   Bonito   System Controller is treated like a Core20K
  *  CoreEMUL with SOC-it 101 System Controller is treated like a CoreMSC
  */
-#define MIPS_REVISION_CORID_CORE_EMUL_BON  0x63
-#define MIPS_REVISION_CORID_CORE_EMUL_MSC  0x65
+#define MIPS_REVISION_CORID_CORE_EMUL_BON  -1
+#define MIPS_REVISION_CORID_CORE_EMUL_MSC  -2
 
 #define MIPS_REVISION_CORID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 10) & 0x3f)
 
-extern unsigned int mips_revision_corid;
+extern int mips_revision_corid;
+
+#define MIPS_REVISION_SCON_OTHER          0
+#define MIPS_REVISION_SCON_SOCITSC        1
+#define MIPS_REVISION_SCON_SOCITSCP       2
+
+/* Artificial SCON defines for MIPS_REVISION_SCON_OTHER */
+#define MIPS_REVISION_SCON_UNKNOWN        -1
+#define MIPS_REVISION_SCON_GT64120        -2
+#define MIPS_REVISION_SCON_BONITO         -3
+#define MIPS_REVISION_SCON_BRTL                   -4
+#define MIPS_REVISION_SCON_SOCIT          -5
+#define MIPS_REVISION_SCON_ROCIT          -6
+
+#define MIPS_REVISION_SCONID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 24) & 0xff)
+
+extern int mips_revision_sconid;
 
 #ifdef CONFIG_PCI
 extern void mips_pcibios_init(void);