* Interrupt numbers
*/
#define Q_PIC_IRQ_BASE 0
-#define Q_COUNT_COMPARE_IRQ 16
+#define Q_COUNT_COMPARE_IRQ 23
/*
* Qemu clock rate. Unlike on real MIPS this has no relation to the
*/
#define QEMU_C0_COUNTER_CLOCK 100000000
+/*
+ * Magic qemu system control location.
+ */
+#define QEMU_RESTART_REG 0xBFBF0000
+#define QEMU_HALT_REG 0xBFBF0004
+
#endif /* __ASM_QEMU_H */