]> pilppa.org Git - linux-2.6-omap-h63xx.git/blobdiff - include/linux/fsl_devices.h
spi_mpc83xx: add OF platform driver bindings
[linux-2.6-omap-h63xx.git] / include / linux / fsl_devices.h
index 708bab58d8d07dde74c3b8019a63b63405893c3a..7ef1caf5026962c4e49ab7c8d3b68430645a60a1 100644 (file)
 struct gianfar_platform_data {
        /* device specific information */
        u32     device_flags;
-       /* board specific information */
-       u32     board_flags;
-       int     mdio_bus;                       /* Bus controlled by us */
-       char    bus_id[MII_BUS_ID_SIZE];        /* Bus PHY is on */
-       u32     phy_id;
-       u8      mac_addr[6];
+       char    bus_id[BUS_ID_SIZE];
        phy_interface_t interface;
 };
 
@@ -61,17 +56,6 @@ struct gianfar_mdio_data {
        int     irq[32];
 };
 
-/* Flags related to gianfar device features */
-#define FSL_GIANFAR_DEV_HAS_GIGABIT            0x00000001
-#define FSL_GIANFAR_DEV_HAS_COALESCE           0x00000002
-#define FSL_GIANFAR_DEV_HAS_RMON               0x00000004
-#define FSL_GIANFAR_DEV_HAS_MULTI_INTR         0x00000008
-#define FSL_GIANFAR_DEV_HAS_CSUM               0x00000010
-#define FSL_GIANFAR_DEV_HAS_VLAN               0x00000020
-#define FSL_GIANFAR_DEV_HAS_EXTENDED_HASH      0x00000040
-#define FSL_GIANFAR_DEV_HAS_PADDING            0x00000080
-#define FSL_GIANFAR_DEV_HAS_MAGIC_PACKET       0x00000100
-
 /* Flags in gianfar_platform_data */
 #define FSL_GIANFAR_BRD_HAS_PHY_INTR   0x00000001 /* set or use a timer */
 #define FSL_GIANFAR_BRD_IS_REDUCED     0x00000002 /* Set if RGMII, RMII */
@@ -111,14 +95,15 @@ struct fsl_usb2_platform_data {
 #define FSL_USB2_PORT0_ENABLED 0x00000001
 #define FSL_USB2_PORT1_ENABLED 0x00000002
 
+struct spi_device;
+
 struct fsl_spi_platform_data {
        u32     initial_spmode; /* initial SPMODE value */
-       u16     bus_num;
+       s16     bus_num;
        bool    qe_mode;
        /* board specific information */
        u16     max_chipselect;
-       void    (*activate_cs)(u8 cs, u8 polarity);
-       void    (*deactivate_cs)(u8 cs, u8 polarity);
+       void    (*cs_control)(struct spi_device *spi, bool on);
        u32     sysclk;
 };