X-Git-Url: http://pilppa.org/gitweb/?a=blobdiff_plain;f=arch%2Fmips%2Fmm%2Fcache.c;h=694d51f523d1fd8d5cbf057534e6031bf36f5327;hb=b5bb14386eabcb4229ade2bc0a2b237ca166d37d;hp=1eb7c71e3d6adfe25916070e180ae87e0b3eedbf;hpb=1543966a079fc7065849ae43ca4dd767c188ad55;p=linux-2.6-omap-h63xx.git

diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c
index 1eb7c71e3d6..694d51f523d 100644
--- a/arch/mips/mm/cache.c
+++ b/arch/mips/mm/cache.c
@@ -13,6 +13,7 @@
 #include <linux/linkage.h>
 #include <linux/module.h>
 #include <linux/sched.h>
+#include <linux/syscalls.h>
 #include <linux/mm.h>
 
 #include <asm/cacheflush.h>
@@ -58,8 +59,8 @@ EXPORT_SYMBOL(_dma_cache_wback_inv);
  * We could optimize the case where the cache argument is not BCACHE but
  * that seems very atypical use ...
  */
-asmlinkage int sys_cacheflush(unsigned long addr,
-	unsigned long bytes, unsigned int cache)
+SYSCALL_DEFINE3(cacheflush, unsigned long, addr, unsigned long, bytes,
+	unsigned int, cache)
 {
 	if (bytes == 0)
 		return 0;
@@ -182,6 +183,12 @@ void __devinit cpu_cache_init(void)
 		tx39_cache_init();
 	}
 
+	if (cpu_has_octeon_cache) {
+		extern void __weak octeon_cache_init(void);
+
+		octeon_cache_init();
+	}
+
 	setup_protection_map();
 }