X-Git-Url: http://pilppa.org/gitweb/?a=blobdiff_plain;f=drivers%2Fnet%2Fbnx2.c;h=3bb69d538ef095cc63fefef948ebd823d6b9fa83;hb=66c6b139f77e8568f03611422967bfaa4c4a3bbd;hp=4f2ca8a53af534ff1b81de41b019f2e61c2f9740;hpb=b4b360420dcbbffb15f5749fc78225f4113cc7e2;p=linux-2.6-omap-h63xx.git diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c index 4f2ca8a53af..3bb69d538ef 100644 --- a/drivers/net/bnx2.c +++ b/drivers/net/bnx2.c @@ -56,8 +56,8 @@ #define DRV_MODULE_NAME "bnx2" #define PFX DRV_MODULE_NAME ": " -#define DRV_MODULE_VERSION "1.7.0" -#define DRV_MODULE_RELDATE "December 11, 2007" +#define DRV_MODULE_VERSION "1.7.1" +#define DRV_MODULE_RELDATE "December 19, 2007" #define RUN_AT(x) (jiffies + (x)) @@ -598,7 +598,7 @@ bnx2_alloc_mem(struct bnx2 *bp) for (i = 1; i < BNX2_MAX_MSIX_VEC; i++) { struct bnx2_napi *bnapi = &bp->bnx2_napi[i]; - bnapi->status_blk = (void *) + bnapi->status_blk_msix = (void *) ((unsigned long) bp->status_blk + BNX2_SBLK_MSIX_ALIGN_SIZE * i); bnapi->int_num = i << 24; @@ -2378,18 +2378,21 @@ bnx2_get_hw_tx_cons(struct bnx2_napi *bnapi) { u16 cons; - cons = bnapi->status_blk->status_tx_quick_consumer_index0; + if (bnapi->int_num == 0) + cons = bnapi->status_blk->status_tx_quick_consumer_index0; + else + cons = bnapi->status_blk_msix->status_tx_quick_consumer_index; if (unlikely((cons & MAX_TX_DESC_CNT) == MAX_TX_DESC_CNT)) cons++; return cons; } -static void -bnx2_tx_int(struct bnx2 *bp, struct bnx2_napi *bnapi) +static int +bnx2_tx_int(struct bnx2 *bp, struct bnx2_napi *bnapi, int budget) { u16 hw_cons, sw_cons, sw_ring_cons; - int tx_free_bd = 0; + int tx_pkt = 0; hw_cons = bnx2_get_hw_tx_cons(bnapi); sw_cons = bnapi->tx_cons; @@ -2439,9 +2442,10 @@ bnx2_tx_int(struct bnx2 *bp, struct bnx2_napi *bnapi) sw_cons = NEXT_TX_BD(sw_cons); - tx_free_bd += last + 1; - dev_kfree_skb(skb); + tx_pkt++; + if (tx_pkt == budget) + break; hw_cons = bnx2_get_hw_tx_cons(bnapi); } @@ -2463,6 +2467,7 @@ bnx2_tx_int(struct bnx2 *bp, struct bnx2_napi *bnapi) netif_wake_queue(bp->dev); netif_tx_unlock(bp->dev); } + return tx_pkt; } static void @@ -2752,7 +2757,7 @@ bnx2_rx_int(struct bnx2 *bp, struct bnx2_napi *bnapi, int budget) } #ifdef BCM_VLAN - if ((status & L2_FHDR_STATUS_L2_VLAN_TAG) && (bp->vlgrp != 0)) { + if ((status & L2_FHDR_STATUS_L2_VLAN_TAG) && bp->vlgrp) { vlan_hwaccel_receive_skb(skb, bp->vlgrp, rx_hdr->l2_fhdr_vlan_tag); } @@ -2875,6 +2880,23 @@ bnx2_interrupt(int irq, void *dev_instance) return IRQ_HANDLED; } +static irqreturn_t +bnx2_tx_msix(int irq, void *dev_instance) +{ + struct net_device *dev = dev_instance; + struct bnx2 *bp = netdev_priv(dev); + struct bnx2_napi *bnapi = &bp->bnx2_napi[BNX2_TX_VEC]; + + prefetch(bnapi->status_blk_msix); + + /* Return here if interrupt is disabled. */ + if (unlikely(atomic_read(&bp->intr_sem) != 0)) + return IRQ_HANDLED; + + netif_rx_schedule(dev, &bnapi->napi); + return IRQ_HANDLED; +} + #define STATUS_ATTN_EVENTS (STATUS_ATTN_BITS_LINK_STATE | \ STATUS_ATTN_BITS_TIMER_ABORT) @@ -2895,6 +2917,29 @@ bnx2_has_work(struct bnx2_napi *bnapi) return 0; } +static int bnx2_tx_poll(struct napi_struct *napi, int budget) +{ + struct bnx2_napi *bnapi = container_of(napi, struct bnx2_napi, napi); + struct bnx2 *bp = bnapi->bp; + int work_done = 0; + struct status_block_msix *sblk = bnapi->status_blk_msix; + + do { + work_done += bnx2_tx_int(bp, bnapi, budget - work_done); + if (unlikely(work_done >= budget)) + return work_done; + + bnapi->last_status_idx = sblk->status_idx; + rmb(); + } while (bnx2_get_hw_tx_cons(bnapi) != bnapi->hw_tx_cons); + + netif_rx_complete(bp->dev, napi); + REG_WR(bp, BNX2_PCICFG_INT_ACK_CMD, bnapi->int_num | + BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | + bnapi->last_status_idx); + return work_done; +} + static int bnx2_poll_work(struct bnx2 *bp, struct bnx2_napi *bnapi, int work_done, int budget) { @@ -2916,7 +2961,7 @@ static int bnx2_poll_work(struct bnx2 *bp, struct bnx2_napi *bnapi, } if (bnx2_get_hw_tx_cons(bnapi) != bnapi->hw_tx_cons) - bnx2_tx_int(bp, bnapi); + bnx2_tx_int(bp, bnapi, 0); if (bnx2_get_hw_rx_cons(bnapi) != bnapi->rx_cons) work_done += bnx2_rx_int(bp, bnapi, budget - work_done); @@ -4369,6 +4414,24 @@ bnx2_init_chip(struct bnx2 *bp) BNX2_HC_CONFIG_COLLECT_STATS; } + if (bp->flags & USING_MSIX_FLAG) { + REG_WR(bp, BNX2_HC_MSIX_BIT_VECTOR, + BNX2_HC_MSIX_BIT_VECTOR_VAL); + + REG_WR(bp, BNX2_HC_SB_CONFIG_1, + BNX2_HC_SB_CONFIG_1_TX_TMR_MODE | + BNX2_HC_SB_CONFIG_1_ONE_SHOT); + + REG_WR(bp, BNX2_HC_TX_QUICK_CONS_TRIP_1, + (bp->tx_quick_cons_trip_int << 16) | + bp->tx_quick_cons_trip); + + REG_WR(bp, BNX2_HC_TX_TICKS_1, + (bp->tx_ticks_int << 16) | bp->tx_ticks); + + val |= BNX2_HC_CONFIG_SB_ADDR_INC_128B; + } + if (bp->flags & ONE_SHOT_MSI_FLAG) val |= BNX2_HC_CONFIG_ONE_SHOT; @@ -4400,6 +4463,25 @@ bnx2_init_chip(struct bnx2 *bp) return rc; } +static void +bnx2_clear_ring_states(struct bnx2 *bp) +{ + struct bnx2_napi *bnapi; + int i; + + for (i = 0; i < BNX2_MAX_MSIX_VEC; i++) { + bnapi = &bp->bnx2_napi[i]; + + bnapi->tx_cons = 0; + bnapi->hw_tx_cons = 0; + bnapi->rx_prod_bseq = 0; + bnapi->rx_prod = 0; + bnapi->rx_cons = 0; + bnapi->rx_pg_prod = 0; + bnapi->rx_pg_cons = 0; + } +} + static void bnx2_init_tx_context(struct bnx2 *bp, u32 cid) { @@ -4433,8 +4515,17 @@ static void bnx2_init_tx_ring(struct bnx2 *bp) { struct tx_bd *txbd; - u32 cid; - struct bnx2_napi *bnapi = &bp->bnx2_napi[0]; + u32 cid = TX_CID; + struct bnx2_napi *bnapi; + + bp->tx_vec = 0; + if (bp->flags & USING_MSIX_FLAG) { + cid = TX_TSS_CID; + bp->tx_vec = BNX2_TX_VEC; + REG_WR(bp, BNX2_TSCH_TSS_CFG, BNX2_TX_INT_NUM | + (TX_TSS_CID << 7)); + } + bnapi = &bp->bnx2_napi[bp->tx_vec]; bp->tx_wake_thresh = bp->tx_ring_size / 2; @@ -4444,11 +4535,8 @@ bnx2_init_tx_ring(struct bnx2 *bp) txbd->tx_bd_haddr_lo = (u64) bp->tx_desc_mapping & 0xffffffff; bp->tx_prod = 0; - bnapi->tx_cons = 0; - bnapi->hw_tx_cons = 0; bp->tx_prod_bseq = 0; - cid = TX_CID; bp->tx_bidx_addr = MB_GET_CID_ADDR(cid) + BNX2_L2CTX_TX_HOST_BIDX; bp->tx_bseq_addr = MB_GET_CID_ADDR(cid) + BNX2_L2CTX_TX_HOST_BSEQ; @@ -4487,12 +4575,6 @@ bnx2_init_rx_ring(struct bnx2 *bp) u32 val, rx_cid_addr = GET_CID_ADDR(RX_CID); struct bnx2_napi *bnapi = &bp->bnx2_napi[0]; - bnapi->rx_prod = 0; - bnapi->rx_cons = 0; - bnapi->rx_prod_bseq = 0; - bnapi->rx_pg_prod = 0; - bnapi->rx_pg_cons = 0; - bnx2_init_rxbd_rings(bp->rx_desc_ring, bp->rx_desc_mapping, bp->rx_buf_use_size, bp->rx_max_ring); @@ -4694,6 +4776,7 @@ bnx2_reset_nic(struct bnx2 *bp, u32 reset_code) if ((rc = bnx2_init_chip(bp)) != 0) return rc; + bnx2_clear_ring_states(bp); bnx2_init_tx_ring(bp); bnx2_init_rx_ring(bp); return 0; @@ -4965,7 +5048,11 @@ bnx2_run_loopback(struct bnx2 *bp, int loopback_mode) struct sw_bd *rx_buf; struct l2_fhdr *rx_hdr; int ret = -ENODEV; - struct bnx2_napi *bnapi = &bp->bnx2_napi[0]; + struct bnx2_napi *bnapi = &bp->bnx2_napi[0], *tx_napi; + + tx_napi = bnapi; + if (bp->flags & USING_MSIX_FLAG) + tx_napi = &bp->bnx2_napi[BNX2_TX_VEC]; if (loopback_mode == BNX2_MAC_LOOPBACK) { bp->loopback = MAC_LOOPBACK; @@ -5030,7 +5117,7 @@ bnx2_run_loopback(struct bnx2 *bp, int loopback_mode) pci_unmap_single(bp->pdev, map, pkt_size, PCI_DMA_TODEVICE); dev_kfree_skb(skb); - if (bnx2_get_hw_tx_cons(bnapi) != bp->tx_prod) + if (bnx2_get_hw_tx_cons(tx_napi) != bp->tx_prod) goto loopback_test_done; rx_idx = bnx2_get_hw_rx_cons(bnapi); @@ -5324,7 +5411,7 @@ bnx2_request_irq(struct bnx2 *bp) for (i = 0; i < bp->irq_nvecs; i++) { irq = &bp->irq_tbl[i]; - rc = request_irq(irq->vector, irq->handler, flags, dev->name, + rc = request_irq(irq->vector, irq->handler, flags, irq->name, dev); if (rc) break; @@ -5357,10 +5444,35 @@ bnx2_free_irq(struct bnx2 *bp) static void bnx2_enable_msix(struct bnx2 *bp) { + int i, rc; + struct msix_entry msix_ent[BNX2_MAX_MSIX_VEC]; + bnx2_setup_msix_tbl(bp); REG_WR(bp, BNX2_PCI_MSIX_CONTROL, BNX2_MAX_MSIX_HW_VEC - 1); REG_WR(bp, BNX2_PCI_MSIX_TBL_OFF_BIR, BNX2_PCI_GRC_WINDOW2_BASE); REG_WR(bp, BNX2_PCI_MSIX_PBA_OFF_BIT, BNX2_PCI_GRC_WINDOW3_BASE); + + for (i = 0; i < BNX2_MAX_MSIX_VEC; i++) { + msix_ent[i].entry = i; + msix_ent[i].vector = 0; + } + + rc = pci_enable_msix(bp->pdev, msix_ent, BNX2_MAX_MSIX_VEC); + if (rc != 0) + return; + + bp->irq_tbl[BNX2_BASE_VEC].handler = bnx2_msi_1shot; + bp->irq_tbl[BNX2_TX_VEC].handler = bnx2_tx_msix; + + strcpy(bp->irq_tbl[BNX2_BASE_VEC].name, bp->dev->name); + strcat(bp->irq_tbl[BNX2_BASE_VEC].name, "-base"); + strcpy(bp->irq_tbl[BNX2_TX_VEC].name, bp->dev->name); + strcat(bp->irq_tbl[BNX2_TX_VEC].name, "-tx"); + + bp->irq_nvecs = BNX2_MAX_MSIX_VEC; + bp->flags |= USING_MSIX_FLAG | ONE_SHOT_MSI_FLAG; + for (i = 0; i < BNX2_MAX_MSIX_VEC; i++) + bp->irq_tbl[i].vector = msix_ent[i].vector; } static void @@ -5462,9 +5574,10 @@ bnx2_open(struct net_device *dev) bnx2_enable_int(bp); } } - if (bp->flags & USING_MSI_FLAG) { + if (bp->flags & USING_MSI_FLAG) printk(KERN_INFO PFX "%s: using MSI\n", dev->name); - } + else if (bp->flags & USING_MSIX_FLAG) + printk(KERN_INFO PFX "%s: using MSIX\n", dev->name); netif_start_queue(dev); @@ -5528,7 +5641,7 @@ bnx2_start_xmit(struct sk_buff *skb, struct net_device *dev) u32 len, vlan_tag_flags, last_frag, mss; u16 prod, ring_prod; int i; - struct bnx2_napi *bnapi = &bp->bnx2_napi[0]; + struct bnx2_napi *bnapi = &bp->bnx2_napi[bp->tx_vec]; if (unlikely(bnx2_tx_avail(bp, bnapi) < (skb_shinfo(skb)->nr_frags + 1))) { @@ -5547,7 +5660,7 @@ bnx2_start_xmit(struct sk_buff *skb, struct net_device *dev) vlan_tag_flags |= TX_BD_FLAGS_TCP_UDP_CKSUM; } - if (bp->vlgrp != 0 && vlan_tx_tag_present(skb)) { + if (bp->vlgrp && vlan_tx_tag_present(skb)) { vlan_tag_flags |= (TX_BD_FLAGS_VLAN_TAG | (vlan_tx_tag_get(skb) << 16)); } @@ -7200,7 +7313,7 @@ bnx2_bus_string(struct bnx2 *bp, char *str) return str; } -static int __devinit +static void __devinit bnx2_init_napi(struct bnx2 *bp) { int i; @@ -7211,6 +7324,8 @@ bnx2_init_napi(struct bnx2 *bp) bnapi->bp = bp; } netif_napi_add(bp->dev, &bp->bnx2_napi[0].napi, bnx2_poll, 64); + netif_napi_add(bp->dev, &bp->bnx2_napi[BNX2_TX_VEC].napi, bnx2_tx_poll, + 64); } static int __devinit