X-Git-Url: http://pilppa.org/gitweb/?a=blobdiff_plain;f=drivers%2Fnet%2Fsky2.h;h=fd12c289a2387d835b9a310caaa3f30bcf1c7cd4;hb=25bf368b3d98668c5d5f38e2201d8bca16e52680;hp=629d08f170fd2ef954e89ab8da072da5e1c74498;hpb=83cbd33aae2c3cd14f80a8abf733033a57aa4923;p=linux-2.6-omap-h63xx.git

diff --git a/drivers/net/sky2.h b/drivers/net/sky2.h
index 629d08f170f..fd12c289a23 100644
--- a/drivers/net/sky2.h
+++ b/drivers/net/sky2.h
@@ -309,7 +309,7 @@ enum {
 			  Y2_IS_PAR_RX2 | Y2_IS_TCP_TXS2| Y2_IS_TCP_TXA2,
 
 	Y2_HWE_ALL_MASK	= Y2_IS_TIST_OV | Y2_IS_MST_ERR | Y2_IS_IRQ_STAT |
-			  Y2_IS_PCI_EXP | Y2_IS_PCI_NEXP |
+			  Y2_IS_PCI_EXP |
 			  Y2_HWE_L1_MASK | Y2_HWE_L2_MASK,
 };
 
@@ -346,6 +346,7 @@ enum {
 	CHIP_ID_YUKON_LITE = 0xb1, /* Chip ID for YUKON-Lite (Rev. A1-A3) */
 	CHIP_ID_YUKON_LP   = 0xb2, /* Chip ID for YUKON-LP */
 	CHIP_ID_YUKON_XL   = 0xb3, /* Chip ID for YUKON-2 XL */
+	CHIP_ID_YUKON_EC_U = 0xb4, /* Chip ID for YUKON-2 EC Ultra */
 	CHIP_ID_YUKON_EC   = 0xb6, /* Chip ID for YUKON-2 EC */
  	CHIP_ID_YUKON_FE   = 0xb7, /* Chip ID for YUKON-2 FE */
 
@@ -579,7 +580,8 @@ enum {
 	RX_GMF_FL_MSK	= 0x0c4c,/* 32 bit	Rx GMAC FIFO Flush Mask */
 	RX_GMF_FL_THR	= 0x0c50,/* 32 bit	Rx GMAC FIFO Flush Threshold */
 	RX_GMF_TR_THR	= 0x0c54,/* 32 bit	Rx Truncation Threshold (Yukon-2) */
-
+	RX_GMF_UP_THR	= 0x0c58,/*  8 bit	Rx Upper Pause Thr (Yukon-EC_U) */
+	RX_GMF_LP_THR	= 0x0c5a,/*  8 bit	Rx Lower Pause Thr (Yukon-EC_U) */
 	RX_GMF_VLAN	= 0x0c5c,/* 32 bit	Rx VLAN Type Register (Yukon-2) */
 	RX_GMF_WP	= 0x0c60,/* 32 bit	Rx GMAC FIFO Write Pointer */
 
@@ -629,6 +631,8 @@ enum {
 	BMU_CLR_RESET	= BMU_FIFO_RST | BMU_OP_OFF | BMU_RST_CLR,
 	BMU_OPER_INIT	= BMU_CLR_IRQ_PAR | BMU_CLR_IRQ_CHK | BMU_START |
 			  BMU_FIFO_ENA | BMU_OP_ON,
+
+	BMU_WM_DEFAULT = 0x600,
 };
 
 /* Tx BMU Control / Status Registers (Yukon-2) */
@@ -1557,6 +1561,9 @@ enum {
 
 /*	TX_GMF_CTRL_T	32 bit	Tx GMAC FIFO Control/Test */
 enum {
+	TX_STFW_DIS	= 1<<31,/* Disable Store & Forward (Yukon-EC Ultra) */
+	TX_STFW_ENA	= 1<<30,/* Enable  Store & Forward (Yukon-EC Ultra) */
+
 	TX_VLAN_TAG_ON	= 1<<25,/* enable  VLAN tagging */
 	TX_VLAN_TAG_OFF	= 1<<24,/* disable VLAN tagging */
 
@@ -1741,40 +1748,44 @@ enum {
  */
 struct sky2_tx_le {
 	union {
-		u32	addr;
+		__le32	addr;
 		struct {
-			u16	offset;
-			u16	start;
+			__le16	offset;
+			__le16	start;
 		} csum  __attribute((packed));
 		struct {
-			u16	size;
-			u16	rsvd;
+			__le16	size;
+			__le16	rsvd;
 		} tso  __attribute((packed));
 	} tx;
-	u16	length;	/* also vlan tag or checksum start */
+	__le16	length;	/* also vlan tag or checksum start */
 	u8	ctrl;
 	u8	opcode;
 } __attribute((packed));
 
 struct sky2_rx_le {
-	u32	addr;
-	u16	length;
+	__le32	addr;
+	__le16	length;
 	u8	ctrl;
 	u8	opcode;
 } __attribute((packed));;
 
 struct sky2_status_le {
-	u32	status;	/* also checksum */
-	u16	length;	/* also vlan tag */
+	__le32	status;	/* also checksum */
+	__le16	length;	/* also vlan tag */
 	u8	link;
 	u8	opcode;
 } __attribute((packed));
 
+struct tx_ring_info {
+	struct sk_buff	*skb;
+	DECLARE_PCI_UNMAP_ADDR(mapaddr);
+	u16		idx;
+};
+
 struct ring_info {
 	struct sk_buff	*skb;
 	dma_addr_t	mapaddr;
-	u16		maplen;
-	u16		idx;
 };
 
 struct sky2_port {
@@ -1783,23 +1794,24 @@ struct sky2_port {
 	unsigned	     port;
 	u32		     msg_enable;
 
-	struct ring_info  *tx_ring;
+	spinlock_t	     tx_lock  ____cacheline_aligned_in_smp;
+	struct tx_ring_info  *tx_ring;
 	struct sky2_tx_le    *tx_le;
-	spinlock_t	     tx_lock;
-	u32		     tx_addr64;
 	u16		     tx_cons;		/* next le to check */
 	u16		     tx_prod;		/* next le to use */
+	u32		     tx_addr64;
 	u16		     tx_pending;
 	u16		     tx_last_put;
 	u16		     tx_last_mss;
 
-	struct ring_info  *rx_ring;
+	struct ring_info     *rx_ring ____cacheline_aligned_in_smp;
 	struct sky2_rx_le    *rx_le;
 	u32		     rx_addr64;
 	u16		     rx_next;		/* next re to check */
 	u16		     rx_put;		/* next le index to use */
 	u16		     rx_pending;
 	u16		     rx_last_put;
+	u16		     rx_bufsize;
 #ifdef SKY2_VLAN_TAG_USED
 	u16		     rx_tag;
 	struct vlan_group    *vlgrp;
@@ -1816,8 +1828,10 @@ struct sky2_port {
 	u8		     rx_csum;
 	u8		     wol;
 
-	struct tasklet_struct phy_task;
 	struct net_device_stats net_stats;
+
+	struct work_struct   phy_task;
+	struct semaphore     phy_sema;
 };
 
 struct sky2_hw {
@@ -1827,6 +1841,7 @@ struct sky2_hw {
 	struct net_device    *dev[2];
 
 	int		     pm_cap;
+	int		     msi;
 	u8	     	     chip_id;
 	u8		     chip_rev;
 	u8		     copper;
@@ -1835,8 +1850,6 @@ struct sky2_hw {
 	struct sky2_status_le *st_le;
 	u32		     st_idx;
 	dma_addr_t   	     st_dma;
-
-	spinlock_t	     phy_lock;
 };
 
 /* Register accessor for memory mapped device */
@@ -1855,14 +1868,6 @@ static inline u8 sky2_read8(const struct sky2_hw *hw, unsigned reg)
 	return readb(hw->regs + reg);
 }
 
-/* This should probably go away, bus based tweeks suck */
-static inline int is_pciex(const struct sky2_hw *hw)
-{
-	u32 status;
-	pci_read_config_dword(hw->pdev, PCI_DEV_STATUS, &status);
-	return (status & PCI_OS_PCI_X) == 0;
-}
-
 static inline void sky2_write32(const struct sky2_hw *hw, unsigned reg, u32 val)
 {
 	writel(val, hw->regs + reg);