X-Git-Url: http://pilppa.org/gitweb/?a=blobdiff_plain;f=drivers%2Fserial%2Fserial_lh7a40x.c;h=23ddedbaec086b8bf307137492e8f2a8820f14f7;hb=d6c93e1ddde769010f9c81bbfab41a9844c0e9ba;hp=aa521b8e0d4e3a06a3c0c53ca7929a72d0b96763;hpb=7d14f145f839b5d0d221ea209b4998f93267e2ec;p=linux-2.6-omap-h63xx.git

diff --git a/drivers/serial/serial_lh7a40x.c b/drivers/serial/serial_lh7a40x.c
index aa521b8e0d4..23ddedbaec0 100644
--- a/drivers/serial/serial_lh7a40x.c
+++ b/drivers/serial/serial_lh7a40x.c
@@ -27,7 +27,6 @@
  *
  */
 
-#include <linux/config.h>
 
 #if defined(CONFIG_SERIAL_LH7A40X_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
 #define SUPPORT_SYSRQ
@@ -145,14 +144,15 @@ lh7a40xuart_rx_chars (struct uart_port* port)
 {
 	struct tty_struct* tty = port->info->tty;
 	int cbRxMax = 256;	/* (Gross) limit on receive */
-	unsigned int data, flag;/* Received data and status */
+	unsigned int data;	/* Received data and status */
+	unsigned int flag;
 
 	while (!(UR (port, UART_R_STATUS) & nRxRdy) && --cbRxMax) {
 		data = UR (port, UART_R_DATA);
 		flag = TTY_NORMAL;
 		++port->icount.rx;
 
-		if (unlikely(data & RxError)) {	/* Quick check, short-circuit */
+		if (unlikely(data & RxError)) {
 			if (data & RxBreak) {
 				data &= ~(RxFramingError | RxParityError);
 				++port->icount.brk;
@@ -303,7 +303,7 @@ static void lh7a40xuart_set_mctrl (struct uart_port* port, unsigned int mctrl)
 	/* Note, kernel appears to be setting DTR and RTS on console. */
 
 	/* *** FIXME: this deserves more work.  There's some work in
-               tracing all of the IO pins. */
+	       tracing all of the IO pins. */
 #if 0
 	if( port->mapbase == UART1_PHYS) {
 		gpioRegs_t *gpio = (gpioRegs_t *)IO_ADDRESS(GPIO_PHYS);
@@ -662,9 +662,13 @@ static int __init lh7a40xuart_init(void)
 	if (ret == 0) {
 		int i;
 
-		for (i = 0; i < DEV_NR; i++)
+		for (i = 0; i < DEV_NR; i++) {
+			/* UART3, when used, requires GPIO pin reallocation */
+			if (lh7a40x_ports[i].port.mapbase == UART3_PHYS)
+				GPIO_PINMUX |= 1<<3;
 			uart_add_one_port (&lh7a40x_reg,
 					   &lh7a40x_ports[i].port);
+		}
 	}
 	return ret;
 }