X-Git-Url: http://pilppa.org/gitweb/?a=blobdiff_plain;f=include%2Fasm-arm%2Fdma-mapping.h;h=e99406a7bece7264569542b85a72ea8c7d3aaa1e;hb=2e561c7b7e705b619122e5386d6f99f28f2b6e5a;hp=c8b5d0db0cf08d8580efdffed8227dbf83f0624f;hpb=cab8e5c4444cb7d9b8035de5d81fbfd5284a02fa;p=linux-2.6-omap-h63xx.git diff --git a/include/asm-arm/dma-mapping.h b/include/asm-arm/dma-mapping.h index c8b5d0db0cf..e99406a7bec 100644 --- a/include/asm-arm/dma-mapping.h +++ b/include/asm-arm/dma-mapping.h @@ -5,7 +5,7 @@ #include /* need struct page */ -#include +#include /* * DMA-consistent mapping functions. These allocate/free a region of @@ -17,7 +17,7 @@ * platforms with CONFIG_DMABOUNCE. * Use the driver DMA support - see dma-mapping.h (dma_sync_*) */ -extern void consistent_sync(const void *kaddr, size_t size, int rw); +extern void dma_cache_maint(const void *kaddr, size_t size, int rw); /* * Return whether the given device DMA address mask can be supported @@ -165,7 +165,7 @@ dma_map_single(struct device *dev, void *cpu_addr, size_t size, enum dma_data_direction dir) { if (!arch_is_coherent()) - consistent_sync(cpu_addr, size, dir); + dma_cache_maint(cpu_addr, size, dir); return virt_to_dma(dev, (unsigned long)cpu_addr); } @@ -274,11 +274,11 @@ dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, for (i = 0; i < nents; i++, sg++) { char *virt; - sg->dma_address = page_to_dma(dev, sg->page) + sg->offset; - virt = page_address(sg->page) + sg->offset; + sg->dma_address = page_to_dma(dev, sg_page(sg)) + sg->offset; + virt = sg_virt(sg); if (!arch_is_coherent()) - consistent_sync(virt, sg->length, dir); + dma_cache_maint(virt, sg->length, dir); } return nents; @@ -334,7 +334,7 @@ dma_sync_single_for_cpu(struct device *dev, dma_addr_t handle, size_t size, enum dma_data_direction dir) { if (!arch_is_coherent()) - consistent_sync((void *)dma_to_virt(dev, handle), size, dir); + dma_cache_maint((void *)dma_to_virt(dev, handle), size, dir); } static inline void @@ -342,7 +342,7 @@ dma_sync_single_for_device(struct device *dev, dma_addr_t handle, size_t size, enum dma_data_direction dir) { if (!arch_is_coherent()) - consistent_sync((void *)dma_to_virt(dev, handle), size, dir); + dma_cache_maint((void *)dma_to_virt(dev, handle), size, dir); } #else extern void dma_sync_single_for_cpu(struct device*, dma_addr_t, size_t, enum dma_data_direction); @@ -371,9 +371,9 @@ dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents, int i; for (i = 0; i < nents; i++, sg++) { - char *virt = page_address(sg->page) + sg->offset; + char *virt = sg_virt(sg); if (!arch_is_coherent()) - consistent_sync(virt, sg->length, dir); + dma_cache_maint(virt, sg->length, dir); } } @@ -384,9 +384,9 @@ dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents, int i; for (i = 0; i < nents; i++, sg++) { - char *virt = page_address(sg->page) + sg->offset; + char *virt = sg_virt(sg); if (!arch_is_coherent()) - consistent_sync(virt, sg->length, dir); + dma_cache_maint(virt, sg->length, dir); } } #else @@ -401,7 +401,7 @@ extern void dma_sync_sg_for_device(struct device*, struct scatterlist*, int, enu * * On the SA-1111, a bug limits DMA to only certain regions of RAM. * On the IXP425, the PCI inbound window is 64MB (256MB total RAM) - * On some ADI engineering sytems, PCI inbound window is 32MB (12MB total RAM) + * On some ADI engineering systems, PCI inbound window is 32MB (12MB total RAM) * * The following are helper functions used by the dmabounce subystem *