X-Git-Url: http://pilppa.org/gitweb/?a=blobdiff_plain;f=include%2Fasm-sparc64%2Fsystem.h;h=99a669c190c776a030ddc2be595693982a1c3fe0;hb=9ef9dc69d4167276c04590d67ee55de8380bc1ad;hp=64891cb10f05c572c6ec1e9a86f0eef14271a4b9;hpb=22aadf8a07067644e101267ed5003043f2ad05bf;p=linux-2.6-omap-h63xx.git diff --git a/include/asm-sparc64/system.h b/include/asm-sparc64/system.h index 64891cb10f0..99a669c190c 100644 --- a/include/asm-sparc64/system.h +++ b/include/asm-sparc64/system.h @@ -1,4 +1,3 @@ -/* $Id: system.h,v 1.69 2002/02/09 19:49:31 davem Exp $ */ #ifndef __SPARC64_SYSTEM_H #define __SPARC64_SYSTEM_H @@ -141,7 +140,6 @@ do { \ * not preserve it's value. Hairy, but it lets us remove 2 loads * and 2 stores in this critical code path. -DaveM */ -#define EXTRA_CLOBBER ,"%l1" #define switch_to(prev, next, last) \ do { if (test_thread_flag(TIF_PERFCTR)) { \ unsigned long __tmp; \ @@ -164,33 +162,36 @@ do { if (test_thread_flag(TIF_PERFCTR)) { \ "stx %%i6, [%%sp + 2047 + 0x70]\n\t" \ "stx %%i7, [%%sp + 2047 + 0x78]\n\t" \ "rdpr %%wstate, %%o5\n\t" \ - "stx %%o6, [%%g6 + %3]\n\t" \ - "stb %%o5, [%%g6 + %2]\n\t" \ - "rdpr %%cwp, %%o5\n\t" \ + "stx %%o6, [%%g6 + %6]\n\t" \ "stb %%o5, [%%g6 + %5]\n\t" \ - "mov %1, %%g6\n\t" \ - "ldub [%1 + %5], %%g1\n\t" \ + "rdpr %%cwp, %%o5\n\t" \ + "stb %%o5, [%%g6 + %8]\n\t" \ + "mov %4, %%g6\n\t" \ + "ldub [%4 + %8], %%g1\n\t" \ "wrpr %%g1, %%cwp\n\t" \ - "ldx [%%g6 + %3], %%o6\n\t" \ - "ldub [%%g6 + %2], %%o5\n\t" \ - "ldub [%%g6 + %4], %%o7\n\t" \ + "ldx [%%g6 + %6], %%o6\n\t" \ + "ldub [%%g6 + %5], %%o5\n\t" \ + "ldub [%%g6 + %7], %%o7\n\t" \ "wrpr %%o5, 0x0, %%wstate\n\t" \ "ldx [%%sp + 2047 + 0x70], %%i6\n\t" \ "ldx [%%sp + 2047 + 0x78], %%i7\n\t" \ - "ldx [%%g6 + %6], %%g4\n\t" \ + "ldx [%%g6 + %9], %%g4\n\t" \ "brz,pt %%o7, 1f\n\t" \ " mov %%g7, %0\n\t" \ - "b,a ret_from_syscall\n\t" \ + "sethi %%hi(ret_from_syscall), %%g1\n\t" \ + "jmpl %%g1 + %%lo(ret_from_syscall), %%g0\n\t" \ + " nop\n\t" \ "1:\n\t" \ - : "=&r" (last) \ + : "=&r" (last), "=r" (current), "=r" (current_thread_info_reg), \ + "=r" (__local_per_cpu_offset) \ : "0" (task_thread_info(next)), \ "i" (TI_WSTATE), "i" (TI_KSP), "i" (TI_NEW_CHILD), \ "i" (TI_CWP), "i" (TI_TASK) \ : "cc", \ "g1", "g2", "g3", "g7", \ - "l2", "l3", "l4", "l5", "l6", "l7", \ + "l1", "l2", "l3", "l4", "l5", "l6", "l7", \ "i0", "i1", "i2", "i3", "i4", "i5", \ - "o0", "o1", "o2", "o3", "o4", "o5", "o7" EXTRA_CLOBBER);\ + "o0", "o1", "o2", "o3", "o4", "o5", "o7"); \ /* If you fuck with this, update ret_from_syscall code too. */ \ if (test_thread_flag(TIF_PERFCTR)) { \ write_pcr(current_thread_info()->pcr_reg); \ @@ -240,7 +241,7 @@ static inline unsigned long xchg64(__volatile__ unsigned long *m, unsigned long extern void __xchg_called_with_bad_pointer(void); -static __inline__ unsigned long __xchg(unsigned long x, __volatile__ void * ptr, +static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr, int size) { switch (size) { @@ -263,7 +264,7 @@ extern void die_if_kernel(char *str, struct pt_regs *regs) __attribute__ ((noret #define __HAVE_ARCH_CMPXCHG 1 -static __inline__ unsigned long +static inline unsigned long __cmpxchg_u32(volatile int *m, int old, int new) { __asm__ __volatile__("membar #StoreLoad | #LoadLoad\n" @@ -276,7 +277,7 @@ __cmpxchg_u32(volatile int *m, int old, int new) return new; } -static __inline__ unsigned long +static inline unsigned long __cmpxchg_u64(volatile long *m, unsigned long old, unsigned long new) { __asm__ __volatile__("membar #StoreLoad | #LoadLoad\n" @@ -293,7 +294,7 @@ __cmpxchg_u64(volatile long *m, unsigned long old, unsigned long new) if something tries to do an invalid cmpxchg(). */ extern void __cmpxchg_called_with_bad_pointer(void); -static __inline__ unsigned long +static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size) { switch (size) {