ARM: OMAP: fix default sys_ck.rate for boot-time DPLL detection

In the clock init code, the DPLL value set by the bootloader is
queried, but always turns zero due it's parent clock (sys_ck) having
no default rate.  This results in the improper setting of the default
PRCM rate-table entry and any queries of virt_prcm_set rate to return 0.

Rather than setting a static sys_ck.rate, detect the correct value at
boot time.

Signed-off-by: Kevin Hilman <khilman@mvista.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c
index 962289487216840d6a640db36c2b412fde9ba5c0..58856d30ef062bbf70cc884176ffcb060f83c1e1 100644 (file)
--- a/arch/arm/mach-omap2/clock24xx.c
+++ b/arch/arm/mach-omap2/clock24xx.c
@@ -475,6 +475,7 @@ int __init omap2_clk_init(void)
        clk_init(&omap2_clk_functions);
 
        omap2_osc_clk_recalc(&osc_ck);
        clk_init(&omap2_clk_functions);
 
        omap2_osc_clk_recalc(&osc_ck);

+       omap2_sys_clk_recalc(&sys_ck);

 
        for (clkp = onchip_24xx_clks;
             clkp < onchip_24xx_clks + ARRAY_SIZE(onchip_24xx_clks);
 
        for (clkp = onchip_24xx_clks;
             clkp < onchip_24xx_clks + ARRAY_SIZE(onchip_24xx_clks);